Port-oriented interconnected conversion circuit and its regulation method and parameter design method
Patent Information
- Application Number
- CN202611528466.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-09-30
- Publication Date
- 2026-11-03
AI Technical Summary
Existing Buck-Boost converters are difficult to achieve bidirectional energy exchange over a wide voltage range in port energy routers. Furthermore, traditional four-switch Buck-Boost converters experience increased current stress and conduction losses in switching devices under high-gain scenarios, making it difficult to meet the complex operating requirements of port energy routers.
The circuit employs a four-switch Buck-Boost bridge arm, a two-port tapped inductor, a filter capacitor, and a load interconnection conversion circuit. Through PWM wave control and coordinated adjustment of the winding turns ratio, it achieves automatic switching between Buck and Boost modes and expands the voltage gain range.
It achieves high-gain Boost operation under low duty cycle conditions, reduces device current stress and switching losses, improves system operating efficiency, and is suitable for wide input interfaces of photovoltaic energy storage in port energy routers, meeting the bidirectional energy conversion requirements of a wide voltage range.
Smart Images
Figure CN123034722A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of voltage converter technology, and more specifically, relates to interconnection conversion circuits for ports and their control and parameter design methods. Background Technology
[0002] In port energy routers, photovoltaic arrays typically serve as the primary renewable energy source, while energy storage systems handle peak shaving, power smoothing, and backup power supply. Energy exchange between the two requires a bidirectional DC-DC converter. Figure 1 As shown, when the photovoltaic output is sufficient, the photovoltaic system charges the energy storage system; when the photovoltaic output is insufficient or the shore power load is large, the energy storage system releases energy to the DC bus or the photovoltaic side. Therefore, the photovoltaic energy storage interface has become one of the most important energy exchange interfaces inside the port's energy router.
[0003] However, the output voltage of the photovoltaic array is affected by solar irradiance, ambient temperature, and maximum power point tracking (MPPT) control, and its operating voltage typically varies within the range of 200V to 800V; the voltage at the energy storage system terminal typically varies within the range of 400V to 1000V depending on the state of charge (SOC). Therefore, under different operating conditions, the photovoltaic energy storage interface may need to implement both boost and buck operation. For example, when the photovoltaic array outputs 300V and the energy storage system operates at 800V, the converter needs to operate in Boost mode; while when the photovoltaic array outputs 800V and the energy storage system operates at 600V, it needs to operate in Buck mode. Therefore, this interface not only requires the converter to cover both Buck and Boost operating modes, but also needs to accommodate a large Boost voltage gain to achieve wide-range voltage gain regulation.
[0004] During operation, the output voltage of the photovoltaic array and the terminal voltage of the energy storage system in the port energy router change in real time with environmental conditions and operating status. Therefore, the converter needs to frequently switch between Buck and Boost operating modes according to different voltage gain requirements. Although existing Buck-Boost converters can handle both boost and buck operation, they usually rely on manually set operating modes or independent control logic for mode switching. They lack the ability to automatically determine and switch between boost and buck modes based on the system operating status, resulting in complex control, reduced operating efficiency, and difficulty in meeting the intelligent operation requirements of the port energy router under complex operating conditions.
[0005] Currently, traditional Boost converters (such as...) Figure 2The traditional four-switch Buck-Boost converter (as shown) is only suitable for boost scenarios with a voltage gain greater than 1, while the traditional Buck converter is only suitable for buck scenarios with a voltage gain less than 1. Neither can meet the bidirectional energy exchange requirements between wide voltage level interfaces of port energy routers. Figure 3 (As shown) Although it can achieve unified operation of Buck and Boost, its system voltage gain is entirely determined by the PWM duty cycle. When a larger Boost gain is required, it must operate in a higher duty cycle region, which leads to increased current stress on the switching devices, increased conduction losses, and decreased system efficiency. At the same time, its gain regulation capability over a wide input voltage range is still limited, making it difficult to meet the wide input range and high gain operation requirements of port photovoltaic energy storage interfaces. Summary of the Invention
[0006] To address the shortcomings of existing technologies, this invention provides a port-oriented interconnection conversion circuit and its control and parameter design methods.
[0007] The present invention adopts the following technical solution.
[0008] The first aspect of this invention proposes an interconnection conversion circuit for ports, comprising an input power supply, a four-switch Buck-Boost bridge arm, a two-port tapped inductor, a first diode, a second diode, an output filter capacitor, and a load, specifically: The four-switch Buck-Boost bridge arm consists of a first switch, a second switch, a third switch, and a fourth switch. The first and second switches are connected in series to form the first bridge arm, and the third and fourth switches are connected in series to form the second bridge arm. The input power supply is directly connected to both ends of the first bridge arm. The middle node of the first bridge arm is connected to one end of the main winding of the two-port tapped inductor. The other end of the main winding of the two-port tapped inductor is connected to one end of the secondary winding of the two-port tapped inductor and the anode of the first diode. The other end of the secondary winding of the two-port tapped inductor is connected to the anode of the second diode. The cathodes of the first and second diodes are both connected to the middle node of the second bridge arm. The output filter capacitor and the load are connected in parallel to both ends of the second bridge arm.
[0009] Preferably, the main winding and the auxiliary winding of the two-port tapped inductor are wound on the same magnetically coupled core.
[0010] The second aspect of the present invention proposes a control method for the port-oriented interconnection conversion circuit described in the first aspect of the present invention, specifically as follows: The PWM wave controls the first, second, third, and fourth switching transistors. When the PWM wave is high, the first and fourth switching transistors are turned on, and the second and third switching transistors are turned off, entering the charging state. When the PWM wave is low, the first and fourth switching transistors are turned off, and the second and third switching transistors are turned on, entering the discharging state. The voltage gain of the circuit is determined by the duty cycle of the PWM wave and the turns ratio of the secondary winding and the primary winding of the two-port tapped inductor; by controlling the duty cycle of the PWM wave, the voltage gain of the circuit can reach the target voltage gain. When the target voltage gain is less than 1, the corresponding PWM wave duty cycle causes the circuit to operate in Buck mode; when the target voltage gain is greater than 1, the corresponding PWM wave duty cycle causes the circuit to operate in Boost mode; when the target voltage gain is equal to 1, the corresponding PWM wave duty cycle causes the circuit to operate in unity-gain mode; when the target voltage gain changes from less than 1 to greater than 1, the corresponding PWM wave duty cycle causes the circuit to automatically switch from Buck mode to Boost mode; when the target voltage gain changes from greater than 1 to less than 1, the corresponding PWM wave duty cycle causes the circuit to automatically switch from Boost mode to Buck mode.
[0011] Preferably, during the charging state, the input power supply charges the main winding and the auxiliary winding. The voltage across the main winding is equal to the input power supply voltage, and the voltage across the auxiliary winding is equal to the voltage across the main winding multiplied by the turns ratio of the auxiliary winding and the main winding of the two-port tapped inductor. In the discharge state, the main winding and the auxiliary winding discharge the output filter capacitor and the load. The voltage across the main winding is equal to the negative voltage across the load divided by the sum of the turns ratio of the auxiliary winding and the main winding of the two-port tapped inductor and 1. The voltage across the auxiliary winding is equal to the voltage across the main winding multiplied by the turns ratio of the auxiliary winding and the main winding of the two-port tapped inductor.
[0012] Preferably, the voltage gain of the circuit is determined by the duty cycle of the PWM wave and the turns ratio of the secondary winding and the primary winding of the two-port tapped inductor, specifically: Add 1 to the turns ratio of the secondary winding and the primary winding of the two-port tapped inductor, and multiply the sum by the duty cycle of the PWM wave. The voltage gain of the circuit is obtained by dividing the result of the multiplication by 1 and the difference between the duty cycle of the PWM wave.
[0013] A third aspect of the present invention proposes a parameter design method for the port-oriented interconnection conversion circuit described in the first aspect of the present invention, specifically as follows: Obtain the input power supply voltage, set the maximum target voltage gain, maximum allowable duty cycle, allowable current ripple, allowable output voltage ripple, maximum operating voltage requirement, switching frequency and output current of the four-switch Buck-Boost bridge arm; calculate the turns ratio of the secondary winding and primary winding of the two-port tapped inductor based on the maximum target voltage gain and maximum allowable duty cycle; Calculate the main winding magnetizing inductance and the secondary winding magnetizing inductance based on the input power supply voltage, the maximum allowable duty cycle, the allowable current ripple, and the switching frequency. The capacitance value of the output filter capacitor is calculated based on the output current, the maximum allowable duty cycle, the allowable output voltage ripple, and the switching frequency. The models of the first switching transistor, the second switching transistor, the third switching transistor, the fourth switching transistor, the first diode, and the second diode are selected. The withstand voltage of the first switching transistor, the second switching transistor, the third switching transistor, the fourth switching transistor, the first diode, and the second diode are all greater than the sum of the maximum operating voltage requirement and the set margin.
[0014] Preferably, the turns ratio of the secondary winding and the primary winding of the two-port tapped inductor is calculated based on the maximum target voltage gain and the maximum allowable duty cycle, specifically as follows: Subtract the maximum allowable duty cycle from 1, multiply the result by the maximum target voltage gain, divide the result by the maximum allowable duty cycle, and subtract 1 from the result to obtain the turns ratio of the secondary winding and primary winding of the two-port tapped inductor.
[0015] Preferably, the main winding magnetizing inductance and the secondary winding magnetizing inductance are calculated based on the input power supply voltage, the maximum allowable duty cycle, the allowable current ripple, and the switching frequency, specifically as follows: The main winding magnetizing inductance is obtained by dividing the product of the input power supply voltage and the maximum allowable duty cycle by the product of the allowable current ripple and the switching frequency. The magnetizing inductance of the secondary winding is obtained by multiplying the square of the turns ratio of the secondary winding to the primary winding by the magnetizing inductance of the primary winding.
[0016] Preferably, the capacitance value of the output filter capacitor is calculated based on the output current, the maximum allowable duty cycle, the allowable output voltage ripple, and the switching frequency, specifically as follows: The capacitance value of the output filter capacitor is obtained by dividing the product of the output current and the maximum allowable duty cycle by the product of the allowable output voltage ripple and the switching frequency.
[0017] A fourth aspect of the present invention provides an electronic terminal comprising a processor and a storage medium; the storage medium being used to store instructions; and the processor being used to operate according to the instructions to execute the steps of the control method for a port-oriented interconnection and conversion circuit according to a second aspect of the present invention.
[0018] The fifth aspect of the invention provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the control method for the port-oriented interconnection conversion circuit described in the second aspect of the invention.
[0019] The beneficial effects of this invention are compared with those of the prior art: (1) This invention introduces a two-port tapped inductor on the basis of the traditional four-switch Buck-Boost converter to achieve wide and high voltage gain expansion.
[0020] (2) The present invention achieves wide-range voltage gain operation in Buck and Boost modes by coordinating the adjustment of duty cycle and winding turns ratio.
[0021] (3) The present invention can achieve high gain Boost operation under low duty cycle conditions, effectively reduce device current stress and switching loss, and improve system operating efficiency.
[0022] (4) The present invention retains the advantages of the four-switch Buck-Boost converter, such as common ground for input and output, simple control and bidirectional operation. It has a compact structure and is easy to implement in engineering.
[0023] (5) This invention is applicable to the wide input interface of photovoltaic energy storage in port energy routers, which can meet the bidirectional energy conversion requirements of photovoltaic arrays and energy storage systems under a wide voltage range, and improve the access capability of new energy sources and the system operation performance.
[0024] (6) The topology proposed in this invention has the unified operation capability of Buck / Boost. It can automatically complete the buck-boost operation mode determination and switching through the system voltage gain curve without the need to add an extra mode recognition circuit. It is simple to control and has good engineering application value. Attached Figure Description
[0025] Figure 1 A schematic diagram of the structure of a new type of port shore power energy system; Figure 2 This is a diagram of the traditional Boost converter topology. Figure 3 This is a topology diagram of a traditional four-switch Buck-Boost converter; Figure 4 This is a schematic diagram of the interconnection conversion circuit proposed in this invention; Figure 5 This is a structural diagram of a two-port TL unit; Figure 6 Equivalent circuit diagram for charging state; Figure 7 The equivalent circuit diagram for the discharge state; Figure 8 This is a waveform diagram of a PWM-controlled switching transistor. Figure 9 Gain curves under different winding turns ratios; Figure 10 This is a flowchart of the parameter design method of the present invention; Figure 11 The actual duty cycle, input voltage, and output voltage under three operating conditions simulated in Embodiment 4 of the present invention; Figure 11 (a) The actual duty cycle under three operating conditions simulated in Example 4 of this invention; Figure 11 (b) The actual input voltages under three operating conditions simulated in Embodiment 4 of the present invention; Figure 11 (c) The actual output voltage under three operating conditions simulated in Embodiment 4 of the present invention; Figure 12 The actual duty cycle, input voltage, and output voltage under three operating conditions simulated in Embodiment 5 of the present invention; Figure 12 (a) The actual duty cycle under three operating conditions simulated in Embodiment 5 of the present invention; Figure 12 (b) The actual input voltages under three operating conditions simulated in Embodiment 5 of the present invention; Figure 12 (c) is the actual output voltage under three operating conditions simulated in Embodiment 5 of the present invention. Detailed Implementation
[0026] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of this invention. The embodiments described in this application are merely some embodiments of this invention, and not all embodiments. Based on the spirit of this invention, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of this invention.
[0027] like Figure 4 As shown, Embodiment 1 of the present invention proposes an interconnection conversion circuit for ports, including an input power supply, a four-switch Buck-Boost bridge arm, a two-port tapped inductor, a first diode, a second diode, an output filter capacitor, and a load, specifically: The four-switch Buck-Boost bridge arm consists of a first switch, a second switch, a third switch, and a fourth switch. The first and second switches are connected in series to form the first bridge arm, and the third and fourth switches are connected in series to form the second bridge arm. The input power supply is directly connected to both ends of the first bridge arm. The middle node of the first bridge arm is connected to one end of the main winding of a two-port tapped inductor. The other end of the main winding of the two-port tapped inductor is connected to one end of the secondary winding of the two-port tapped inductor and the anode of the first diode. The other end of the secondary winding of the two-port tapped inductor is connected to the anode of the second diode. The cathodes of both the first and second diodes are connected to the middle node of the second bridge arm. The output filter capacitor and the load are connected in parallel to both ends of the second bridge arm. Figure 5 As shown, the two-port tapped inductor, the first diode, and the second diode together form a two-port TL unit; In this embodiment, a two-port TL unit is used to replace the traditional energy storage inductor, so that the energy storage inductor not only undertakes the function of energy storage, but also participates in the system voltage gain regulation.
[0028] Among them, the main winding The primary winding is used for energy storage, storing input energy during the charging phase. The secondary winding... As an auxiliary gain winding, it generates an induced voltage through magnetic coupling during the discharge phase, and together with the main winding, releases energy to the output side.
[0029] In this preferred embodiment, the main winding and the auxiliary winding of the two-port tapped inductor are wound on the same magnetically coupled core.
[0030] It is preferable to wind the main and auxiliary windings on the same magnetic core to improve the coupling coefficient and reduce leakage inductance, thereby improving the converter's operating efficiency.
[0031] Let the switching period of the four-switch Buck-Boost bridge arm be... The PWM wave conduction time is The PWM duty cycle is defined as follows: , .
[0032] Embodiment 2 of the present invention proposes a control method for the port-oriented interconnection conversion circuit described in Embodiment 1 of the present invention, specifically as follows: like Figure 8 As shown, the PWM wave controls the first, second, third, and fourth switching transistors; when the PWM wave is high (i.e., When the PWM wave is low, the first and fourth switches are turned on, and the second and third switches are turned off, entering the charging state; when the PWM wave is low ( When the first and fourth switches are turned off, the second and third switches are turned on, and the system enters the discharge state. The voltage gain of the circuit is determined by the duty cycle of the PWM wave and the turns ratio of the secondary and primary windings of the two-port tapped inductor; where, let the number of turns in the primary winding be... The number of turns in the secondary winding is Therefore, the turns ratio of the secondary winding to the primary winding is: , By controlling the duty cycle of the PWM wave, the voltage gain of the circuit can reach the target voltage gain. In this preferred embodiment, such as Figure 6 As shown, during the charging state, the input power supply charges the main winding and the auxiliary winding. At this time, the first diode is turned on, the second diode is turned off, and the voltage across the main winding is equal to the input power supply voltage, that is:
[0033] in, This is the voltage across the main winding during charging. Input power supply voltage; The voltage across the secondary winding is equal to the voltage across the primary winding multiplied by the turns ratio of the secondary winding to the primary winding of the two-port tapped inductor, i.e.:
[0034] in, This represents the voltage across the secondary winding during charging. During the charging state, the input electrical energy is stored in the two-port TL unit in the form of magnetic energy. Since the main winding is directly charged by the input power supply during this stage, this operating mode is essentially a "parallel charging" mode.
[0035] like Figure 7 As shown, in the discharge state, the main winding and the auxiliary winding discharge to the output filter capacitor and the load. At this time, the first diode is cut off and the second diode is turned on; at this time, the following conditions are met:
[0036] in, This is the voltage across the load. , These are the voltages across the main winding and auxiliary winding respectively, in the discharge state. Since the voltage across the secondary winding is equal to the voltage across the primary winding multiplied by the turns ratio of the secondary and primary windings of the two-port tapped inductor, that is:
[0037] Therefore, the voltage across the main winding is equal to the negative load voltage divided by the sum of the turns ratio of the secondary winding and the main winding of the two-port tapped inductor and 1, that is:
[0038] During this operating phase, the main winding and the auxiliary winding jointly supply energy to the output side; therefore, this operating mode is essentially a "series discharge" mode. Through the aforementioned "parallel charging, series discharging" operating mechanism, this embodiment achieves system voltage gain expansion.
[0039] In this preferred embodiment, the voltage gain of the circuit is determined by the duty cycle of the PWM wave and the turns ratio of the secondary winding and the primary winding of the two-port tapped inductor, specifically: Because the main winding satisfies the volt-second balance relationship:
[0040] Substituting the above relationships, we get:
[0041] Therefore, add 1 to the turns ratio of the secondary winding and the primary winding of the two-port tapped inductor, and multiply the sum by the duty cycle of the PWM wave; Divide the result of the multiplication by the difference between 1 and the duty cycle of the PWM wave to obtain the voltage gain of the circuit, as shown in the formula:
[0042] in, Voltage gain; Compared to traditional four-switch Buck-Boost converters that rely solely on duty cycle to adjust voltage gain, this invention determines system gain through both duty cycle and turns ratio. Therefore, it can achieve greater Boost gain under lower duty cycle conditions while still being able to select stable Buck mode operation.
[0043] The gain curve of this embodiment is as follows: Figure 9 As shown, this embodiment can not only adjust the system gain by the duty cycle, but also further improve the system output capability by the winding turns ratio.
[0044] When the target voltage gain is less than 1 ( M <1), the corresponding PWM wave duty cycle causes the circuit to operate in Buck mode; when the target voltage gain is greater than 1 ( M >1), the corresponding PWM wave duty cycle causes the circuit to operate in Boost mode, when the target voltage is equal to 1 ( M =1), the corresponding PWM wave duty cycle makes the circuit work in unity gain mode; when the target voltage gain changes from less than 1 to greater than 1, the corresponding PWM wave duty cycle makes the circuit automatically switch from working in Buck mode to Boost mode; when the target voltage gain changes from greater than 1 to less than 1, the corresponding PWM wave duty cycle makes the circuit automatically switch from working in Boost mode to Buck mode.
[0045] The entire mode switching process requires no additional hardware or manual switching of the operating mode. It automatically determines the operating mode and configures PWM parameters based solely on the system's target voltage gain, achieving automatic switching and control between Buck and Boost modes. This automatic switching and control strategy fully utilizes the unified operating characteristics of the wide and high gain topology in this embodiment, achieving seamless integration of Buck and Boost modes and improving the operating efficiency and engineering adaptability of the port energy router under different photovoltaic output and energy storage voltage conditions.
[0046] To meet the wide and high voltage gain requirements of the wide input interface of the port energy router for photovoltaic energy storage, such as Figure 10 As shown, Embodiment 3 of the present invention proposes a parameter design method for the port-oriented interconnection conversion circuit described in Embodiment 1 of the present invention. This method follows the process of "obtaining or designing various allowable parameters → winding turns ratio design → two-port tapped inductor design → filter parameter design → power device selection," ensuring that the converter meets the requirements of efficient and stable operation under different photovoltaic input voltages and energy storage system voltages. Specifically, Obtain the input power supply voltage, set the maximum target voltage gain, the maximum allowable duty cycle, the allowable current ripple, the allowable output voltage ripple, the maximum operating voltage requirement, the switching frequency and output current of the four-switch Buck-Boost bridge arm. It should be noted that these parameters are set or obtained directly from engineering requirements or relevant design parameter manuals. Calculate the turns ratio of the secondary winding and primary winding of the two-port tapped inductor based on the maximum target voltage gain and the maximum allowable duty cycle; Calculate the main winding magnetizing inductance and the secondary winding magnetizing inductance based on the input power supply voltage, the maximum allowable duty cycle, the allowable current ripple, and the switching frequency. The capacitance value of the output filter capacitor is calculated based on the output current, the maximum allowable duty cycle, the allowable output voltage ripple, and the switching frequency. The models of the first switching transistor, the second switching transistor, the third switching transistor, the fourth switching transistor, the first diode, and the second diode are selected. The withstand voltage of the first switching transistor, the second switching transistor, the third switching transistor, the fourth switching transistor, the first diode, and the second diode are all greater than the sum of the maximum operating voltage requirement and the set margin.
[0047] In this preferred embodiment, the turns ratio of the secondary winding and the primary winding of the two-port tapped inductor is calculated based on the maximum target voltage gain and the maximum allowable duty cycle, specifically as follows: Subtract the maximum allowable duty cycle from 1, multiply the result by the maximum target voltage gain, divide the result by the maximum allowable duty cycle, and subtract 1 from the result to obtain the turns ratio of the secondary winding and primary winding of the two-port tapped inductor, i.e.:
[0048] in, The maximum target voltage gain is set. This refers to the set maximum allowable duty cycle. It should be noted that in practical applications, the converter needs to adjust the PWM duty cycle to achieve different target voltage gains based on voltage changes at the photovoltaic and energy storage ends. In actual operation, both the target voltage gain and duty cycle are dynamically changing parameters and cannot be used as fixed design parameters for winding turns ratio calculation. Therefore, the maximum target voltage gain and the maximum allowable duty cycle are used in the parameter design stage to design the winding turns ratio. This ensures that the maximum voltage gain required by the system is met within the limited duty cycle range, while avoiding problems such as current stress and reduced control margin caused by excessively high duty cycles.
[0049] Based on the above winding turns ratio selection, a larger boost voltage gain can be achieved under a lower duty cycle condition.
[0050] In this preferred embodiment, the main winding magnetizing inductance and the secondary winding magnetizing inductance are calculated based on the input power supply voltage, the maximum allowable duty cycle, the allowable current ripple, and the switching frequency. Specifically: The main winding magnetizing inductance is obtained by dividing the product of the input power supply voltage and the maximum allowable duty cycle by the product of the allowable current ripple and the switching frequency. The formula is as follows:
[0051] in, Main winding magnetizing inductance; To allow for current ripple; The switching frequency; The primary and secondary windings are wound on the same magnetic core. Under ideal coupling conditions, the following condition is satisfied: the square of the turns ratio of the secondary winding to the primary winding multiplied by the magnetizing inductance of the primary winding equals the magnetizing inductance of the secondary winding. The formula is:
[0052] in, For the auxiliary winding magnetizing inductance; In this preferred embodiment, the capacitance value of the output filter capacitor is calculated based on the output current, the maximum allowable duty cycle, the allowable output voltage ripple, and the switching frequency. Specifically: The output filter capacitor value is obtained by dividing the product of the output current and the maximum allowable duty cycle by the product of the allowable output voltage ripple and the switching frequency. The formula is as follows:
[0053] in, This is the capacitance value of the output filter capacitor; For output current; To allow for output voltage ripple.
[0054] Embodiment 4 of the present invention establishes three operating conditions for simulation verification. The three operating conditions are: (1) a traditional four-switch Buck-Boost converter; (2) the circuit of Embodiment 1 of the present invention, and the turns ratio is... (3) The circuit of Embodiment 1 of the present invention, and the number of turns ratio ; Input voltage Switching frequency Duty cycle The theoretical voltage gain and theoretical output voltage under the three operating conditions are shown in Table 1.
[0055] Table 1. Theoretical voltage gain and theoretical output voltage under three operating conditions.
[0056] The actual duty cycle, input voltage, and output voltage under the three operating conditions simulated in this embodiment are as follows: Figure 11 As shown, where, Figure 11 (a) The actual duty cycle under three operating conditions simulated in Example 4 of this invention; Figure 11 (b) The actual input voltages under three operating conditions simulated in Embodiment 4 of the present invention; Figure 11 (c) The actual output voltage under three operating conditions simulated in Embodiment 4 of the present invention; the simulation results show that, under the condition that the input voltage and duty cycle are the same, the traditional four-switch Buck-Boost converter has the lowest output voltage; when a two-port tapped inductor unit is introduced, the output voltage varies with the turns ratio. It increases significantly with the increase of [something].
[0057] Among them: when When, the output voltage increases to approximately 304V; when At this point, the output voltage further increases to approximately 608V, consistent with the theoretical value. This result demonstrates that this embodiment can effectively extend the voltage gain range of a conventional four-switch Buck-Boost converter by introducing a two-port tapped inductor unit.
[0058] Meanwhile, since this embodiment introduces the ability to control the gain through the turns ratio, the system gain is no longer determined solely by the duty cycle, but rather by both the duty cycle and the turns ratio, thereby improving the flexibility of system design.
[0059] Embodiment 5 of the present invention establishes three operating conditions for simulation verification, and changes the simulated output voltage from a fixed duty cycle to a simulated duty cycle with a fixed target output voltage. The three operating conditions are: (1) a conventional four-switch Buck-Boost converter; (2) the circuit of Embodiment 1 of the present invention, and the turns ratio (3) The circuit of Embodiment 1 of the present invention, and the number of turns ratio ; Input voltage Switching frequency Target output voltage The theoretical required duty cycle for the three operating conditions is shown in Table 2.
[0060] Table 2 Theoretical required duty cycle for three operating conditions
[0061] The actual duty cycle, input voltage, and output voltage under the three operating conditions simulated in this embodiment are as follows: Figure 12 As shown, where, Figure 12 (a) The actual duty cycle under three operating conditions simulated in Embodiment 5 of the present invention; Figure 12 (b) The actual input voltages under three operating conditions simulated in Embodiment 5 of the present invention; Figure 12 (c) The actual output voltage under three operating conditions simulated in Embodiment 5 of the present invention. The simulation results show that, under the same input voltage and duty cycle, all three converters can achieve a target output voltage of approximately 200V. However, the traditional four-switch Buck-Boost converter requires a large duty cycle of approximately 0.806, while with the introduction of a two-port tapped inductor unit: when At that time, the required duty cycle drops to approximately 0.676; when At this point, the required duty cycle further decreases to approximately 0.510, consistent with the theoretical value.
[0062] The results show that the present invention can reduce the system’s dependence on extreme duty cycles by reducing the degree of freedom of turns ratio, thereby shifting the high-gain operating point from the traditional large duty cycle region to the more easily achievable medium duty cycle region.
[0063] This disclosure can be a system, method, and / or computer program product. A computer program product may include a computer-readable storage medium having computer-readable program instructions loaded thereon for causing a processor to implement various aspects of this disclosure.
[0064] Computer-readable storage media can be tangible devices capable of holding and storing instructions for use by an instruction execution device. Computer-readable storage media can be, for example—but not limited to—electrical storage devices, magnetic storage devices, optical storage devices, electromagnetic storage devices, semiconductor storage devices, or any suitable combination of the foregoing. More specific examples (a non-exhaustive list) of computer-readable storage media include: portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), static random access memory (SRAM), portable compact disc read-only memory (CD-ROM), digital multifunction disc (DVD), memory sticks, floppy disks, mechanical encoding devices, such as punch cards or recessed protrusions storing instructions thereon, and any suitable combination of the foregoing. The computer-readable storage media used herein are not to be construed as transient signals themselves, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through waveguides or other transmission media (e.g., light pulses through fiber optic cables), or electrical signals transmitted through wires.
[0065] The computer-readable program instructions described herein can be downloaded from computer-readable storage media to various computing / processing devices, or downloaded via a network, such as the Internet, local area network, wide area network, and / or wireless network, to an external computer or external storage device. The network may include copper transmission cables, fiber optic transmission, wireless transmission, routers, firewalls, switches, gateway computers, and / or edge servers. A network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards them to the computer-readable storage media in the respective computing / processing device.
[0066] Computer program instructions used to perform the operations of this disclosure may be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, status setting data, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages such as Smalltalk, C++, etc., and conventional procedural programming languages such as the "C" language or similar programming languages. The computer-readable program instructions may execute entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving a remote computer, the remote computer may be connected to the user's computer via any type of network—including a local area network (LAN) or a wide area network (WAN)—or may be connected to an external computer (e.g., via the Internet using an Internet service provider). In some embodiments, electronic circuitry, such as programmable logic circuitry, field-programmable gate arrays (FPGAs), or programmable logic arrays (PLAs), is personalized by utilizing the status information of the computer-readable program instructions to implement various aspects of this disclosure.
[0067] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that modifications or equivalent substitutions can still be made to the specific implementation of the present invention. Any modifications or equivalent substitutions that do not depart from the spirit and scope of the present invention should be covered within the protection scope of the claims of the present invention.
Claims
1. A port-oriented interconnection conversion circuit, comprising an input power supply, a four-switch Buck-Boost bridge arm, a two-port tapped inductor, a first diode, a second diode, an output filter capacitor, and a load, characterized in that: The four-switch Buck-Boost bridge arm consists of a first switch, a second switch, a third switch, and a fourth switch. The first and second switches are connected in series to form the first bridge arm, and the third and fourth switches are connected in series to form the second bridge arm. The input power supply is directly connected to both ends of the first bridge arm. The middle node of the first bridge arm is connected to one end of the main winding of the two-port tapped inductor. The other end of the main winding of the two-port tapped inductor is connected to one end of the secondary winding of the two-port tapped inductor and the anode of the first diode. The other end of the secondary winding of the two-port tapped inductor is connected to the anode of the second diode. The cathodes of the first and second diodes are both connected to the middle node of the second bridge arm. The output filter capacitor and the load are connected in parallel to both ends of the second bridge arm.
2. The port-oriented interconnection conversion circuit according to claim 1, characterized in that: The main and auxiliary windings of a two-port tapped inductor are wound on the same magnetically coupled core.
3. A control method applied to the port-oriented interconnection conversion circuit according to any one of claims 1-2, characterized in that: The PWM wave controls the first, second, third, and fourth switching transistors. When the PWM wave is high, the first and fourth switching transistors are turned on, and the second and third switching transistors are turned off, entering the charging state. When the PWM wave is low, the first and fourth switching transistors are turned off, and the second and third switching transistors are turned on, entering the discharging state. The voltage gain of the circuit is determined by the duty cycle of the PWM wave and the turns ratio of the secondary winding and the primary winding of the two-port tapped inductor; by controlling the duty cycle of the PWM wave, the voltage gain of the circuit can reach the target voltage gain. When the target voltage gain is less than 1, the duty cycle of the corresponding PWM wave causes the circuit to operate in Buck mode. When the target voltage gain is greater than 1, the duty cycle of the corresponding PWM wave makes the circuit work in Boost mode. When the target voltage gain is equal to 1, the duty cycle of the corresponding PWM wave makes the circuit work in unity gain mode. When the target voltage gain changes from less than 1 to greater than 1, the corresponding duty cycle of the PWM wave causes the circuit to automatically switch from Buck operation mode to Boost operation mode. When the target voltage gain changes from greater than 1 to less than 1, the corresponding duty cycle of the PWM wave causes the circuit to automatically switch from Boost mode to Buck mode.
4. The control method for the port-oriented interconnection conversion circuit according to claim 3, characterized in that: During the charging state, the input power supply charges the main winding and the auxiliary winding. The voltage across the main winding is equal to the input power supply voltage, and the voltage across the auxiliary winding is equal to the voltage across the main winding multiplied by the turns ratio of the auxiliary winding and the main winding of the two-port tapped inductor. In the discharge state, the main winding and the auxiliary winding discharge the output filter capacitor and the load. The voltage across the main winding is equal to the negative voltage across the load divided by the sum of the turns ratio of the auxiliary winding and the main winding of the two-port tapped inductor and 1. The voltage across the auxiliary winding is equal to the voltage across the main winding multiplied by the turns ratio of the auxiliary winding and the main winding of the two-port tapped inductor.
5. The control method for the port-oriented interconnection conversion circuit according to claim 3, characterized in that: The voltage gain of the circuit is determined by the duty cycle of the PWM wave and the turns ratio of the secondary winding and the primary winding of the two-port tapped inductor, specifically: Add 1 to the turns ratio of the secondary winding and the primary winding of the two-port tapped inductor, and multiply the sum by the duty cycle of the PWM wave. The voltage gain of the circuit is obtained by dividing the result of the multiplication by 1 and the difference between the duty cycle of the PWM wave.
6. A parameter design method applied to the port-oriented interconnection conversion circuit according to any one of claims 1-2, characterized in that: Obtain the input power supply voltage, set the maximum target voltage gain, the maximum allowable duty cycle, the allowable current ripple, the allowable output voltage ripple, the maximum operating voltage requirement, and the switching frequency and output current of the four-switch Buck-Boost bridge arm; Calculate the turns ratio of the secondary winding and primary winding of the two-port tapped inductor based on the maximum target voltage gain and the maximum allowable duty cycle; Calculate the main winding magnetizing inductance and the secondary winding magnetizing inductance based on the input power supply voltage, the maximum allowable duty cycle, the allowable current ripple, and the switching frequency. The capacitance value of the output filter capacitor is calculated based on the output current, the maximum allowable duty cycle, the allowable output voltage ripple, and the switching frequency. The models of the first switching transistor, the second switching transistor, the third switching transistor, the fourth switching transistor, the first diode, and the second diode are selected. The withstand voltage of the first switching transistor, the second switching transistor, the third switching transistor, the fourth switching transistor, the first diode, and the second diode are all greater than the sum of the maximum operating voltage requirement and the set margin.
7. The parameter design method for the port-oriented interconnection conversion circuit according to claim 6, characterized in that: The turns ratio of the secondary winding and primary winding of the two-port tapped inductor is calculated based on the maximum target voltage gain and the maximum allowable duty cycle, specifically as follows: Subtract the maximum allowable duty cycle from 1, multiply the result by the maximum target voltage gain, divide the result by the maximum allowable duty cycle, and subtract 1 from the result to obtain the turns ratio of the secondary winding and primary winding of the two-port tapped inductor.
8. The parameter design method for the port-oriented interconnection conversion circuit according to claim 6, characterized in that: The main winding magnetizing inductance and the secondary winding magnetizing inductance are calculated based on the input power supply voltage, the maximum allowable duty cycle, the allowable current ripple, and the switching frequency. Specifically: The main winding magnetizing inductance is obtained by dividing the product of the input power supply voltage and the maximum allowable duty cycle by the product of the allowable current ripple and the switching frequency. The magnetizing inductance of the secondary winding is obtained by multiplying the square of the turns ratio of the secondary winding to the primary winding by the magnetizing inductance of the primary winding.
9. The parameter design method for the port-oriented interconnection conversion circuit according to claim 6, characterized in that: The capacitance value of the output filter capacitor is calculated based on the output current, the maximum allowable duty cycle, the allowable output voltage ripple, and the switching frequency. Specifically: The capacitance value of the output filter capacitor is obtained by dividing the product of the output current and the maximum allowable duty cycle by the product of the allowable output voltage ripple and the switching frequency.
10. An electronic terminal, comprising a processor and a storage medium; characterized in that: The storage medium is used to store instructions; the processor is used to operate according to the instructions to execute the steps of the control method for the port-oriented interconnection conversion circuit according to any one of claims 3-5.
11. A computer-readable storage medium having a computer program stored thereon, characterized in that, When executed by a processor, the program implements the steps of the control method for the port-oriented interconnection conversion circuit as described in any one of claims 3-5.