A multi-stage low-voltage diode series rectification control method for a cryo-em high-voltage tank

Abstract

The present application relates to high-voltage power supply rectification control technical field, specifically for a kind of multistage low-voltage diode series rectification control method for cryo-electron microscope high-voltage box, including acquisition each series diode reverse voltage and ac input voltage, identify input stage and pressure-tending, determine pressure control priority;Acquisition voltage equalization node leakage current, divide abnormal retention section and determine abnormal grade;Analysis adjacent voltage-doubler capacitor potential difference change, obtain interstage response lag amount;Correlate pressure priority, abnormal node and lag amount, determine monitoring, regulation and protection sequence, generate operation regulation and protection control sequence.The present application is by correlating diode reverse voltage, ac input stage, series position and sampling timing, identify sustained high pressure and change sensitive device, combine leakage current abnormal grading and interstage response lag analysis, locate unbalanced node and form monitoring, regulation and protection sequence, improve the accuracy and timeliness of abnormal positioning and protection response.

Description

Technical Field

[0001] This invention relates to the field of high-voltage power supply rectification and control technology, and in particular to a multi-stage low-voltage diode series rectification and control method for a cryo-electron microscope high-voltage chamber. Background Technology

[0002] The field of high-voltage power supply rectification and control technology encompasses high-voltage DC power generation structures, multi-stage voltage multiplier rectifier circuit construction methods, withstand voltage configuration of rectifier devices, and electric field distribution control in high-voltage insulation environments. The core of this technology lies in achieving high-level DC voltage output through the cascaded combination of AC input voltage and rectifier units, and in the systematic design of the voltage superposition paths, potential distribution, and insulation dielectric arrangement for each stage. In cryo-electron microscopy high-voltage chamber applications, this technology specifically involves the structural arrangement of oil-immersed high-voltage generation modules, the stage design of multi-stage voltage multiplier rectifier circuits, the load-bearing methods of rectifier devices under high reverse voltage conditions, and the configuration of insulation and creepage distances within a limited space, thereby constructing a high-voltage rectification system.

[0003] Existing technologies are mainly designed based on rated withstand voltage, withstand voltage margin, and equalization configuration. During operation, they mostly use static parameters or discrete measurements, which makes it difficult to reflect the dynamic pressure changes at each series position under different AC stages. Leakage anomalies are only judged based on exceeding limits, which also makes it difficult to distinguish between instantaneous disturbances and continuous degradation, easily leading to false protection, delayed handling, and inaccurate fault location between stages. Summary of the Invention

[0004] To address the technical problems existing in the prior art, embodiments of the present invention provide a multi-stage low-voltage diode series rectification control method for a cryo-electron microscope high-voltage chamber. The technical solution is as follows: A method for controlling a multi-stage low-voltage diode series rectification in a cryo-electron microscope high-voltage chamber includes the following steps: Collect the reverse voltage and AC input waveform voltage of each series diode, identify the two types of voltage according to the sampling time and the AC input stage, generate the reverse voltage sequence according to the diode identification and series position, and divide the reverse voltage trend segment according to the change of adjacent reverse readings to form a reverse voltage trend segment distribution table. Read the reverse voltage trend segment distribution table, align the reverse voltage trend segments according to the sampling range and AC input stage, divide the voltage bearing comparison segment, determine the voltage bearing control priority by combining the reverse voltage reading and the reverse voltage change trend, and generate a diode voltage bearing control priority mapping table. Obtain the voltage equalization resistor network connection configuration, divide the diodes and parallel voltage equalization resistors into voltage equalization units and configure node identifiers, collect the leakage current readings of the corresponding nodes, mark abnormal sampling points, divide continuous abnormal sampling points to form leakage current retention sections and determine the voltage equalization anomaly level, and generate a leakage current retention node classification table. Collect potential difference sampling values ​​at the connection positions of each voltage multiplier capacitor and form a potential difference time series. Align adjacent capacitor stages according to the AC input stage, shift the potential difference time series of the next stage point by point, record the shift position, compare the potential difference change trend and count the number of matching points, determine the target shift position, and generate an interstage hysteresis correlation sequence. Based on the voltage control priority and series position in the diode voltage control priority mapping table, a candidate sequence for diode monitoring is formed. The voltage equalization anomaly level in the leakage current retention node classification table is read and the limiting node is marked. The monitoring sequence and protection response sequence of the rectifier branch are determined by combining the inter-stage hysteresis correlation sequence. The key control interval is determined based on the target translation position and AC input stage, and a multi-stage series rectifier operation adjustment and protection control sequence is generated.

[0005] As a further aspect of the present invention, the reverse voltage trend segment distribution table is generated in the following manner: Obtain the reverse voltage readings and AC input waveform voltage readings of each diode in the series silicon diode array. According to the two types of voltage readings corresponding to the sampling time, divide the AC input stage according to the AC input waveform voltage direction and change state, record the stage identifier corresponding to each sampling time, and obtain the AC input stage sequence. Based on the AC input stage sequence, the series position is determined according to the connection order of the diodes in the rectifier branch. The diode identification, series position, sampling time, AC input stage and reverse voltage reading are associated one by one. The readings corresponding to the same sampling time are arranged according to the series position, and the readings corresponding to the same diode are arranged according to the sampling order. The corresponding state between the diode identification and the series position is checked to generate the reverse voltage sequence. The reverse voltage sequence and AC input stage sequence are called up, and the reverse voltage readings at adjacent sampling times of the same diode are compared to identify the reverse voltage change trend. The sampling range that maintains the same reverse voltage change trend is divided into reverse voltage trend segments. The start and end times and trend status of each segment are recorded. The segment records are collected and arranged according to diode identification, series position and AC input stage to obtain the reverse voltage trend segment distribution table.

[0006] As a further aspect of the present invention, the process of establishing the diode voltage bearing control priority mapping table includes: Read the reverse voltage trend segment distribution table, arrange the reverse voltage trend segments of different diodes according to the sampling range and AC input stage, determine whether the sampling range of each reverse voltage trend segment overlaps and whether the AC input stage is consistent, and group the reverse voltage trend segments in the same sampling range and the same AC input stage into the same segment to obtain the voltage comparison segment sequence. Based on the pressure comparison segment sequence, the diode reverse voltage readings and reverse voltage change trends within each pressure comparison segment are called up. The order of arrangement is determined according to the reverse voltage readings from largest to smallest. When the readings are the same, they are arranged in order of upward trend, flat trend and downward trend. The pressure control priority is determined according to the arrangement order, and a pressure control priority sequence is generated. Based on the pressure control priority sequence, the diode identifier, series position, and reverse voltage trend segment in the pressure comparison segment sequence are associated. The corresponding relationships of each item are sorted according to the pressure control priority, and the records of the same diode are arranged according to the sampling order to establish a diode pressure control priority mapping table.

[0007] As a further aspect of the present invention, when the reverse voltage readings are the same, the process of determining the pressure-bearing control priority according to the reverse voltage change trend is specifically as follows: Within the same voltage comparison range, diodes with the same reverse voltage reading are selected, and the reverse voltage change trend of each diode is read. Diodes with an upward reverse voltage change trend are determined as the first voltage control priority, diodes with a flat reverse voltage change trend are determined as the second voltage control priority, and diodes with a downward reverse voltage change trend are determined as the third voltage control priority.

[0008] As a further aspect of the present invention, for abnormal leakage current in the voltage equalization resistor network, the classification is based on the location of the voltage equalization node, the leakage current state, and the duration of the abnormality, specifically including: Obtain the connection configuration of the voltage equalization resistor network, divide each diode and parallel voltage equalization resistor into voltage equalization units, configure voltage equalization node identifiers according to the connection position of the voltage equalization unit in the rectifier branch, associate diode identifiers, voltage equalization resistors and voltage equalization node identifiers, arrange each voltage equalization node according to the AC input terminal to the DC high voltage output terminal, and obtain the voltage equalization node position sequence.

[0009] Based on the voltage equalization node location sequence, leakage current readings of each voltage equalization node are collected. The voltage equalization node identifier, sampling time and leakage current reading are associated one by one. The corresponding records of the same voltage equalization node are arranged according to the sampling order. The leakage current readings are compared with the normal leakage current range obtained. Normal sampling points and abnormal sampling points are marked respectively to generate a leakage current state sequence.

[0010] The leakage current state sequence is invoked, and continuous abnormal sampling points are identified according to the sampling order. The continuous abnormal sampling points are divided into leakage current retention sections. The start position, end position and continuous range of each leakage current retention section are recorded, and the voltage equalization anomaly level is determined. The leakage current retention sections and voltage equalization anomaly levels are organized according to the voltage equalization node identifier, and a leakage current retention node classification table is established.

[0011] As a further aspect of the present invention, the voltage equalization anomaly level is determined according to the continuous range of the leakage current retention section, specifically including: The sampling time corresponding to the first abnormal sampling point in each leakage current retention segment is determined as the starting position, and the sampling time corresponding to the last abnormal sampling point in the continuous abnormal sampling points is determined as the ending position. The continuous range is determined according to the number of continuous abnormal sampling points between the starting position and the ending position. The continuous range is compared with the preset first continuous range threshold and the preset second continuous range threshold respectively. The leakage current retention segment that does not reach the preset first continuous range threshold is determined as the first voltage equalization abnormal level, the leakage current retention segment that reaches the preset first continuous range threshold but does not reach the preset second continuous range threshold is determined as the second voltage equalization abnormal level, and the leakage current retention segment that reaches the preset second continuous range threshold is determined as the third voltage equalization abnormal level.

[0012] As a further aspect of the present invention, the specific formation process of the inter-level hysteresis correlation sequence includes: Acquire the potential difference sampling value at each voltage multiplier capacitor connection position, configure the voltage multiplier capacitor level identifier according to the connection order from AC input terminal to DC high voltage output terminal, associate the voltage multiplier capacitor level identifier, sampling time and potential difference sampling value item by item, arrange the records of the same voltage multiplier capacitor level according to the sampling order, compare the potential difference sampling values ​​at adjacent sampling times, identify the potential difference change trend, and generate a potential difference time series. Based on the potential difference time series, the AC input stage in the reverse voltage trend segment distribution table is called, and the corresponding records of adjacent voltage doubler capacitor stages are aligned. Taking the previous stage potential difference time series as the reference, the next stage potential difference time series is shifted point by point from the unshifted position. Each shifted position is recorded to form a set of shifted positions. The potential difference change trend of the corresponding sampling points is compared, the matching sampling points are marked and the matching segments are divided to obtain the shifted matching number sequence. Based on the translation matching number sequence, the number of matching sampling points corresponding to each translation position is counted. The translation positions are arranged from most to least according to the number of matching sampling points. The translation position corresponding to the first position in the arrangement is selected as the target translation position. The target translation position is determined as the interstage response hysteresis of the subsequent voltage multiplier capacitor relative to the previous voltage multiplier capacitor. The interstage response hysteresis of each stage is organized according to the connection order of the voltage multiplier capacitor stages to establish an interstage hysteresis correlation sequence.

[0013] As a further aspect of the present invention, the multi-stage series rectification operation adjustment and protection control sequence is jointly determined by the diode voltage bearing control priority, the voltage equalization anomaly level, and the inter-stage response hysteresis, specifically including: Read the diode voltage control priority mapping table, extract the diode identifier, series position and voltage control priority, arrange the diode records according to the series position, arrange the monitoring items according to the voltage control priority at the same series position, establish the correspondence between diode identifier, series position, voltage equalization node identifier, rectifier branch identifier and voltage multiplier capacitor stage identifier, and generate a diode monitoring candidate sequence; Based on the diode monitoring candidate sequence, the voltage equalization anomaly level in the leakage current retention node classification table is read, the voltage equalization anomaly level is compared with the preset limit level, the voltage equalization node that reaches the preset limit level is marked as the limit node, the associated diode and rectifier branch are listed as priority control objects, and the associated limit node and inter-stage hysteresis association sequence are identified according to the voltage multiplier capacitor level to obtain the priority control object association sequence. The priority control object association sequence and diode monitoring candidate sequence are invoked. The monitoring sequence and protection response sequence of the rectifier branch are determined according to the pressure control priority. The key control interval is determined according to the inter-stage response hysteresis and AC input stage. When the operation sequence reaches the key control interval, the AC excitation source adjustment timing is determined. When the equalization anomaly level reaches the protection condition, the protection trigger timing is determined. A multi-stage series rectifier operation adjustment and protection control sequence is established.

[0014] The beneficial effects of the technical solutions provided in the embodiments of the present invention include at least the following: This invention identifies continuously high-voltage and change-sensitive devices by associating the diode reverse voltage with the AC input stage, series position, and sampling timing, dividing the voltage trend segment, and determining the control priority. Combined with the continuous abnormal leakage current classification of the voltage equalization node, potential imbalance nodes can be located. By matching the potential difference trend between voltage multiplier capacitor stages, the response hysteresis can be obtained, and the voltage, leakage current, and inter-stage hysteresis relationship can be associated to form a monitoring, protection, and adjustment sequence, improving the accuracy of anomaly location and the timeliness of protection, and reducing local overvoltage and risk spread. Attached Figure Description

[0015] Figure 1 This is a flowchart of the method of the present invention; Figure 2 This is a flowchart illustrating the formation of the reverse voltage trend segment distribution table of the present invention. Figure 3 This is a flowchart illustrating the generation process of the diode voltage bearing control priority mapping table of the present invention. Figure 4 This is a flowchart illustrating the process of obtaining the leakage current retention node classification table of the present invention. Figure 5 This is a flowchart illustrating the establishment of the inter-level hysteresis correlation sequence of the present invention. Figure 6 This is a flowchart illustrating the acquisition of the multi-stage series rectification operation adjustment and protection control sequence of the present invention. Detailed Implementation

[0016] The technical solution of the present invention will now be described with reference to the accompanying drawings.

[0017] To make the technical problems, technical solutions and advantages of the present invention clearer, a detailed description will be given below in conjunction with the accompanying drawings and specific embodiments.

[0018] Please see Figure 1 This invention provides a technical solution: a multi-stage low-voltage diode series rectification control method for a cryo-electron microscope high-voltage chamber, applied to a cryo-electron microscope high-voltage chamber including an AC excitation source and multiple cascaded voltage multiplier units; each voltage multiplier unit includes a voltage multiplier capacitor and a rectifier branch, the rectifier branch being composed of multiple low-voltage diodes connected in series, and a voltage equalization resistor connected in parallel across each low-voltage diode to form a voltage equalization unit corresponding to each low-voltage diode, comprising the following steps: Acquire the reverse voltage readings and AC input waveform voltage readings of each diode in the series silicon diode array. Match the two types of voltage readings according to the sampling time. Identify the AC input stage based on the AC input waveform voltage reading. Determine the series position according to the connection order of the diodes in the rectifier branch. Arrange the reverse voltage readings according to the diode identification and series position to form a reverse voltage sequence. Compare the reverse voltage readings at adjacent sampling times to identify the reverse voltage change trend. Divide the sampling range that continuously maintains the same reverse voltage change trend into reverse voltage trend segments. Organize the reverse voltage trend segments according to the diode identification, series position, and AC input stage to obtain a reverse voltage trend segment distribution table. Based on the reverse voltage trend segment distribution table, the reverse voltage trend segments of different diodes are aligned according to the sampling range and AC input stage. The reverse voltage trend segments in the same sampling range and the same AC input stage are divided into voltage bearing comparison segments. The voltage bearing control priority is determined based on the reverse voltage readings and reverse voltage change trends of each diode in the voltage bearing comparison segment. The correspondence between diode identification, series position and reverse voltage trend segment is sorted according to the voltage bearing control priority to obtain the diode voltage bearing control priority mapping table. Obtain the connection configuration of the voltage equalization resistor network, divide each diode and parallel voltage equalization resistor into voltage equalization units, and configure voltage equalization node identifiers according to the connection position of the voltage equalization unit in the rectifier branch. Collect the leakage current readings of each voltage equalization node, and form a leakage current sequence according to the voltage equalization node identifier and sampling time. Compare the leakage current readings with the normal leakage current range, mark normal sampling points and abnormal sampling points, identify continuous abnormal sampling points according to the sampling order, divide the continuous abnormal sampling points into leakage current retention sections, record the start position, end position and continuous range of the leakage current retention section, determine the voltage equalization anomaly level according to the continuous range of the leakage current retention section, and organize the leakage current retention section and voltage equalization anomaly level according to the voltage equalization node identifier to obtain the leakage current retention node classification table. Acquire the potential difference sampling values ​​at each voltage multiplier capacitor connection position, configure the voltage multiplier capacitor stage identifier according to the connection order from AC input terminal to DC high voltage output terminal, and form a potential difference time series. Compare the potential difference sampling values ​​at adjacent sampling times to identify the potential difference change trend. Align the potential difference time series of adjacent voltage multiplier capacitor stages with the AC input stage in the reverse voltage trend segment distribution table. Using the previous stage potential difference time series as the reference, shift the subsequent stage potential difference time series point by point starting from the unshifted position, record each shift position, form a shift position set, compare the potential difference change trend of the corresponding sampling points at each shift position, mark the matching sampling points and divide the matching segments, count the number of matching sampling points corresponding to each shift position and arrange the shift positions, determine the first position as the target shift position, determine the target shift position as the interstage response hysteresis of the subsequent stage voltage multiplier capacitor relative to the previous stage voltage multiplier capacitor, organize the interstage response hysteresis according to the connection order of the voltage multiplier capacitor stages, and obtain the interstage hysteresis correlation sequence. The diode voltage bearing control priority mapping table is read, and a diode monitoring candidate sequence is formed according to the series position and voltage bearing control priority. The correspondence between diode identifier, series position, voltage equalization node identifier, rectifier branch identifier, and voltage multiplier capacitor level identifier is established. The voltage equalization anomaly level in the leakage current retention node classification table is read, and the limiting node is marked. The diode and rectifier branch are associated as priority control objects. The diode monitoring candidate sequence, limiting node, and inter-stage response lag association sequence are associated according to the voltage multiplier capacitor level identifier. The rectifier branch monitoring sequence, protection response sequence, and key control interval are determined. Based on this, the AC excitation source adjustment timing and protection trigger timing are determined, and a multi-stage series rectifier operation adjustment and protection control sequence is obtained.

[0019] Example 1: This example provides a method for generating a reverse voltage trend segment distribution table. Please refer to [link / reference]. Figure 2 Specifically, it includes: Obtain the reverse voltage readings and AC input waveform voltage readings of each diode in the series silicon diode array. According to the two types of voltage readings corresponding to the sampling time, divide the AC input stage according to the AC input waveform voltage direction and change state, record the stage identifier corresponding to each sampling time, and obtain the AC input stage sequence. Establish a unified time base between the output terminal of the AC excitation source of the high-voltage box and the sampling synchronization terminal. Connect an isolated high-voltage differential voltage probe to the AC input terminal. The rated measurement range of the differential voltage probe should be no less than [missing information]. Bandwidth not less than Input impedance not lower than The probe output is connected to a multi-channel synchronous analog-to-digital converter. Each channel of the analog-to-digital converter uses the same hardware trigger signal, and the sampling interval is set to [value missing]. At each sampling moment, the AC input waveform reading and the reverse voltage reading of each series-connected silicon diode are acquired synchronously, and the sampling window is set to one complete AC cycle. Corresponding to power frequency An AC excitation source writes a time stamp at each sampling moment. For AC input waveform readings, the current reading is read first. and the reading at the next time step ,in, Indicates the first AC input waveform voltage at each sampling time, Indicates the first Calculate the AC input waveform voltage at each sampling time and the AC voltage change between adjacent sampling times. ,in, Indicates the first Change in AC input voltage within each sampling interval The dimensions are The current reading is greater than zero and The time is recorded as a positive upward phase, and the current reading is greater than zero and The time is recorded as a positive downward phase, and the current reading is less than zero and The time is recorded as a negative decreasing phase, and the current reading is less than zero and The current reading is not greater than the negative recovery phase. The registration period is at the zero-crossing stage. Continuous data acquisition based on the input voltage probe in a zero-input state The maximum absolute noise obtained at each point Round up to confirm. At that time, read , and Read Substituting into the equation yields... It is registered as being in a positive upward phase. Read ,exist Read Substituting into the equation yields... If the current reading is positive and the change is in a positive downward phase, it is registered as a positive downward phase. to Between these phases, the identifier of the previous valid phase continues. If the previous valid phase does not exist, it is marked as a zero-crossing phase. Each phase identifier is written into the AC input phase sequence at the same time.

[0020] Based on the AC input stage sequence, the series position is determined according to the connection order of the diodes in the rectifier branch. The diode identification, series position, sampling time, AC input stage and reverse voltage reading are associated one by one. The readings corresponding to the same sampling time are arranged according to the series position, and the readings corresponding to the same diode are arranged according to the sampling order. The corresponding state between the diode identification and the series position is checked to generate the reverse voltage sequence. According to the connection sequence from the AC input terminal to the DC high voltage output terminal in the rectifier branch wiring diagram, the four series-connected silicon diodes are numbered sequentially as follows: , , , And assign them to the serial positions respectively. , , , The reverse voltage of each diode is acquired using an isolated high-voltage differential voltage probe. The positive and negative input terminals of the probe are connected to the cathode and anode of the diode under test, respectively. The voltage reading output from the acquisition channel is used as the reverse voltage reading after polarity correction. The time stamp of the reverse voltage sampling channel and the time stamp of the AC input sampling channel share the same sampling counter. The diode identification, series position, sampling time, AC input stage indicator, and reverse voltage reading are written into the same sampling record. At that moment, the AC input voltage was And the stage is marked as a positive upward stage, of , of , of , of according to to Arrange them in sequence, and then target the same diode. to The readings are arranged in ascending order of sampling time. Each item is checked to verify the series connection of the same diode identifier. In all records, Only related Records are retained in time, and if a record appears and If the combination of these is true, the record is marked as a location conflict record. The acquisition channel number and terminal connection log of this record are then read. The acquisition channel number and... Correspondingly, the serial position is rewritten as When the acquisition channel number cannot correspond to any terminal connection ledger, the record is marked as invalid and no subsequent trend calculation is entered. Then, continuous time reading columns are formed according to diode identification, and horizontal reading columns at the same time are formed according to series position. The two arrangement results are associated with the same time identifier to obtain a reverse voltage sequence that can query diode position, input stage and reverse voltage reading.

[0021] Call the reverse voltage sequence and AC input stage sequence, compare the reverse voltage readings of the same diode at adjacent sampling times, identify the reverse voltage change trend, divide the sampling range that continuously maintains the same reverse voltage change trend into reverse voltage trend segments, record the start and end times and trend status of each segment, and collect and arrange the segment records according to diode identification, series position and AC input stage to obtain the reverse voltage trend segment distribution table. Call the continuous-time reading series of the same diode, and sequentially take the reverse voltage readings at two adjacent sampling times and calculate. ,in, Indicates the first Only diode in the first Reverse voltage readings at each sampling time. Indicates the first Only diode in the first Reverse voltage readings at each sampling time. Indicates the first The change in reverse voltage between adjacent sampling times of the diode. Pick to , The sample numbers are arranged in ascending order of time. and The dimensions of all are The result will be greater than Adjacent sampling intervals are registered as an upward trend, and results smaller than [the specified value] are recorded. The adjacent sampling intervals are registered as a downward trend, and the results are in to The adjacent sampling intervals are registered as having a flat trend. The trend dividing line is determined by the rated AC input. Ambient temperature Next continuous acquisition The maximum positive fluctuation was obtained from the steady-state readings. The maximum negative fluctuation is Therefore, the boundary is set as follows. ,against exist , , readings , , Substituting into the equation yields... and All were registered as showing an upward trend, targeting to readings , , ,get and The trends are recorded as flat and downward respectively. If there is an invalid record, missing reading or discontinuous sampling time in the adjacent sampling records of the same diode, the change is not calculated across the record. The two sides of the invalid record are used as the trend segment boundary. The time records of the same trend are merged and written into the segment start time, segment end time, trend status and AC input stage identifier. They are collected according to diode identifier and series position to obtain the reverse voltage trend segment distribution table.

[0022] Example 2: This example provides a method for determining diode voltage bearing control priority based on a reverse voltage trend segment distribution table. Please refer to [link / reference]. Figure 3 Specifically, it includes: Read the reverse voltage trend segment distribution table, arrange the reverse voltage trend segments of different diodes according to the sampling range and AC input stage, determine whether the sampling range of each reverse voltage trend segment overlaps and whether the AC input stage is consistent, and group the reverse voltage trend segments in the same sampling range and the same AC input stage into the same segment to obtain the voltage comparison segment sequence. Read the start time, end time, and AC input stage identifier from the reverse voltage trend segment distribution table. Arrange the trend segments of different diodes from earliest to latest according to their start time. Check each trend segment to see if there is a common sampling time within its time range, and check if the AC input stages associated with the same sampling time are consistent. , , , exist to When all four records correspond to the positive upward phase, they are categorized into the pressure comparison section. ,when The trend segment is to , The trend segment is to , The trend segment is to , The trend segment is to When all phase identifiers are in a positive downward phase, they will be covered together. to Classified as a pressure comparison zone The start time of the shared time range is taken as the latest time among the start times of the participating comparison segments, and the end time of the shared time range is taken as the earliest time among the end times of the participating comparison segments. Records that cannot simultaneously satisfy time overlap and stage consistency are retained in the original trend segment and not written to the pressure comparison segment. If the stage identifiers of different diodes are inconsistent at the same time, they are split into different candidate groups according to the stage identifier. The same group pressure ranking is not performed on different candidate groups. For each pressure comparison segment, the segment identifier, sampling range, AC input stage, diode identifier, series position, reverse voltage reading, and trend status are written in sequence. Chinese records - - , - - , - - , - - The readings of each diode are continuously replenished according to the sampling time to form a voltage comparison segment sequence.

[0023] Based on the pressure comparison segment sequence, the reverse voltage readings and reverse voltage change trends of diodes within each pressure comparison segment are retrieved. The diodes are arranged in descending order of reverse voltage readings. When the readings are the same, they are arranged in ascending, flat, and descending order. The pressure control priority is determined according to the arrangement order. Specifically, the process of selecting diodes with the same reverse voltage reading within the same pressure comparison segment, reading the reverse voltage change trend of each diode, determining the diode with an ascending reverse voltage change trend as the first pressure control priority, determining the diode with a flat reverse voltage change trend as the second pressure control priority, and determining the diode with a descending reverse voltage change trend as the third pressure control priority, generates a pressure control priority sequence. Within each pressure comparison section, read the diode reverse voltage reading at the same sampling time, arrange the readings in descending order of value, and calculate the difference between adjacent readings. ,in, Indicates the first in the sequence Only diode in the first Reverse voltage readings at each sampling time. Indicates the number of adjacent elements. The reverse voltage readings of only the diodes at the same time. This represents the reverse voltage difference between the two diodes at the same moment. and All are diode serial numbers and their values ​​range from [value range missing]. to , The dimensions are The absolute value of the difference is greater than The values ​​are arranged in chronological order according to their positions, and the absolute value of the difference is no greater than [missing value]. Then read the corresponding diode reverse voltage change trend, in of time, The reading is , The reading is Substituting into the equation yields... , Ranked Ahead, and The difference in readings is , Ranked Ahead, if at the same time and All read Then read The trend of stagnation and The upward trend will Ranked ahead, if Read the same thing And if the trend is downward, then... Following the records of flat trends, upward trends within the same reading set are assigned the first pressure control priority, flat trends the second, and downward trends the third. If readings differ, all positions are assigned consecutive priorities starting from the first position. If readings are identical and trend states are the same, they are arranged in series from the AC input to the DC high-voltage output. of The records are obtained sequentially Priority 1 Priority 2 Priority 3 It is a pressure control priority sequence with priority 4.

[0024] Based on the pressure control priority sequence, the diode identifier, series position and reverse voltage trend section in the pressure comparison section sequence are associated. The corresponding relationships of each item are sorted according to the pressure control priority, and the records of the same diode are arranged according to the sampling order to establish a diode pressure control priority mapping table. Based on the pressure control priority sequence, each priority record is sequentially connected with the diode identifier, series position, start and end times of the reverse voltage trend segment, AC input stage, and trend status in its respective pressure comparison segment. Lieutenant General , , , The positive upward phase, upward trend, and priority 1 are written into the same mapping record. , , , The positive upward phase, upward trend, and priority 2 are written into another mapping record. and The corresponding items are written sequentially according to priority 3 and priority 4. For the records of the same diode in different voltage comparison sections, they are first arranged according to the start time of the section, and then arranged according to the sampling time within the same section. exist Chinese correspondence to Priority 1 record, in Chinese correspondence to When recording a priority 1 or priority 2 record, Records placed Before recording, if different segment identifiers appear at the same time, the records are distinguished and retained separately by the AC input stage identifier. A unique diode identifier and series position combination are retained for each record in the mapping table. (Check...) to Are they stably associated separately? to If any field in the mapping record, such as diode identifier, series position, or pressure comparison section identifier, is empty, it is marked as an incomplete mapping record and no further operations are entered. After the check is completed, all valid mapping records are arranged in order of diode identifier as the retrieval order and sampling time as the secondary order to form a diode pressure control priority mapping table.

[0025] Example 3: This example provides a method for identifying and classifying abnormal leakage current at voltage equalization nodes. Please refer to [link / reference needed]. Figure 4 Specifically, it includes: Obtain the connection configuration of the voltage equalization resistor network, divide each diode and parallel voltage equalization resistor into voltage equalization units, configure voltage equalization node identifiers according to the connection position of the voltage equalization unit in the rectifier branch, associate diode identifiers, voltage equalization resistors and voltage equalization node identifiers, arrange each voltage equalization node according to the AC input terminal to the DC high voltage output terminal, and obtain the voltage equalization node position sequence. Read the connection configuration of the voltage equalizing resistor network, and write the voltage equalizing resistor connected in parallel across each series silicon diode into the corresponding diode's connection record. For the four series diodes, and , and , and , and They are respectively assigned to the equalization unit. , , , The nominal resistance value of each equalizing resistor is set as follows: Rated power is set to And before assembly, use an insulation resistance tester to test... The actual resistance value is collected under DC test voltage, and the actual resistance value is within... to The resistor value is written into the connection configuration, and the actual resistance value is used in the leakage current calculation. In the rectifier branch, voltage equalization units are arranged sequentially from the AC input terminal to the DC high voltage output terminal. , , , The four equalizing nodes are identified. - - - - , - - - - , - - - - , - - - - Write the node location record, and check item by item whether each node identifier corresponds to a single diode identifier and a single voltage equalizing resistor identifier. If... Only related and If the same node identifier is associated with multiple nodes, the connection record will be retained. and Then, reconfirm the connection positions according to the actual wiring terminals and correct the records, recording all node positions as follows: to The nodes are arranged in order, and the position records of each node are connected with the diode identifier and series position in the aforementioned diode pressure control priority mapping table to form a sequence of equalizing node positions that can be retrieved together for subsequent leakage current readings, abnormal levels and pressure control priorities.

[0026] Based on the voltage equalization node location sequence, the leakage current readings of each voltage equalization node are collected. The voltage equalization node identifier, sampling time and leakage current reading are associated one by one. The records corresponding to the same voltage equalization node are arranged according to the sampling order. The leakage current readings are compared with the normal leakage current range obtained. Normal sampling points and abnormal sampling points are marked respectively to generate a leakage current state sequence. Based on the sequence of voltage equalization node locations, the potential difference across each voltage equalization resistor is synchronously read. Isolated high-voltage differential voltage probes with the same time reference are connected to both ends of the voltage equalization resistors. The probe output is connected to a multi-channel synchronous analog-to-digital converter. The node identifier, sampling time, actual resistance value, and potential difference reading are written into the same record. Then, the leakage current is calculated according to Ohm's law. ,in, Indicates the equalizing node In the Leakage current reading at each sampling time, in units of , Indicates the equalizing node The corresponding voltage equalizing resistors are at the first Potential difference at each sampling time, in units of , Indicates the equalizing node The measured resistance value of the corresponding voltage equalizing resistor, in units of After the units of voltage and resistance are unified, The dimensions are ,against Related ,exist The potential difference between the two ends is obtained as follows ,Will Converted to , and then Divide by ,get Converted to ,exist , , , Read separately , , , , corresponding to , , , All leakage current readings at the same node are arranged in ascending order of sampling time. The normal leakage current range is based on the rated input. Ambient temperature relative humidity The 30 readings obtained under the given conditions were determined, with the lowest reading being... The highest reading is Set the lower boundary to Set the upper boundary to When the reading is within the range, it is marked as a normal sampling point. When the reading is less than the lower boundary or greater than the upper boundary, it is marked as an abnormal sampling point. If the differential voltage probe channel exceeds the range, outputs saturate, or the sampling value is missing, then that moment is marked as an invalid sampling point. Invalid sampling points are not marked as normal or abnormal sampling points, nor are they connected to adjacent abnormal sampling points to form the same stagnation segment. Normal, abnormal, or invalid sampling status identifiers are written in chronological order to form a leakage current status sequence.

[0027] The leakage current state sequence is invoked, and continuous abnormal sampling points are identified according to the sampling order. These continuous abnormal sampling points are divided into leakage current retention segments. The start position, end position, and continuous range of each leakage current retention segment are recorded, and the voltage equalization anomaly level is determined. Specifically, the sampling time corresponding to the first abnormal sampling point in each leakage current retention segment is determined as the start position, and the sampling time corresponding to the last abnormal sampling point in the continuous abnormal sampling points is determined as the end position. The continuous abnormal sampling points are then divided into leakage current retention segments. The number of abnormal sampling points determines the continuous range. The continuous range is compared with the preset first continuous range threshold and the preset second continuous range threshold respectively. The leakage current retention section that does not reach the preset first continuous range threshold is determined as the first voltage equalization anomaly level. The leakage current retention section that reaches the preset first continuous range threshold but does not reach the preset second continuous range threshold is determined as the second voltage equalization anomaly level. The leakage current retention section that reaches the preset second continuous range threshold is determined as the third voltage equalization anomaly level. The leakage current retention sections and voltage equalization anomaly levels are organized according to the voltage equalization node identifier to establish a leakage current retention node classification table. Read the leakage current state sequence of the same voltage equalization node, and check whether the abnormal state indicators are continuous from morning to night according to the sampling time. of to Read separately , , , , All five readings were greater than the upper limit of the normal range. ,Will As the starting point of the leakage current retention section, As the ending position, press Calculate the continuous range, where, Indicates the equalizing node The number of consecutive abnormal sampling points corresponding to the leakage current retention section, with a dimension of 1. This indicates the sequence number of the first abnormal sampling point in the affected section. This indicates the sequence number of the last abnormal sampling point in the retention section. Abnormal records, , ,get Invalid sampling points, normal sampling points, or adjacent sampling time intervals are not equal to All records are used as the end boundary of the current retention segment. Abnormal sampling points are not connected across this record. The first continuous range threshold is set to 2 points, and the second continuous range threshold is set to 5 points. The first continuous range threshold is determined based on the longest single abnormal record of 1 point in 30 rounds of data collection under no-connection abnormality conditions. The second continuous range threshold is based on the deviation of the equalizing resistor from its nominal resistance value. Based on the data collected over 30 rounds, the number of consecutive abnormal points was determined to be concentrated between 4 and 6. Records with a consecutive range of 1 point were marked as the first level of pressure equalization anomaly, records with a consecutive range of 2 to 4 points were marked as the second level of pressure equalization anomaly, and records with a consecutive range of at least 5 points were marked as the third level of pressure equalization anomaly. The continuous range of 5 points is marked as the third level of pressure anomaly. exist to Two consecutive abnormal sampling points were found, and they were marked as the second level of pressure equalization anomaly. No abnormal sampling points were found, and the result was recorded as "no abnormality level". The start and end positions, continuous range, and abnormality level of the stagnation section of each node were then recorded as follows: to Arrange and establish a classification table of leakage current retention nodes.

[0028] Example 4: This example provides a method for determining the response hysteresis between adjacent voltage multiplier capacitor stages based on a reverse voltage trend segment distribution table. Please refer to [link to example]. Figure 5 Specifically, it includes: Acquire the potential difference sampling value at each voltage multiplier capacitor connection position, configure the voltage multiplier capacitor level identifier according to the connection order from AC input terminal to DC high voltage output terminal, associate the voltage multiplier capacitor level identifier, sampling time and potential difference sampling value item by item, arrange the records of the same voltage multiplier capacitor level according to the sampling order, compare the potential difference sampling values ​​at adjacent sampling times, identify the potential difference change trend, and generate a potential difference time series. Read the potential difference at each connection point of the voltage multiplier capacitor, and apply voltage multiplier capacitors sequentially according to the cascade order from AC input to DC high voltage output. , , The capacitance level is indicated by a rated measurement range of not less than [specified value]. The isolated high-voltage differential voltage probe is connected to both ends of each voltage multiplier capacitor. The probe output is connected to a synchronous analog-to-digital converter. The capacitor level identifier, sampling time, and potential difference sampling value are written into the same record. All records for the same capacitor level are arranged in ascending order of sampling time. exist to Potential difference reading , , , , , , in sequence Calculate the change in potential difference, where, Indicates the first The voltage multiplier capacitor is in the first stage. The potential difference sampled value at each sampling time. Indicates the first The voltage multiplier capacitor is in the first stage. The potential difference sampled value at each sampling time. Indicates the first The change in potential difference between adjacent sampling times of the voltage multiplier capacitor. The voltage multiplier capacitor stage number and its value range is... to , This is the sampling sequence number; the dimensions of the three voltage quantities are all [missing information]. ,get , , , , greater than The result is written as an upward trend, less than The result is written as a downward trend, indicating a state of... to The results are written as a flat trend. If the sampling channel experiences over-range, output saturation, or missing readings, the record is marked as invalid and used as the boundary for time series segmentation. Adjacent sampling records are processed in the same way, and the potential difference trend status and sampling time are written together into the potential difference time series. Then, the AC input stage identifier at the same time is read from the reverse voltage trend segment distribution table. , , The trend records are associated with positive rise, positive fall, negative fall, negative rebound and zero crossing stages, respectively, forming a potential difference time series retrieved by capacitance level, time and AC input stage.

[0029] Based on the potential difference time series, the AC input stage in the reverse voltage trend segment distribution table is called, and the corresponding records of adjacent voltage doubler capacitor stages are aligned. Taking the previous stage potential difference time series as the benchmark, the next stage potential difference time series is shifted point by point from the unshifted position. Each shifted position is recorded to form a set of shifted positions. The potential difference change trend of the corresponding sampling points is compared, the matching sampling points are marked and the matching segments are divided to obtain the shifted matching number sequence. Selecting adjacent time series of the preceding and following potential differences, the capacitor of the preceding stage... Each sampling time is fixed as the reference position, and the subsequent capacitor is read. The trend record does not move point by point from the beginning of the translation position, with each move corresponding to a sampling point. Let the first Level capacitor and the first Level capacitor in translation The number of matched sampling points when there are sampling points is ,in, This indicates the stage number of the preceding voltage multiplier capacitor. This indicates the number of shifted sampling points in the subsequent potential difference time series relative to the previous potential difference time series. Indicates the translation position The number of valid sampling points that simultaneously satisfy the same AC input stage and the same potential difference change trend. The dimension is 1. After each shift, the AC input stage identifier and potential difference change trend of the two capacitor records are compared item by item. Only when the stage identifiers are the same, the trend states are the same, both records are not invalid, and there are corresponding sampling points at both time positions, are recorded as matched sampling points. If the stage identifiers are inconsistent, the trend states are inconsistent, either record is invalid, or the time position exceeds the limit, they are not counted as matched sampling points. When shifting to 0, among the 10 comparable sampling points, 5 sampling points are simultaneously in the same stage and have the same trend, and are registered. Register when shifted by 1 point Register when shifting 2 points. Register when shifting 3 points. The translation positions 0, 1, 2, 3 and their corresponding matching quantities 5, 7, 9, 6 are written into the translation position set one by one. and Using the same time-series shift operation, the number of matches for shifting points 0, 1, 2, and 3 are respectively denoted as: , , , Each record in the translation process retains the previous stage capacitor identifier, the next stage capacitor identifier, the number of moving sampling points, the translation time, the number of matching sampling points, and the start and end times of the matching segment, forming a translation matching quantity sequence.

[0030] Based on the translation matching number sequence, the number of matching sampling points corresponding to each translation position is counted. The translation positions are arranged from most to least according to the number of matching sampling points. The translation position corresponding to the first position in the arrangement is selected as the target translation position. The target translation position is determined as the interstage response hysteresis of the subsequent voltage multiplier capacitor relative to the previous voltage multiplier capacitor. The interstage response hysteresis of each stage is organized according to the connection order of the voltage multiplier capacitor stages to establish an interstage hysteresis correlation sequence. Read the translation position and the number of matching sampling points in the translation matching number sequence, arrange the translation positions of the same pair of adjacent voltage multiplier capacitors in order of the number of matching sampling points from most to least, and denote the target translation position as... ,in, Indicates the first The first voltage multiplier capacitor is relative to the second voltage multiplier capacitor. The target translation sampling point number of the voltage multiplier capacitor, dimensionless, is taken as satisfying... The translation position with the maximum number of matches in this group is taken as the target translation position. and A translation of 2 points corresponds to 9 matching sampling points, a translation of 1 point corresponds to 7 matching sampling points, a translation of 3 points corresponds to 6 matching sampling points, and a translation of 0 points corresponds to 5 matching sampling points. Positioning the translation of 2 points first, we write this position as the target translation position. The inter-level response lag is denoted as ,in, Indicates the first The first voltage multiplier capacitor is relative to the second voltage multiplier capacitor. The interstage response hysteresis of a multi-stage voltage multiplier capacitor, in units of , Indicates the sampling interval, in units of In this embodiment Substituting into the equation yields... ,against and A translation of 1 point corresponds to 8 matching sampling points, 6 points higher than a translation of 2 points, 5 points higher than a translation of 0 points, and 4 points higher than a translation of 3 points. The translation of 1 point is taken as the target translation position. Substituting into the equation yields... When filtering by translation position, if two translation positions have the same number of matches, the record with the smaller number of translation sampling points is selected first. If the number of translation sampling points is still the same, the record with the longer matching segment duration is selected. If the matching segment duration is still the same, the record that completed the translation comparison earlier is selected. to of and to of Arrange the capacitor stages according to their connection order to establish an interstage hysteresis correlation sequence.

[0031] Example 5: Based on the aforementioned reverse voltage trend analysis, voltage-bearing control priority determination, voltage equalization node anomaly classification, and inter-stage response hysteresis analysis results, this example provides a method for establishing a multi-stage series rectifier operation regulation and protection control sequence. Please refer to [link to example]. Figure 6 Specifically, it includes: Read the diode voltage control priority mapping table, extract the diode identifier, series position and voltage control priority, arrange the diode records according to the series position, arrange the monitoring items according to the voltage control priority at the same series position, establish the correspondence between diode identifier, series position, voltage equalization node identifier, rectifier branch identifier and voltage multiplier capacitor stage identifier, and generate a diode monitoring candidate sequence; Read the diode voltage control priority mapping table, extract the diode identifier, series position, and voltage control priority from each mapping record to the monitoring record, and sort the monitoring records first by series position. , , , When multiple pressure records exist at the same series connection point, they are arranged in ascending order of pressure control priority value, with the record having the lowest priority value listed first. exist When a position acquires priority 1, it is written before other priority records at the same position. Then, the voltage equalization node position sequence is called to establish the corresponding records between diode identifiers, series positions, voltage equalization node identifiers, rectifier branch identifiers, and voltage multiplier capacitor stage identifiers. - - - - , - - - - , - - - - , - - - - Write the candidate sequence and rectifier branch identifier respectively. and Determined based on the actual wiring diagram of the high-voltage box voltage multiplier unit. Corresponding to the preceding rectifier branch, Corresponding to the subsequent rectifier branch, the voltage multiplier capacitor stage is marked. and Calling based on capacitor location identifiers, checking if the diode identifier in each candidate record simultaneously corresponds to a unique series position and voltage equalization node identifier, and checking if each voltage equalization node belongs to only one rectifier branch and one voltage multiplier capacitor stage. If any field contains a null value, the same diode is associated with multiple nodes, or the same node is associated with multiple rectifier branches, then it is marked as an associated conflict record. of , , , Write other diode records into the same monitoring candidate as priority 1, and continue to write them in order of position and priority to form a diode monitoring candidate sequence.

[0032] Based on the diode monitoring candidate sequence, the voltage equalization anomaly level in the leakage current retention node classification table is read. The voltage equalization anomaly level is compared with the preset limit level. The voltage equalization node that reaches the preset limit level is marked as the limit node. The associated diode and rectifier branch are listed as priority control objects. The associated limit node and inter-stage hysteresis association sequence are identified according to the voltage multiplier capacitor level to obtain the priority control object association sequence. Read the voltage equalization node identifier from the diode monitoring candidate sequence, and extract the voltage equalization anomaly level and continuous range from the leakage current retention node classification table according to the node identifier. Determine the preset limit level as the third voltage equalization anomaly level. This limit level corresponds to a continuous range of at least 5 anomaly sampling points. The record reads five consecutive points and the third abnormal pressure level. This abnormal level is then compared with the preset limit level. If the results match, [the record is executed]. Mark as a restricted node, and associate with and rectifier branch Write the priority control object record, in The record reads two consecutive points and the second level of pressure equalization anomaly. This level is lower than the third level of pressure equalization anomaly and is only retained as a monitoring candidate. If no anomaly level is found in the record, it is not written to the restricted node record. If a node record shows invalid acquisition or an anomaly level field is empty, the node is not marked as a restricted node, but its invalid acquisition status is retained and it is reread in the next sampling period. After the restricted nodes are associated, the inter-level hysteresis association sequence is read according to the capacitance level identifier in the priority control object. - - Corresponding capacitor level Read the previous level to Interstage response hysteresis and read to Interstage response hysteresis The limiting node, associated diode, rectifier branch, capacitor stage, voltage-bearing control priority, and inter-stage response hysteresis are written into the priority control object association sequence in capacitor stage order.

[0033] Call the priority control object association sequence and diode monitoring candidate sequence, determine the rectifier branch monitoring sequence and protection response sequence according to the pressure control priority, determine the key control interval according to the inter-stage response hysteresis and AC input stage, determine the AC excitation source adjustment timing when the running sequence reaches the key control interval, determine the protection trigger timing when the equalization anomaly level reaches the protection condition, and establish a multi-stage series rectifier operation adjustment and protection control sequence. The system calls up the priority control object association sequence and diode monitoring candidate sequence, first arranging the associated diodes in ascending order of voltage control priority value, and then collecting the monitoring records according to the corresponding rectifier branch. The pressure control priority is 1 and the associated limit node is... rectifier branch Write it as the first monitoring order and the first protection response order. , , Write them into the subsequent monitoring sequence according to their priority and anomaly level. Associated voltage multiplier capacitor stage With the preamp to Response hysteresis Alignment, read the starting sampling time of the positive rising phase. At the same time, the start time of the key control interval is marked as ,in, Indicates the start sampling time of the AC input phase. Indicates the start time of the key control zone. express to Inter-stage response lag, the units of the three time quantities are all Substitute and Calculations yielded ,Will Until the next sampling time Classified as The key control interval is defined. When the runtime enters this interval and the input phase changes from positive upward to positive downward, the AC excitation source adjustment timing is written. When the number of consecutive abnormal sampling points reaches the 5th point, the corresponding time is read. exist Upon reaching the 5th consecutive abnormal sampling point, this moment is written into the protection trigger timing. The AC excitation source adjustment outputs a pre-calibrated reduction command to the amplitude setting terminal of the AC excitation source through the controller. The protection trigger outputs a shutdown command to the high-voltage enable terminal through the controller. If the limit level is not reached within the key control range, only the monitoring record is retained and no shutdown command is output. If the invalid sampling state reaches 2 consecutive sampling points, the corresponding rectifier branch is placed in the pending verification state and the priority update of the branch is stopped. The rectifier branch monitoring sequence, protection response sequence, key control range, AC excitation source adjustment timing, and protection trigger timing are written into the multi-level series rectifier operation adjustment and protection control sequence in the order of operation time.

[0034] The above are merely specific embodiments of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A method for controlling a multi-stage low-voltage diode series rectification in a cryo-electron microscope high-voltage chamber, characterized in that, Includes the following steps: Collect the reverse voltage and AC input waveform voltage of each series diode, identify the two types of voltage according to the sampling time and the AC input stage, generate the reverse voltage sequence according to the diode identification and series position, and divide the reverse voltage trend segment according to the change of adjacent reverse readings to form a reverse voltage trend segment distribution table. Read the reverse voltage trend segment distribution table, align the reverse voltage trend segments according to the sampling range and AC input stage, divide the voltage bearing comparison segment, determine the voltage bearing control priority by combining the reverse voltage reading and the reverse voltage change trend, and generate a diode voltage bearing control priority mapping table. Obtain the voltage equalization resistor network connection configuration, divide the diodes and parallel voltage equalization resistors into voltage equalization units and configure node identifiers, collect the leakage current readings of the corresponding nodes, mark abnormal sampling points, divide continuous abnormal sampling points to form leakage current retention sections and determine the voltage equalization anomaly level, and generate a leakage current retention node classification table. Collect potential difference sampling values ​​at the connection positions of each voltage multiplier capacitor and form a potential difference time series. Align adjacent capacitor stages according to the AC input stage, shift the potential difference time series of the next stage point by point, record the shift position, compare the potential difference change trend and count the number of matching points, determine the target shift position, and generate an interstage hysteresis correlation sequence. Based on the voltage control priority and series position in the diode voltage control priority mapping table, a candidate sequence for diode monitoring is formed. The voltage equalization anomaly level in the leakage current retention node classification table is read and the limiting node is marked. The monitoring sequence and protection response sequence of the rectifier branch are determined by combining the inter-stage hysteresis correlation sequence. The key control interval is determined based on the target translation position and AC input stage, and a multi-stage series rectifier operation adjustment and protection control sequence is generated.

2. The multi-stage low-voltage diode series rectification control method for a cryo-electron microscope high-voltage chamber according to claim 1, characterized in that, The reverse voltage trend segment distribution table is generated in the following manner: Obtain the reverse voltage readings and AC input waveform voltage readings of each diode in the series silicon diode array. According to the two types of voltage readings corresponding to the sampling time, divide the AC input stage according to the AC input waveform voltage direction and change state, record the stage identifier corresponding to each sampling time, and obtain the AC input stage sequence. Based on the AC input stage sequence, the series position is determined according to the connection order of the diodes in the rectifier branch. The diode identification, series position, sampling time, AC input stage and reverse voltage reading are associated one by one. The readings corresponding to the same sampling time are arranged according to the series position, and the readings corresponding to the same diode are arranged according to the sampling order. The corresponding state between the diode identification and the series position is checked to generate the reverse voltage sequence. The reverse voltage sequence and AC input stage sequence are called up, and the reverse voltage readings at adjacent sampling times of the same diode are compared to identify the reverse voltage change trend. The sampling range that maintains the same reverse voltage change trend is divided into reverse voltage trend segments. The start and end times and trend status of each segment are recorded. The segment records are collected and arranged according to diode identification, series position and AC input stage to obtain the reverse voltage trend segment distribution table.

3. The multi-stage low-voltage diode series rectification control method for a cryo-electron microscope high-voltage chamber according to claim 1, characterized in that, The process of establishing the diode voltage bearing control priority mapping table includes: Read the reverse voltage trend segment distribution table, arrange the reverse voltage trend segments of different diodes according to the sampling range and AC input stage, determine whether the sampling range of each reverse voltage trend segment overlaps and whether the AC input stage is consistent, and group the reverse voltage trend segments in the same sampling range and the same AC input stage into the same segment to obtain the voltage comparison segment sequence. Based on the pressure comparison segment sequence, the diode reverse voltage readings and reverse voltage change trends within each pressure comparison segment are called up. The order of arrangement is determined according to the reverse voltage readings from largest to smallest. When the readings are the same, they are arranged in order of upward trend, flat trend and downward trend. The pressure control priority is determined according to the arrangement order, and a pressure control priority sequence is generated. Based on the pressure control priority sequence, the diode identifier, series position, and reverse voltage trend segment in the pressure comparison segment sequence are associated. The corresponding relationships of each item are sorted according to the pressure control priority, and the records of the same diode are arranged according to the sampling order to establish a diode pressure control priority mapping table.

4. The multi-stage low-voltage diode series rectification control method for a cryo-electron microscope high-voltage chamber according to claim 3, characterized in that, When the reverse voltage readings are the same, the process of determining the pressure-bearing control priority according to the reverse voltage change trend is as follows: Within the same voltage comparison range, diodes with the same reverse voltage reading are selected, and the reverse voltage change trend of each diode is read. Diodes with an upward reverse voltage change trend are determined as the first voltage control priority, diodes with a flat reverse voltage change trend are determined as the second voltage control priority, and diodes with a downward reverse voltage change trend are determined as the third voltage control priority.

5. The multi-stage low-voltage diode series rectification control method for a cryo-electron microscope high-voltage chamber according to claim 1, characterized in that, For abnormal leakage current in the voltage equalization resistor network, it is classified according to the location of the voltage equalization node, the leakage current state, and the duration of the abnormality, specifically including: Obtain the connection configuration of the voltage equalization resistor network, divide each diode and parallel voltage equalization resistor into voltage equalization units, configure voltage equalization node identifiers according to the connection position of the voltage equalization unit in the rectifier branch, associate diode identifiers, voltage equalization resistors and voltage equalization node identifiers, arrange each voltage equalization node according to the AC input terminal to the DC high voltage output terminal, and obtain the voltage equalization node position sequence. Based on the voltage equalization node location sequence, leakage current readings of each voltage equalization node are collected. The voltage equalization node identifier, sampling time and leakage current reading are associated one by one. The corresponding records of the same voltage equalization node are arranged according to the sampling order. The leakage current readings are compared with the normal leakage current range obtained. Normal sampling points and abnormal sampling points are marked respectively to generate a leakage current state sequence. The leakage current state sequence is invoked, and continuous abnormal sampling points are identified according to the sampling order. The continuous abnormal sampling points are divided into leakage current retention sections. The start position, end position and continuous range of each leakage current retention section are recorded, and the voltage equalization anomaly level is determined. The leakage current retention sections and voltage equalization anomaly levels are organized according to the voltage equalization node identifier, and a leakage current retention node classification table is established.

6. The multi-stage low-voltage diode series rectification control method for a cryo-electron microscope high-voltage chamber according to claim 5, characterized in that, The voltage equalization anomaly level is determined according to the continuous range of the leakage current retention section, specifically including: The sampling time corresponding to the first abnormal sampling point in each leakage current retention segment is determined as the starting position, and the sampling time corresponding to the last abnormal sampling point in the continuous abnormal sampling points is determined as the ending position. The continuous range is determined according to the number of continuous abnormal sampling points between the starting position and the ending position. The continuous range is compared with the preset first continuous range threshold and the preset second continuous range threshold respectively. The leakage current retention segment that does not reach the preset first continuous range threshold is determined as the first voltage equalization abnormal level, the leakage current retention segment that reaches the preset first continuous range threshold but does not reach the preset second continuous range threshold is determined as the second voltage equalization abnormal level, and the leakage current retention segment that reaches the preset second continuous range threshold is determined as the third voltage equalization abnormal level.

7. The multi-stage low-voltage diode series rectification control method for a cryo-electron microscope high-voltage chamber according to claim 1, characterized in that, The specific formation process of the inter-level hysteresis correlation sequence includes: Acquire the potential difference sampling value at each voltage multiplier capacitor connection position, configure the voltage multiplier capacitor level identifier according to the connection order from AC input terminal to DC high voltage output terminal, associate the voltage multiplier capacitor level identifier, sampling time and potential difference sampling value item by item, arrange the records of the same voltage multiplier capacitor level according to the sampling order, compare the potential difference sampling values ​​at adjacent sampling times, identify the potential difference change trend, and generate a potential difference time series. Based on the potential difference time series, the AC input stage in the reverse voltage trend segment distribution table is called, and the corresponding records of adjacent voltage doubler capacitor stages are aligned. Taking the previous stage potential difference time series as the reference, the next stage potential difference time series is shifted point by point from the unshifted position. Each shifted position is recorded to form a set of shifted positions. The potential difference change trend of the corresponding sampling points is compared, the matching sampling points are marked and the matching segments are divided to obtain the shifted matching number sequence. Based on the translation matching number sequence, the number of matching sampling points corresponding to each translation position is counted. The translation positions are arranged from most to least according to the number of matching sampling points. The translation position corresponding to the first position in the arrangement is selected as the target translation position. The target translation position is determined as the interstage response hysteresis of the subsequent voltage multiplier capacitor relative to the previous voltage multiplier capacitor. The interstage response hysteresis of each stage is organized according to the connection order of the voltage multiplier capacitor stages to establish an interstage hysteresis correlation sequence.

8. The multi-stage low-voltage diode series rectification control method for a cryo-electron microscope high-voltage chamber according to claim 1, characterized in that, The multi-stage series rectifier operation regulation and protection control sequence is jointly determined by the diode voltage bearing control priority, voltage equalization anomaly level, and inter-stage response hysteresis, specifically including: Read the diode voltage control priority mapping table, extract the diode identifier, series position and voltage control priority, arrange the diode records according to the series position, arrange the monitoring items according to the voltage control priority at the same series position, establish the correspondence between diode identifier, series position, voltage equalization node identifier, rectifier branch identifier and voltage multiplier capacitor stage identifier, and generate a diode monitoring candidate sequence; Based on the diode monitoring candidate sequence, the voltage equalization anomaly level in the leakage current retention node classification table is read, the voltage equalization anomaly level is compared with the preset limit level, the voltage equalization node that reaches the preset limit level is marked as the limit node, the associated diode and rectifier branch are listed as priority control objects, and the associated limit node and inter-stage hysteresis association sequence are identified according to the voltage multiplier capacitor level to obtain the priority control object association sequence. The priority control object association sequence and diode monitoring candidate sequence are invoked. The monitoring sequence and protection response sequence of the rectifier branch are determined according to the pressure control priority. The key control interval is determined according to the inter-stage response hysteresis and AC input stage. When the operation sequence reaches the key control interval, the AC excitation source adjustment timing is determined. When the equalization anomaly level reaches the protection condition, the protection trigger timing is determined. A multi-stage series rectifier operation adjustment and protection control sequence is established.

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