Method for manufacturing semiconductor structure, semiconductor structure and display device

Abstract

The application provides a preparation method of a semiconductor structure, a semiconductor structure and a display device. In the preparation method, the diameter of the first surface of the first conductive type semiconductor structure of different color light emitting devices prepared is different. The size of the first surface can regulate the surface size of the quantum well growth auxiliary layer for growing the quantum well layer, thereby realizing the regulation of the indium content in the quantum well layer. In this way, the integration of different color light emitting devices on a single substrate can be realized. Without using complex processes such as multiple bonding and mass transfer, the preparation process can be significantly simplified, and the process difficulty and the risk of defect introduction can be reduced. At the same time, the structure adopts a direct light emitting mode, which can effectively avoid the inherent defects such as low color conversion efficiency, insufficient light emitting stability, color gamut decay and poor reliability, thereby improving the light emitting efficiency, color consistency and working life of multi-color display.

Description

Technical Field

[0001] This application relates to the field of semiconductor device manufacturing technology, and more specifically, to a method for preparing a semiconductor structure, a semiconductor device, and a display device. Background Technology

[0002] The concept of near-eye microdisplays continues to gain momentum, and augmented reality (AR) glasses, a key carrier for the end-user experience, are placing increasingly stringent demands on the performance of microdisplay devices. Early microdisplay solutions mainly relied on organic light-emitting diode (Micro OLED) and liquid crystal display (LC) technologies. However, as outdoor applications of AR devices become increasingly common, insufficient brightness has gradually become a core bottleneck restricting the user experience.

[0003] To address this challenge, monolithic micro-light-emitting diodes (Micro LEDs) are considered a crucial development direction for overcoming the brightness bottleneck. In contrast, the brightness of Micro OLED and LC solutions is mostly limited to the thousands of nits, while Micro LEDs can easily surpass the 100,000 nit threshold. Furthermore, this technology demonstrates significant advantages in durability and adaptability to various scenarios. In the Micro LED field, InGaN-based devices initially only achieved monochromatic emission, but current research has shifted entirely to full-color emission. To achieve this goal, the industry has explored several technical routes, such as: using wavelength conversion materials like quantum dots to convert the emitted light from monolithic blue Micro LEDs into green or red light; constructing cascaded or stacked LED architectures to achieve multi-color emission; changing the emission wavelength by adjusting the geometry of nanopillars; and utilizing the influence of different crystal orientations on the indium doping amount to achieve color control. However, these methods typically involve complex device structures or fabrication processes, leading to difficulties in improving yield and high manufacturing costs. The market urgently needs simpler and more efficient structural solutions.

[0004] Another significant bottleneck lies in the fact that, limited by the crystal quality and epitaxial maturity of the InGaN material system in the red light region, existing red InGaN devices struggle to push the emission wavelength into the deep red region, and their color purity performance is also unsatisfactory. Therefore, how to synergistically improve the luminous efficiency and color saturation of Micro LED InGaN-based devices within the framework of monolithic full-color integration has become a crucial issue that urgently needs to be addressed. Summary of the Invention

[0005] In order to overcome the technical problems mentioned in the above background, this application provides a method for preparing a semiconductor structure, a semiconductor structure, and a display device to solve the above technical problems.

[0006] A first aspect of this application provides a method for fabricating a semiconductor structure, the method comprising: A substrate is provided, wherein the substrate includes a substrate, a buffer layer and a mask layer stacked together; A mask opening is formed on the mask layer to expose the buffer layer, and a first conductivity type semiconductor structure is formed on the substrate corresponding to the location of the mask opening. A quantum well growth auxiliary layer and a quantum well layer are sequentially fabricated on the side of the first conductivity type semiconductor structure that forms different color light-emitting devices away from the substrate. The first conductivity type semiconductor structure includes a first surface in contact with the substrate and a second surface in contact with the quantum well growth auxiliary layer. The larger the diameter of the first surface, the larger the diameter of the corresponding second surface. After completing the fabrication of the quantum well growth auxiliary layer and the quantum well layer on all the first conductivity type semiconductor structures, a second conductivity type semiconductor structure is simultaneously fabricated on the side of all quantum well layers away from the substrate. The first conductivity type semiconductor structure, the quantum well growth auxiliary layer, the quantum well layer and the second conductivity type semiconductor structure are stacked to form a light-emitting device. In the light-emitting devices with different emission colors, the diameter of each first surface is different. The larger the diameter of the first surface, the shorter the wavelength of the light emitted by the light-emitting device.

[0007] In one possible implementation, the light-emitting device includes a first light-emitting device, a second light-emitting device, and a third light-emitting device of different emission colors. The step of forming a mask opening on the mask layer to expose the buffer layer and forming a first conductivity type semiconductor structure on the substrate corresponding to the location of the mask opening includes: A first mask opening is made on the mask layer to expose the buffer layer; A first semiconductor material structure is formed in the region where the first mask opening is located by adjusting the first epitaxial growth parameters. A second mask opening is made on the mask layer to expose the buffer layer; A second semiconductor material structure is formed in the region where the second mask opening is located by adjusting the second epitaxial growth parameters; A third mask opening is formed on the mask layer to expose the buffer layer; A third semiconductor material structure is formed in the region where the third mask opening is located by adjusting the third epitaxial growth parameters. The first semiconductor material structure, the second semiconductor material structure and the third semiconductor material structure are conical, and the diameters of the first surfaces of the first semiconductor material structure, the second semiconductor material structure and the third semiconductor material structure are different. The first semiconductor material structure, the second semiconductor material structure, and the third semiconductor material structure are subjected to top-removal processing to obtain the first conductivity type semiconductor structure. The first conductivity type semiconductor structure obtained after top-removal processing of the first semiconductor material structure is used to form the first light-emitting device, the first conductivity type semiconductor structure obtained after top-removal processing of the second semiconductor material structure is used to form the second light-emitting device, and the first conductivity type semiconductor structure obtained after top-removal processing of the third semiconductor material structure is used to form the third light-emitting device.

[0008] In one possible implementation, the step of forming a second semiconductor material structure in the region where the second mask opening is located by adjusting the second epitaxial growth parameters includes: A first isolation layer covering the first semiconductor material structure is fabricated, and a second semiconductor material structure is formed in the region where the second mask opening is located by adjusting the second epitaxial growth parameters. The step of forming a third semiconductor material structure in the region where the second mask opening is located by adjusting the third epitaxial growth parameters includes: A second isolation layer is fabricated covering the first semiconductor material structure and the second semiconductor material structure, and a third semiconductor material structure is formed in the region where the second mask opening is located by adjusting the third epitaxial growth parameters.

[0009] In one possible implementation, before the step of removing tops from the first semiconductor material structure, the second semiconductor material structure, and the third semiconductor material structure to obtain the first conductivity type semiconductor structure, the method further includes: Remove the first isolation layer and the second isolation layer.

[0010] In one possible implementation, the wavelengths of the light emitted by the first light-emitting device, the second light-emitting device, and the third light-emitting device decrease sequentially; the first epitaxial growth parameters include a first growth time and a first gas flow rate; the second epitaxial growth parameters include a second growth time and a second gas flow rate; and the third epitaxial growth parameters include a third growth time and a third gas flow rate. The first growth time, the second growth time, and the third growth time increase sequentially, and / or the first gas flow rate, the second gas flow rate, and the third gas flow rate increase sequentially; In a direction perpendicular to the plane of the substrate, the heights of the first semiconductor material structure, the second semiconductor material structure, and the third semiconductor material structure increase sequentially.

[0011] In one possible implementation, the light-emitting device includes a first light-emitting device, a second light-emitting device, and a third light-emitting device of different emission colors. The step of forming a mask opening on the mask layer to expose the buffer layer and forming a first conductivity type semiconductor structure on the substrate corresponding to the location of the mask opening includes: A first mask opening, a second mask opening, and a third mask opening of different sizes are formed on the mask layer to expose the buffer layer, wherein the sizes of the first mask opening, the second mask opening, and the third mask opening increase sequentially. A first semiconductor material structure, a second semiconductor material structure, and a third semiconductor material structure are formed in the regions where the first mask opening, the second mask opening, and the third mask opening are located; wherein, the diameters of the first surfaces of the first semiconductor material structure, the second semiconductor material structure, and the third semiconductor material structure increase sequentially; and in the direction perpendicular to the plane of the substrate, the heights of the first semiconductor material structure, the second semiconductor material structure, and the third semiconductor material structure increase sequentially. The first semiconductor material structure, the second semiconductor material structure, and the third semiconductor material structure are subjected to top-removal processing to obtain the first conductivity type semiconductor structure.

[0012] In one possible implementation, the step of performing top-removal processing on the first semiconductor material structure, the second semiconductor material structure, and the third semiconductor material structure to obtain the first conductivity type semiconductor structure includes: A protective layer is fabricated at least around the first semiconductor material structure, the second semiconductor material structure, and the third semiconductor material structure using epitaxial growth and / or surface deposition, wherein the thickness of the protective layer is less than the height of the first semiconductor material structure in a direction perpendicular to the plane of the substrate. Using the side of the protective layer between adjacent semiconductor material structures away from the substrate as the cutoff surface, the first semiconductor material structure, the second semiconductor material structure, and the third semiconductor material structure are subjected to top removal processing to obtain a first conductivity type semiconductor structure located on the substrate.

[0013] A second aspect of this application also provides a semiconductor structure, the semiconductor structure including a substrate and a plurality of light-emitting devices of different light-emitting colors grown on the substrate; In the direction away from the substrate, each of the light-emitting devices includes a first conductivity type semiconductor structure, a quantum well growth auxiliary layer, a quantum well layer, and a second conductivity type semiconductor structure stacked together. The first conductivity type semiconductor structure includes a first surface in contact with the substrate and a second surface in contact with the quantum well growth auxiliary layer, wherein the larger the diameter of the first surface, the larger the diameter of the corresponding second surface; In light-emitting devices with different emitting colors, the diameters of the first surfaces are different. The larger the diameter of the first surface, the shorter the wavelength of the light emitted by the light-emitting device.

[0014] In one possible implementation, in light-emitting devices with different emitting colors, the thickness of each first conductivity type semiconductor structure is the same in the direction perpendicular to the plane of the substrate. In light-emitting devices with different emission colors, the diameter of the first surface ranges from 300 nanometers to 5000 nanometers.

[0015] In one possible implementation, the light-emitting device includes a first light-emitting device, a second light-emitting device, and a third light-emitting device with different light-emitting colors, wherein the wavelengths of the light emitted by the first light-emitting device, the second light-emitting device, and the third light-emitting device decrease sequentially. The diameter of the second surface of the first conductivity type semiconductor structure in the first light-emitting device, the second light-emitting device and the third light-emitting device increases sequentially; The indium content of the first conductivity type semiconductor structure in the first light-emitting device, the second light-emitting device, and the third light-emitting device is the same, or the indium content of the first conductivity type semiconductor structure in the first light-emitting device, the second light-emitting device, and the third light-emitting device decreases sequentially.

[0016] In one possible implementation, in light-emitting devices with different emission colors, the thickness of each quantum well growth auxiliary layer is the same in the direction perpendicular to the plane of the substrate. The quantum well growth auxiliary layer includes a third surface in contact with the quantum well layer; The diameter of the third surface of the quantum well growth auxiliary layer in the first light-emitting device, the second light-emitting device, and the third light-emitting device increases sequentially. The indium content on the third surface of the quantum well growth auxiliary layer in the first light-emitting device, the second light-emitting device, and the third light-emitting device decreases sequentially.

[0017] In one possible implementation, the indium content of the quantum well growth auxiliary layer in the first light-emitting device is greater than or equal to 5% and less than or equal to 20%. The indium content of the quantum well growth auxiliary layer in the second light-emitting device is greater than or equal to 5% and less than or equal to 15%. The indium content of the quantum well growth auxiliary layer in the third light-emitting device is greater than or equal to 1% and less than or equal to 10%.

[0018] In one possible implementation, in light-emitting devices with different emission colors, the thickness of each quantum well layer is the same in the direction perpendicular to the plane of the substrate. The thickness of the quantum well layer is 2 nanometers to 200 nanometers; The indium content of the quantum well layer in the first light-emitting device, the second light-emitting device, and the third light-emitting device decreases sequentially.

[0019] In one possible implementation, the indium content of the quantum well layer in the first light-emitting device is greater than or equal to 30% and less than or equal to 40%. The indium content of the quantum well layer in the second light-emitting device is greater than or equal to 18% and less than or equal to 25%. The indium content of the quantum well layer in the third light-emitting device is greater than or equal to 8% and less than or equal to 15%.

[0020] In one possible implementation, the substrate includes a substrate, a buffer layer, and a mask layer stacked together; The mask layer includes a mask opening that exposes the buffer layer. The mask opening includes a first mask opening corresponding to the first light-emitting device, a second mask opening corresponding to the second light-emitting device, and a third mask opening corresponding to the third light-emitting device. The first mask opening, the second mask opening, and the third mask opening have the same size, or the sizes of the first mask opening, the second mask opening, and the third mask opening increase sequentially.

[0021] In one possible implementation, adjacent first light-emitting devices, second light-emitting devices, and third light-emitting devices form a pixel unit; The first light-emitting device, the second light-emitting device, and the third light-emitting device are respectively a red light-emitting device, a green light-emitting device, and a blue light-emitting device.

[0022] In one possible implementation, the pixel unit includes a first light-emitting device, a second light-emitting device, and a third light-emitting device; In the pixel unit, the center line connecting the first light-emitting device, the second light-emitting device, and the third light-emitting device forms a triangle.

[0023] In one possible implementation, the pixel unit includes two first light-emitting devices, one second light-emitting device, and one third light-emitting device; In the pixel unit, the center line connecting the first light-emitting device, the second light-emitting device, and the third light-emitting device forms a quadrilateral; The two first light-emitting devices are located on the same side of the quadrilateral, or on the diagonal of the quadrilateral.

[0024] A second aspect of this application also provides a display device comprising a semiconductor structure prepared by a fabrication method provided in any possible implementation of the first aspect, or a semiconductor structure provided in any possible implementation of the second aspect.

[0025] This application provides a method for fabricating a semiconductor structure, the semiconductor structure itself, and a display device. In the semiconductor structure fabrication method, the diameters of the first surfaces on the first conductivity type semiconductor structures of different color light-emitting devices are different. The larger the diameter of the first surface, the shorter the wavelength of the light emitted by the corresponding light-emitting device. This allows for the integrated fabrication of different color light-emitting devices on a single substrate. It eliminates the need for complex processes such as multiple bonding and mass transfer, significantly simplifying the fabrication process and reducing the risk of process difficulty and defect introduction. Furthermore, this structure employs a direct light-emitting mode, effectively avoiding inherent defects such as low color conversion efficiency, insufficient luminous stability, color gamut attenuation, and poor reliability, thereby improving the luminous efficiency, color consistency, and lifespan of multi-color displays. Attached Figure Description

[0026] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings required in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0027] Figure 1 A schematic flowchart illustrating the semiconductor structure fabrication method provided in this embodiment is illustrated. Figure 2a and Figure 2b Example Figure 1 Corresponding process flow chart; Figure 3 An example of implementation is provided. Figure 1 A flowchart illustrating step S11. Figure 4 Example Figure 3 Corresponding process flow chart; Figure 5 An example of implementation is provided. Figure 1 A flowchart illustrating step S12; Figure 6a and Figure 6b Example Figure 5 Corresponding process flow chart; Figure 7 An example of implementation is provided. Figure 1 Another flowchart for step S12; Figure 8 Example Figure 7 Corresponding process flow chart; Figure 9 The example shows the process flow diagram corresponding to the top removal process; Figure 10 An example of implementation is provided. Figure 1 A flowchart illustrating step S13; Figure 11a and Figure 11b Example Figure 10 Corresponding process flow chart; Figure 12 An example of implementation is provided. Figure 1 A flowchart illustrating step S14; Figure 13 Example Figure 12 Corresponding process flow chart; Figure 14 This example illustrates one of the semiconductor structures prepared by the method for preparing the semiconductor structure provided in this embodiment; Figure 15 This example illustrates a second semiconductor structure prepared by the semiconductor structure preparation method provided in this embodiment; Figure 16 This embodiment illustrates one of the schematic diagrams showing the arrangement of different color light-emitting devices on a semiconductor structure. Figure 17 This example illustrates the second schematic diagram of the arrangement of different color light-emitting devices on the semiconductor structure provided in this embodiment; Figure 18 This example illustrates the third schematic diagram of the arrangement of different color light-emitting devices on the semiconductor structure provided in this embodiment.

[0028] Icons: 1-Semiconductor structure; 11-Substrate; 111-Substrate; 112-Buffer layer; 113-Mask layer; 1131-Mask opening; 1131a-First mask opening; 1131b-Second mask opening; 1131c-Third mask opening; 12-First conductivity type semiconductor structure; 121-Seed structure; 13-Quantum well growth auxiliary layer; 131-First quantum well growth auxiliary layer; 132-Second quantum well growth auxiliary layer; 133-Third quantum well growth auxiliary layer; 14-Quantum well layer; 141-First quantum well layer; 142-Second quantum well layer; 143-Third quantum well layer; 15-Second Conductivity type semiconductor structure; 16-protective layer; 171-first barrier layer; 172-second barrier layer; 173-third barrier layer; 1711-first window; 1712-second window; 1713-third window; 18-electron barrier layer; 10-light-emitting device; 10a-first light-emitting device; 10b-second light-emitting device; 10c-third light-emitting device; 20a-first semiconductor material structure; 20b-second semiconductor material structure; 20c-third semiconductor material structure; 301-first surface; 302-second surface; 303-third surface; 401-first isolation layer; 402-second isolation layer. Detailed Implementation

[0029] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0030] Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0031] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0032] In the description of this application, it should be noted that the terms "upper," "lower," etc., indicating the orientation or positional relationship are based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the product is in use. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on this application. In addition, the terms "first," "second," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0033] It should be noted that, where there is no conflict, different features in the embodiments of this application can be combined with each other.

[0034] To address the technical problems mentioned in the background section, the inventors have innovatively designed the following technical solutions, which will be described in detail below with reference to the accompanying drawings. It should be noted that the deficiencies in the solutions of related technologies are the result of the inventors' practical experience and careful research. Therefore, the discovery process of the aforementioned technical problems and the solutions proposed in the embodiments of this application below should be considered contributions made by the inventors during the invention process, and should not be construed as technical content known to those skilled in the art.

[0035] Please refer to Figure 1 , Figure 2a and Figure 2b , Figure 1 This embodiment illustrates a flowchart of a method for fabricating a semiconductor structure. Figure 2a and Figure 2b Example Figure 1 The corresponding process flow diagram is shown below. Figure 1 , Figure 2a and Figure 2b The method for fabricating the semiconductor structure provided in this embodiment will be described in detail. In this embodiment, the method for fabricating the semiconductor structure includes the following steps.

[0036] Step S11: Provide a substrate 11.

[0037] In this embodiment, the substrate 11 includes a substrate 111, a buffer layer 112, and a mask layer 113 stacked together.

[0038] The substrate 111 can be a silicon substrate or a sapphire substrate. The buffer layer 112 can be a single-layer structure or a multi-layer structure grown on the substrate 111. The buffer layer 112 is used to suppress dislocation propagation, release interface stress, and improve the lattice mismatch problem between the epitaxial material and the substrate 111.

[0039] The mask layer 113 is located on the side of the buffer layer 112 away from the substrate 111.

[0040] In step S12, a mask opening 1131 is formed on the mask layer 113 to expose the buffer layer 112, and a first conductivity type semiconductor structure 12 is formed on the substrate 11 in the corresponding location area of ​​the mask opening 1131.

[0041] The mask layer 113 includes a plurality of mask openings 1131 that expose the buffer layer 112. The area where the mask openings 1131 are located serves as the growth area for subsequent film layers. This growth area can define the position of the light-emitting device 10 to be fabricated. Specifically, the corresponding mask openings 1131 can be formed on the mask layer 113 according to the arrangement of the light-emitting device 10 to be fabricated.

[0042] A first conductivity type semiconductor structure 12 is formed on the substrate 11 in the location region where each mask opening 1131 is located.

[0043] In this embodiment, the side of the first conductivity type semiconductor structure 12 away from the substrate 11 can be used to grow subsequent film layers.

[0044] Step S13: A quantum well growth auxiliary layer 13 and a quantum well layer 14 are sequentially fabricated on the side of the first conductivity type semiconductor structure 12 that forms different color light-emitting devices 10 away from the substrate 11.

[0045] In this embodiment, depending on the color of the fabricated light-emitting device 10, a quantum well growth auxiliary layer 13 and a quantum well layer 14 can be fabricated on the side of the corresponding first conductivity type semiconductor structure 12 away from the substrate 11.

[0046] In this embodiment, the first conductivity type semiconductor structure 12 includes a first surface 301 in contact with the substrate 11 and a second surface 302 in contact with the quantum well growth auxiliary layer 13. The larger the diameter of the first surface 301, the larger the corresponding diameter of the second surface 302. The orthographic projection of the second surface 302 on the substrate 11 in the first conductivity type semiconductor structure 12 lies within the orthographic projection of the first surface 301 on the substrate 11 in the first conductivity type semiconductor structure 12. The diameter of the surface refers to the maximum distance between two points on the surface.

[0047] For example, the shape of the second surface 302 projected onto the substrate 11 is the same as the shape of the first surface 301 projected onto the substrate 11.

[0048] In this embodiment, both the quantum well growth auxiliary layer 13 and the quantum well layer 14 contain indium. The quantum well growth auxiliary layer 13 can be used to control the indium content in the quantum well layer 14. The indium content in the quantum well layer 14 is different for different light-emitting devices 10, and the indium content in the quantum well growth auxiliary layer 13 is also different for different light-emitting devices 10.

[0049] In this embodiment, the surface size of the contact between the quantum well growth auxiliary layer 13 and the quantum well layer 14 can be controlled by the second surface 302 of the first conductivity type semiconductor structure 12. The smaller the size of the second surface 302, the smaller the corresponding contact surface between the quantum well growth auxiliary layer 13 and the quantum well layer 14. Under the same or similar epitaxial growth conditions, a smaller surface area will encourage more indium atoms to accumulate thereon, thereby increasing the indium content in the corresponding quantum well layer 14.

[0050] In this step, the quantum well growth auxiliary layer 13 and quantum well layer 14 of different color light-emitting devices 10 are fabricated separately to ensure that the indium content in the quantum well growth auxiliary layer 13 and quantum well layer 14 of different color light-emitting devices 10 is different, so as to facilitate the precise control of the emission wavelength of different color light-emitting devices 10.

[0051] For example, the light-emitting device 10 includes a first light-emitting device 10a, a second light-emitting device 10b, and a third light-emitting device 10c. In this step, a first quantum well growth auxiliary layer 131 and a first quantum well layer 141 can be fabricated first on the side of the first conductivity type semiconductor structure 12 away from the substrate 11 corresponding to the first light-emitting device 10a; then, a second quantum well growth auxiliary layer 132 and a second quantum well layer 142 can be fabricated second on the side of the second light-emitting device 10b corresponding to the first conductivity type semiconductor structure 12 away from the substrate 11; and then, a third quantum well growth auxiliary layer 133 and a third quantum well layer 143 can be fabricated third on the side of the third light-emitting device 10c corresponding to the first conductivity type semiconductor structure 12 away from the substrate 11. It is understood that the above is only an example, and the order of fabricating the quantum well growth auxiliary layer 13 and the quantum well layer 14 can also be different from the above description. In this embodiment, the specific order is not limited.

[0052] Step S14: After completing the fabrication of quantum well growth auxiliary layers 13 and quantum well layers 14 on all first conductivity type semiconductor structures 12, second conductivity type semiconductor structures 15 are fabricated simultaneously on the side of all quantum well layers 14 away from the substrate 11.

[0053] In this embodiment, the second conductivity type semiconductor structure 15 used to form different color light-emitting devices 10 can be completely identical and can be fabricated simultaneously using a unified process method, which can simplify the process and improve process efficiency.

[0054] A first conductivity type semiconductor structure 12, a quantum well growth auxiliary layer 13, a quantum well layer 14, and a second conductivity type semiconductor structure 15 are stacked to form a light-emitting device 10. In this embodiment, light-emitting devices 10 of different colors can be arranged in any possible manner according to related technologies to form pixel units, so as to achieve full-color display.

[0055] The method described above produces semiconductor devices 10 with different first conductivity types and diameters on their first surfaces 301. The size of the first surface 301 allows for the control of the surface dimensions of the quantum well growth auxiliary layer 13 used for growing the quantum well layer 14, thereby controlling the indium content in the quantum well layer 14. This enables the integrated fabrication of different color light-emitting devices 10 on a single substrate. It eliminates the need for complex processes such as multiple bonding and mass transfer, significantly simplifying the fabrication process and reducing the risk of process difficulty and defect introduction. Furthermore, this structure employs a direct light-emitting mode, effectively avoiding inherent defects such as low color conversion efficiency, insufficient luminous stability, color gamut decay, and poor reliability, thereby improving the luminous efficiency, color consistency, and lifespan of multi-color displays.

[0056] In one possible implementation, please refer to Figure 3 and Figure 4 Step S11 can be achieved through the following steps.

[0057] Step S111: Provide a substrate 111.

[0058] In this embodiment, substrate 111 includes a silicon substrate or a sapphire substrate.

[0059] Step S112: A buffer layer 112 is fabricated on the substrate 111.

[0060] In this embodiment, a buffer layer 112 can be fabricated on the substrate 111 by chemical vapor deposition. The buffer layer 112 can be a single-layer structure or a multi-layer structure.

[0061] Step S113: A mask layer 113 is fabricated on the buffer layer 112.

[0062] In this embodiment, a mask layer 113 can be fabricated on the buffer layer 112 by chemical vapor deposition.

[0063] In one possible implementation, the light-emitting device 10 includes a first light-emitting device 10a, a second light-emitting device 10b, and a third light-emitting device 10c. Please refer to... Figure 5 , Figure 6a and Figure 6b Step S12 can be achieved through the following steps.

[0064] Step S121-1: A first mask opening 1131a is made on the mask layer 113 to expose the buffer layer.

[0065] Step S122-1: By adjusting the first epitaxial growth parameters, a first semiconductor material structure 20a is formed in the region where the first mask opening 1131a is located.

[0066] Specifically, firstly, a seed structure 121 is epitaxially grown at the first mask opening 1131a. The material of the seed structure 121 includes, but is not limited to, GaN, InGaN, AlGaN, etc. Next, a first semiconductor material structure 20a is epitaxially grown based on the seed structure 121 using a first conductivity type material.

[0067] In this step, a first semiconductor material structure 20a is formed on a seed structure 121.

[0068] In this embodiment, the orthographic projection of the seed structure 121 on the substrate 11 is located within the orthographic projection of the first semiconductor material structure 20a on the substrate 11.

[0069] In this embodiment, the first conductivity type material may include N-type InGaN.

[0070] Step S123-1: A second mask opening 1131b is made on the mask layer 113 to expose the buffer layer 112.

[0071] Step S124-1: By adjusting the second epitaxial growth parameters, a second semiconductor material structure 20b is formed in the region where the second mask opening 1131b is located.

[0072] This step can be referred to in the relevant description of step S12, and will not be repeated here.

[0073] Step S125-1: A third mask opening 1131c is made on the mask layer 113 to expose the buffer layer 112.

[0074] Step S126-1: By adjusting the third epitaxial growth parameters, a third semiconductor material structure 20c is formed in the region where the third mask opening 1131c is located.

[0075] This step can be referred to in the relevant description of step S12, and will not be repeated here.

[0076] In this embodiment, the first semiconductor material structure 20a, the second semiconductor material structure 20b, and the third semiconductor material structure 20c are conical. The diameters of the first surfaces of the first semiconductor material structure 20a, the second semiconductor material structure 20b, and the third semiconductor material structure 20c are different. Correspondingly, the diameters of the second surfaces 302 of the first semiconductor material structure 20a, the second semiconductor material structure 20b, and the third semiconductor material structure 20c are also different.

[0077] Step S127-1: Remove the top of the first semiconductor material structure 20a, the second semiconductor material structure 20b, and the third semiconductor material structure 20c to obtain the first conductivity type semiconductor structure 12.

[0078] In this embodiment, the first conductivity type semiconductor structure 12 obtained after removing the top layer of the first semiconductor material structure 20a is used to form the first light-emitting device 10a. The first conductivity type semiconductor structure 12 obtained after removing the top layer of the second semiconductor material structure 20b is used to form the second light-emitting device 10b. The first conductivity type semiconductor structure 12 obtained after removing the top layer of the third semiconductor material structure 20c is used to form the third light-emitting device 10c.

[0079] Furthermore, in step S124, a first isolation layer 401 covering the first semiconductor material structure 20a can be fabricated first, and a second semiconductor material structure 20b can be formed in the region where the second mask opening 1131b is located by adjusting the second epitaxial growth parameters. This design avoids performing epitaxial growth on the already formed first semiconductor material structure 20a, ensuring that the structure of the first semiconductor material structure 20a remains unchanged.

[0080] Furthermore, in step S126, a second isolation layer 402 covering the first semiconductor material structure 20a and the second semiconductor material structure 20b can be fabricated first. Then, by adjusting the third epitaxial growth parameters, the third semiconductor material structure 20c is formed in the region where the third mask opening 1131c is located. This design avoids further epitaxial growth on the already formed first semiconductor material structure 20a and the second semiconductor material structure 20b, ensuring that the structures of the first semiconductor material structure 20a and the second semiconductor material structure 20b remain unchanged.

[0081] In this embodiment, before step S127, the preparation method provided in this embodiment further includes removing the first isolation layer 401 and the second isolation layer 402.

[0082] In this embodiment, the first mask opening 1131a, the second mask opening 1131b, and the third mask opening 1131c can have the same size and shape. The first semiconductor material structure 20a, the second semiconductor material structure 20b, and the third semiconductor material structure 20c can be formed by adjusting different epitaxial growth parameters.

[0083] For example, the wavelengths of the light emitted by the first light-emitting device 10a, the second light-emitting device 10b, and the third light-emitting device 10c decrease sequentially. The first epitaxial growth parameters include a first growth time and a first gas flow rate. The second epitaxial growth parameters include a second growth time and a second gas flow rate. The third epitaxial growth parameters include a third growth time and a third gas flow rate.

[0084] The first growth time, the second growth time, and the third growth time increase sequentially; and / or, the first gas flow rate, the second gas flow rate, and the third gas flow rate increase sequentially.

[0085] In this way, first semiconductor material structures 20a, second semiconductor material structures 20b, and third semiconductor material structures 20c of different sizes and heights can be generated by controlling the epitaxial growth parameters.

[0086] In this embodiment, the heights of the first semiconductor material structure 20a, the second semiconductor material structure 20b, and the third semiconductor material structure 20c increase sequentially in the direction perpendicular to the plane of the substrate 11 (Z direction in the figure).

[0087] In one possible implementation, the light-emitting device 10 includes a first light-emitting device 10a, a second light-emitting device 10b, and a third light-emitting device 10c. Please refer to... Figure 7 and Figure 8 Step S12 can be achieved through the following steps.

[0088] Step S121-2: A first mask opening 1131a, a second mask opening 1131b, and a third mask opening 1131c of different sizes are made on the mask layer 113 to expose the buffer layer 112.

[0089] In this step, mask openings 1131 of different sizes can be formed on the mask layer 113 through a single patterning process. The sizes of the first mask opening 1131a, the second mask opening 1131b, and the third mask opening 1131c increase sequentially.

[0090] In step S122-2, a first semiconductor material structure 20a, a second semiconductor material structure 20b, and a third semiconductor material structure 20c are formed in the regions where the first mask opening 1131a, the second mask opening 1131b, and the third mask opening 1131c are located.

[0091] In this step, a first semiconductor material structure 20a, a second semiconductor material structure 20b, and a third semiconductor material structure 20c are epitaxially grown simultaneously through the first mask opening 1131a, the second mask opening 1131b, and the third mask opening 1131c. Because the sizes of the first mask opening 1131a, the second mask opening 1131b, and the third mask opening 1131c are different, the epitaxial growth rates are different. The larger the size of the mask opening 1131, the faster the epitaxial growth rate, and the higher the size and height of the resulting semiconductor material structure 20. Specifically, the diameters of the first surfaces 301 of the first mask opening 1131a, the second mask opening 1131b, and the third mask opening 1131c increase sequentially. In the direction perpendicular to the plane of the substrate 11, the heights of the first semiconductor material structure 20a, the second semiconductor material structure 20b, and the third semiconductor material structure 20c increase sequentially.

[0092] Step S123-2: Remove the top of the first semiconductor material structure 20a, the second semiconductor material structure 20b and the third semiconductor material structure 20c to obtain the first conductivity type semiconductor structure 12.

[0093] In this embodiment, the first conductivity type semiconductor structure 12 obtained after removing the top layer of the first semiconductor material structure 20a is used to form the first light-emitting device 10a. The first conductivity type semiconductor structure 12 obtained after removing the top layer of the second semiconductor material structure 20b is used to form the second light-emitting device 10b. The first conductivity type semiconductor structure 12 obtained after removing the top layer of the third semiconductor material structure 20c is used to form the third light-emitting device 10c.

[0094] In this embodiment, please refer to Figure 9 Steps S127 and S130 in the above embodiments can be implemented in the following ways.

[0095] First, a protective layer 16 is fabricated at least around the first semiconductor material structure 20a, the second semiconductor material structure 20b, and the third semiconductor material structure 20c by epitaxial growth and / or surface deposition.

[0096] The materials of the protective layer 16 include, but are not limited to, SiO2, Al2O3, TiN, Si3N4, etc.

[0097] In the direction perpendicular to the plane of the substrate 11, the thickness of the protective layer 16 is less than the height of the first semiconductor material structure 20a.

[0098] Next, the first semiconductor material structure 20a, the second semiconductor material structure 20b, and the third semiconductor material structure 20c are subjected to a top-removal process, with the side of the protective layer 16 between adjacent semiconductor material structures away from the substrate 11 as the cut-off surface, to obtain the first conductivity type semiconductor structure 12 located on the substrate 11.

[0099] In this embodiment, top removal processing can be performed on the first semiconductor material structure 20a, the second semiconductor material structure 20b, and the third semiconductor material structure 20c by methods such as chemical etching, thermal annealing, and chemical mechanical polishing.

[0100] After the above-mentioned top removal process, the side of the first conductivity type semiconductor structure 12 away from the substrate 11 and the side of the protective layer 16 away from the substrate 11 are flush, so as to facilitate the subsequent film layer fabrication.

[0101] In one possible implementation, the light-emitting device 10 includes a first light-emitting device 10a, a second light-emitting device 10b, and a third light-emitting device 10c, each emitting a different color. Please refer to... Figure 10 , Figure 11a and Figure 11b Step S13 can be achieved through the following steps.

[0102] In step S131, a first barrier layer 171 is formed on the side of the first conductivity type semiconductor structure 12 and the protective layer 16 away from the substrate 11, and a first window 1711 is formed by patterning the first barrier layer 171.

[0103] In step S132, a first quantum well growth auxiliary layer 131 and a first quantum well layer 141 are sequentially fabricated on the first conductivity type semiconductor structure 12 exposed by the first window 1711.

[0104] In step S133, a second barrier layer 172 is formed on the side of the first quantum well layer 141 and the first barrier layer 171 away from the substrate 11, and a second window 1712 is formed by patterning the first barrier layer 171 and the second barrier layer 172.

[0105] In this embodiment, a second barrier layer 172 can be fabricated on the entire side of the first quantum well layer 141 and the first barrier layer 171 away from the substrate 11 by deposition or growth. The first barrier layer 171 and the second barrier layer 172 are patterned to form a second window 1712. The second window 1712 exposes only the first conductivity type semiconductor structure 12 forming the second light-emitting device 10b. The material of the second barrier layer 172 includes, but is not limited to, SiO2, Al2O3, TiN, Si3N4, etc.

[0106] In step S134, a second quantum well growth auxiliary layer 132 and a second quantum well layer 142 are sequentially fabricated on the first conductivity type semiconductor structure 12 exposed by the second window 1712.

[0107] In step S135, a third barrier layer 173 is formed on the side of the second quantum well layer 142 and the second barrier layer 172 away from the substrate 11, and a third window 1713 is formed by patterning the first barrier layer 171, the second barrier layer 172 and the third barrier layer 173.

[0108] In this embodiment, a third barrier layer 173 can be fabricated on the side of the second quantum well layer 142 and the second barrier layer 172 away from the substrate 11 by deposition or growth. The first barrier layer 171, the second barrier layer 172, and the third barrier layer 173 are patterned to form a third window 1713. The third window 1713 exposes only the first conductivity type semiconductor structure 12 forming the third light-emitting device 10c. The material of the third barrier layer 173 includes, but is not limited to, SiO2, Al2O3, TiN, and Si3N4.

[0109] In step S136, a third quantum well growth auxiliary layer 133 and a third quantum well layer 143 are sequentially fabricated on the first conductivity type semiconductor structure 12 exposed by the third window 1713.

[0110] In this embodiment, a third quantum well growth auxiliary layer 133 and a third quantum well layer 143 are sequentially fabricated on the first conductivity type semiconductor structure 12 exposed by the third window 1713 by adjusting the third growth parameters of epitaxial growth.

[0111] In one possible implementation, please refer to Figure 12 and Figure 13 Step S14 can be achieved through the following steps.

[0112] Step S141: Remove the first barrier layer 171, the second barrier layer 172, and the third barrier layer 173.

[0113] In this embodiment, wet etching, which causes less damage to the device, can be used to sequentially remove the third barrier layer 173, the second barrier layer 172, and the first barrier layer 171, thereby completely exposing the first quantum well layer 141, the second quantum well layer 142, and the third quantum well layer 143.

[0114] In step S142, a second conductivity type semiconductor structure 15 is simultaneously fabricated on the side of the first quantum well layer 141, the second quantum well layer 142, and the third quantum well layer 143 away from the substrate 11.

[0115] A second conductivity type semiconductor structure 15 is fabricated by uniform epitaxial growth on the side of the first quantum well layer 141, the second quantum well layer 142, and the third quantum well layer 143 away from the substrate 11.

[0116] The material of the second conductivity type semiconductor structure 15 includes P-type GaN.

[0117] In this embodiment, a first light-emitting device 10a is formed by stacking a first conductivity type semiconductor structure 12, a first quantum well growth auxiliary layer 131, a first quantum well layer 141, and a second conductivity type semiconductor structure 15. A second light-emitting device 10b is formed by stacking a first conductivity type semiconductor structure 12, a second quantum well growth auxiliary layer 132, a second quantum well layer 142, and a second conductivity type semiconductor structure 15. A third light-emitting device 10c is formed by stacking a first conductivity type semiconductor structure 12, a third quantum well growth auxiliary layer 133, a third quantum well layer 143, and a second conductivity type semiconductor structure 15.

[0118] In one possible implementation, please refer to Figure 13 In step S14, after the fabrication of the quantum well growth auxiliary layer 13 and the quantum well layer 14 on all the first conductivity type semiconductor structures 12 is completed, an electron blocking layer 18 and a second conductivity type semiconductor structure 15 are simultaneously fabricated on the side of all quantum well layers 14 away from the substrate 11, with the electron blocking layer 18 located between the quantum well layer 14 and the second conductivity type semiconductor structure 15.

[0119] Since the electron blocking layer 18 and the second conductivity type semiconductor structure 15 in the light-emitting devices 10 with different emission colors are fabricated in the same process, in this embodiment, the thickness of each electron blocking layer 18 and the thickness of each second conductivity type semiconductor structure 15 are the same in the light-emitting devices 10 with different emission colors.

[0120] In this embodiment, the electron blocking layer 18 can block electrons from entering the second conductivity type semiconductor structure 15, thereby preventing the lifespan of the light-emitting device 10 from being shortened due to electrons entering the second conductivity type semiconductor structure 15.

[0121] In one possible implementation, after step S14, the fabrication method provided in this embodiment further includes: removing the protective layer 16 using a wet etching method that causes less damage to the device structure, to obtain the desired result. Figure 14 Semiconductor structure 1 is shown.

[0122] Based on the same inventive concept, this application also provides a semiconductor device 1 prepared using the above-described preparation method. Please refer to... Figure 14The semiconductor structure 1 includes a substrate 11 and multiple light-emitting devices 10 with different light-emitting colors grown on the substrate 11.

[0123] In the direction away from the substrate 11 (Z direction in the figure), each light-emitting device 10 includes a first conductivity type semiconductor structure 12, a quantum well growth auxiliary layer 13, a quantum well layer 14 and a second conductivity type semiconductor structure 15 stacked together.

[0124] The first conductivity type semiconductor structure 12 includes a first surface 301 in contact with the substrate 11 and a second surface 302 in contact with the quantum well growth auxiliary layer 13. The larger the diameter of the first surface 301, the larger the corresponding diameter of the second surface 302. The diameter of a surface refers to the maximum distance between two points on the surface. For example, the first conductivity type semiconductor structure 12 can be truncated pyramidal in shape, with the orthographic projection of the second surface 302 onto the substrate 11 lying within the orthographic projection of the first surface 301 onto the substrate 11.

[0125] In this embodiment, in the light-emitting devices 10 with different emitting colors, the diameters of the first surfaces 301 are different. The larger the diameter of the first surface 301, the shorter the wavelength of the light emitted by the corresponding light-emitting device 10.

[0126] Specifically, the surface size of the contact between the quantum well growth auxiliary layer 13 and the quantum well layer 14 can be controlled by the second surface 302 of the first conductivity type semiconductor structure 12. The smaller the size of the second surface 302, the smaller the corresponding contact surface between the quantum well growth auxiliary layer 13 and the quantum well layer 14. Under the same or similar epitaxial growth conditions, a smaller surface area will encourage more indium atoms to accumulate thereon, thereby increasing the indium content in the corresponding quantum well layer 14. The higher the indium content in the quantum well layer 14, the longer the wavelength of the light emitted by the corresponding light-emitting device 10.

[0127] In one possible implementation, in the light-emitting devices 10 with different light-emitting colors, each first conductivity type semiconductor structure 12 has the same thickness in the plane direction perpendicular to the substrate 11 (Z direction in the figure).

[0128] In this embodiment, in the light-emitting devices 10 with different emission colors, the diameter of the first surface 301 ranges from 300 nanometers to 5000 nanometers. For example, the diameter of the first surface 301 includes 300 nanometers, 500 nanometers, 1000 nanometers, 1500 nanometers, 2350 nanometers, 3000 nanometers, 4050 nanometers, or 5000 nanometers, etc.

[0129] In one possible implementation, the light-emitting device 10 includes a first light-emitting device 10a, a second light-emitting device 10b, and a third light-emitting device 10c with different light-emitting colors, wherein the wavelengths of the light emitted by the first light-emitting device 10a, the second light-emitting device 10b, and the third light-emitting device 10c decrease sequentially.

[0130] The diameter of the second surface 302 of the first conductivity type semiconductor structure 12 in the first light-emitting device 10a, the second light-emitting device 10b and the third light-emitting device 10c increases sequentially.

[0131] In this embodiment, the indium content of the first conductivity type semiconductor structure 12 in the first light-emitting device 10a, the second light-emitting device 10b, and the third light-emitting device 10c is the same. Alternatively, the indium content of the first conductivity type semiconductor structure 12 in the first light-emitting device 10a, the second light-emitting device 10b, and the third light-emitting device 10c decreases sequentially.

[0132] In one possible implementation, in light-emitting devices 10 with different emission colors, each quantum well growth auxiliary layer 13 has the same thickness in the plane perpendicular to the substrate 11. That is, light-emitting devices 10 with different emission colors also have quantum well growth auxiliary layers 13 of the same thickness.

[0133] The quantum well growth auxiliary layer 13 includes a third surface 303 that contacts the quantum well layer 14. The diameter of the third surface 303 of the quantum well growth auxiliary layer 13 in the first light-emitting device 10a, the second light-emitting device 10b, and the third light-emitting device 10c increases sequentially.

[0134] In this embodiment, the indium content on the third surface 303 of the quantum well growth auxiliary layer 13 in the first light-emitting device 10a, the second light-emitting device 10b, and the third light-emitting device 10c decreases sequentially.

[0135] The indium content of the quantum well growth auxiliary layer 13 in the first light-emitting device 10a is greater than or equal to 5% and less than or equal to 20%. For example, the indium content of the quantum well growth auxiliary layer 13 in the first light-emitting device 10a includes 5%, 8%, 12%, 15%, 18%, or 20%, etc.

[0136] The indium content of the quantum well growth auxiliary layer 13 in the second light-emitting device 10b is greater than or equal to 5% and less than or equal to 15%. For example, the indium content of the quantum well growth auxiliary layer 13 in the second light-emitting device 10b includes 5%, 7%, 10%, 12%, 14%, or 15%, etc.

[0137] The indium content of the quantum well growth auxiliary layer 13 in the third light-emitting device 10c is greater than or equal to 1% and less than or equal to 10%. For example, the indium content of the quantum well growth auxiliary layer 13 in the third light-emitting device 10c includes 1%, 3%, 5%, 7%, 9%, or 10%, etc.

[0138] In one possible implementation, in light-emitting devices 10 with different emission colors, the thickness of each quantum well layer 14 is the same in the direction perpendicular to the plane of the substrate 11 (Z direction in the figure).

[0139] In this embodiment, the thickness of the quantum well layer 14 is 2 nanometers to 200 nanometers. Exemplarily, the thickness of the quantum well layer 14 includes 2 nanometers, 10 nanometers, 50 nanometers, 100 nanometers, 150 nanometers, 185 nanometers, or 200 nanometers, etc.

[0140] The indium content of the quantum well layer 14 in the first light-emitting device 10a, the second light-emitting device 10b, and the third light-emitting device 10c decreases sequentially.

[0141] The indium content of the quantum well layer 14 in the first light-emitting device 10a is greater than or equal to 30% and less than or equal to 40%. For example, the indium content of the quantum well layer 14 in the first light-emitting device 10a includes 30%, 32%, 35%, 38%, or 40%, etc.

[0142] The indium content of the quantum well layer 14 in the second light-emitting device 10b is greater than or equal to 18% and less than or equal to 25%. For example, the indium content of the quantum well layer 14 in the second light-emitting device 10b includes 18%, 20%, 22%, 24%, or 25%, etc.

[0143] The indium content of the quantum well layer 14 in the third light-emitting device 10c is greater than or equal to 8% and less than or equal to 15%. For example, the indium content of the quantum well layer 14 in the third light-emitting device 10c includes 8%, 10%, 11%, 13%, or 15%, etc.

[0144] In this embodiment, as Figure 14 or Figure 15 As shown, the substrate 11 includes a substrate 111, a buffer layer 112, and a mask layer 113 stacked together. The substrate 111 can be a silicon substrate or a sapphire substrate. The buffer layer 112 is a single-layer or multi-layer structure located on the substrate 111. The buffer layer 112 is used to suppress dislocation propagation, release interface stress, and improve the lattice mismatch problem between the epitaxial material and the substrate 111.

[0145] The mask layer 113 is located on the side of the buffer layer 112 away from the substrate 111, and the mask layer 113 includes a mask opening 1131 that exposes the buffer layer 112.

[0146] The mask opening 1131 includes a first mask opening 1131a corresponding to the first light-emitting device 10a, a second mask opening 1131b corresponding to the second light-emitting device 10b, and a third mask opening 1131c corresponding to the third light-emitting device 10c.

[0147] In one implementation, such as Figure 14 As shown, the first mask opening 1131a, the second mask opening 1131b, and the third light-emitting device 10c have the same size. In another embodiment, as... Figure 15 As shown, the sizes of the first mask opening 1131a, the second mask opening 1131b, and the third light-emitting device 10c are different. Optionally, the sizes of the first mask opening 1131a, the second mask opening 1131b, and the third light-emitting device 10c increase sequentially.

[0148] In this embodiment, as Figure 16 , Figure 17 and Figure 18 As shown, adjacent first light-emitting device 10a, second light-emitting device 10b and third light-emitting device 10c form a pixel unit PX, wherein the first light-emitting device 10a is a red light-emitting device, the second light-emitting device 10b is a green light-emitting device and the third light-emitting device 10c is a blue light-emitting device.

[0149] In one possible implementation, such as Figure 16 As shown, the pixel unit PX includes a first light-emitting device 10a, a second light-emitting device 10b, and a third light-emitting device 10c.

[0150] In this embodiment, in the pixel unit PX, the center line connecting the first light-emitting device 10a, the second light-emitting device 10b, and the third light-emitting device 10c forms a triangle.

[0151] In another possible implementation, such as Figure 17 and Figure 18 As shown, the pixel unit PX includes two first light-emitting devices 10a, one second light-emitting device 10b, and one third light-emitting device 10c.

[0152] In pixel unit PX, the center line connecting the first light-emitting device 10a, the second light-emitting device 10b, and the third light-emitting device 10c forms a quadrilateral. Preferably, the quadrilateral is rectangular.

[0153] like Figure 17 As shown, the two first light-emitting devices 10a are located on the same side of the quadrilateral. Or, as... Figure 18 As shown, the two first light-emitting devices 10a are located on the diagonal of the quadrilateral.

[0154] Based on the same inventive concept, embodiments of this application also provide a display device, which includes a display panel prepared by the preparation method in the preceding embodiments, or a display panel described in the preceding embodiments. The display device includes an AR display device and / or a VR display device.

[0155] In summary, this application provides a method for fabricating a semiconductor structure, a semiconductor structure, and a display device. In the semiconductor structure fabrication method, the diameters of the first surfaces on the first conductivity type semiconductor structures of the different color light-emitting devices are different. The size of the first surface can be controlled to regulate the surface size of the quantum well growth auxiliary layer used for growing the quantum well layer, thereby controlling the indium content in the quantum well layer. This allows for the integrated fabrication of different color light-emitting devices on a single substrate. It eliminates the need for complex processes such as multiple bonding and mass transfer, significantly simplifying the fabrication process and reducing the risk of process difficulty and defect introduction. Furthermore, this structure employs a direct light-emitting mode, effectively avoiding inherent defects such as low color conversion efficiency, insufficient luminous stability, color gamut decay, and poor reliability, thereby improving the luminous efficiency, color consistency, and lifespan of multi-color displays.

[0156] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A method for fabricating a semiconductor structure, characterized in that, The method includes: A substrate is provided, wherein the substrate includes a substrate, a buffer layer and a mask layer stacked together; A mask opening is formed on the mask layer to expose the buffer layer, and a first conductivity type semiconductor structure is formed on the substrate corresponding to the location of the mask opening. A quantum well growth auxiliary layer and a quantum well layer are sequentially fabricated on the side of the first conductivity type semiconductor structure that forms different color light-emitting devices away from the substrate. The first conductivity type semiconductor structure includes a first surface in contact with the substrate and a second surface in contact with the quantum well growth auxiliary layer. The larger the diameter of the first surface, the larger the diameter of the corresponding second surface. After completing the fabrication of the quantum well growth auxiliary layer and the quantum well layer on all the first conductivity type semiconductor structures, a second conductivity type semiconductor structure is simultaneously fabricated on the side of all quantum well layers away from the substrate. The first conductivity type semiconductor structure, the quantum well growth auxiliary layer, the quantum well layer and the second conductivity type semiconductor structure are stacked to form a light-emitting device. In the light-emitting devices with different emission colors, the diameter of each first surface is different. The larger the diameter of the first surface, the shorter the wavelength of the light emitted by the light-emitting device.

2. The method for preparing the semiconductor structure according to claim 1, characterized in that, The light-emitting device includes a first light-emitting device, a second light-emitting device, and a third light-emitting device with different emission colors. The step of forming a mask opening on the mask layer to expose the buffer layer and forming a first conductivity type semiconductor structure on the substrate corresponding to the location of the mask opening includes: A first mask opening is made on the mask layer to expose the buffer layer; A first semiconductor material structure is formed in the region where the first mask opening is located by adjusting the first epitaxial growth parameters. A second mask opening is made on the mask layer to expose the buffer layer; A second semiconductor material structure is formed in the region where the second mask opening is located by adjusting the second epitaxial growth parameters; A third mask opening is formed on the mask layer to expose the buffer layer; A third semiconductor material structure is formed in the region where the third mask opening is located by adjusting the third epitaxial growth parameters. The first semiconductor material structure, the second semiconductor material structure and the third semiconductor material structure are conical, and the diameters of the first surfaces of the first semiconductor material structure, the second semiconductor material structure and the third semiconductor material structure are different. The first semiconductor material structure, the second semiconductor material structure, and the third semiconductor material structure are subjected to top-removal processing to obtain the first conductivity type semiconductor structure. The first conductivity type semiconductor structure obtained after top-removal processing of the first semiconductor material structure is used to form the first light-emitting device, the first conductivity type semiconductor structure obtained after top-removal processing of the second semiconductor material structure is used to form the second light-emitting device, and the first conductivity type semiconductor structure obtained after top-removal processing of the third semiconductor material structure is used to form the third light-emitting device.

3. The method for preparing the semiconductor structure as described in claim 2, characterized in that, The step of forming a second semiconductor material structure in the region where the second mask opening is located by adjusting the second epitaxial growth parameters includes: A first isolation layer covering the first semiconductor material structure is fabricated, and a second semiconductor material structure is formed in the region where the second mask opening is located by adjusting the second epitaxial growth parameters. The step of forming a third semiconductor material structure in the region where the second mask opening is located by adjusting the third epitaxial growth parameters includes: A second isolation layer is fabricated covering the first semiconductor material structure and the second semiconductor material structure, and a third semiconductor material structure is formed in the region where the second mask opening is located by adjusting the third epitaxial growth parameters.

4. The method for preparing the semiconductor structure as described in claim 3, characterized in that, Before the step of performing top-removal processing on the first semiconductor material structure, the second semiconductor material structure, and the third semiconductor material structure to obtain the first conductivity type semiconductor structure, the method further includes: Remove the first isolation layer and the second isolation layer.

5. The method for preparing a semiconductor structure as described in claim 2, characterized in that, The wavelengths of the light emitted by the first light-emitting device, the second light-emitting device, and the third light-emitting device decrease sequentially. The first epitaxial growth parameter includes a first growth time and a first gas flow rate. The second epitaxial growth parameter includes a second growth time and a second gas flow rate. The third epitaxial growth parameter includes a third growth time and a third gas flow rate. The first growth time, the second growth time, and the third growth time increase sequentially, and / or the first gas flow rate, the second gas flow rate, and the third gas flow rate increase sequentially; In a direction perpendicular to the plane of the substrate, the heights of the first semiconductor material structure, the second semiconductor material structure, and the third semiconductor material structure increase sequentially.

6. The method for preparing a semiconductor structure as described in claim 2, characterized in that, The light-emitting device includes a first light-emitting device, a second light-emitting device, and a third light-emitting device with different emission colors. The step of forming a mask opening on the mask layer to expose the buffer layer and forming a first conductivity type semiconductor structure on the substrate corresponding to the location of the mask opening includes: A first mask opening, a second mask opening, and a third mask opening of different sizes are formed on the mask layer to expose the buffer layer, wherein the sizes of the first mask opening, the second mask opening, and the third mask opening increase sequentially. A first semiconductor material structure, a second semiconductor material structure, and a third semiconductor material structure are formed in the regions where the first mask opening, the second mask opening, and the third mask opening are located; wherein, the diameters of the first surfaces of the first semiconductor material structure, the second semiconductor material structure, and the third semiconductor material structure increase sequentially; and in the direction perpendicular to the plane of the substrate, the heights of the first semiconductor material structure, the second semiconductor material structure, and the third semiconductor material structure increase sequentially. The first semiconductor material structure, the second semiconductor material structure, and the third semiconductor material structure are subjected to top-removal processing to obtain the first conductivity type semiconductor structure.

7. The method for preparing the semiconductor structure as described in claim 5 or 6, characterized in that, The step of removing tops from the first semiconductor material structure, the second semiconductor material structure, and the third semiconductor material structure to obtain the first conductivity type semiconductor structure includes: A protective layer is fabricated at least around the first semiconductor material structure, the second semiconductor material structure, and the third semiconductor material structure using epitaxial growth and / or surface deposition, wherein the thickness of the protective layer is less than the height of the first semiconductor material structure in a direction perpendicular to the plane of the substrate. Using the side of the protective layer between adjacent semiconductor material structures away from the substrate as the cutoff surface, the first semiconductor material structure, the second semiconductor material structure, and the third semiconductor material structure are subjected to top removal processing to obtain a first conductivity type semiconductor structure located on the substrate.

8. A semiconductor structure, characterized in that, The semiconductor structure includes a substrate and multiple light-emitting devices of different colors grown on the substrate. In the direction away from the substrate, each of the light-emitting devices includes a first conductivity type semiconductor structure, a quantum well growth auxiliary layer, a quantum well layer, and a second conductivity type semiconductor structure stacked together. The first conductivity type semiconductor structure includes a first surface in contact with the substrate and a second surface in contact with the quantum well growth auxiliary layer, wherein the larger the diameter of the first surface, the larger the diameter of the corresponding second surface; In light-emitting devices with different emitting colors, the diameters of the first surfaces are different. The larger the diameter of the first surface, the shorter the wavelength of the light emitted by the light-emitting device.

9. The semiconductor structure as described in claim 8, characterized in that, In light-emitting devices with different emission colors, the thickness of each first conductivity type semiconductor structure is the same in the direction perpendicular to the plane of the substrate; In light-emitting devices with different emission colors, the diameter of the first surface ranges from 300 nanometers to 5000 nanometers.

10. The semiconductor structure as described in claim 9, characterized in that, The light-emitting device includes a first light-emitting device, a second light-emitting device, and a third light-emitting device with different light-emitting colors, wherein the wavelengths of the light emitted by the first light-emitting device, the second light-emitting device, and the third light-emitting device decrease sequentially. The diameter of the second surface of the first conductivity type semiconductor structure in the first light-emitting device, the second light-emitting device and the third light-emitting device increases sequentially; The indium content of the first conductivity type semiconductor structure in the first light-emitting device, the second light-emitting device, and the third light-emitting device is the same, or the indium content of the first conductivity type semiconductor structure in the first light-emitting device, the second light-emitting device, and the third light-emitting device decreases sequentially.

11. The semiconductor structure as claimed in claim 10, characterized in that, In light-emitting devices with different emission colors, the thickness of each quantum well growth auxiliary layer is the same in the direction perpendicular to the plane of the substrate; The quantum well growth auxiliary layer includes a third surface in contact with the quantum well layer; The diameter of the third surface of the quantum well growth auxiliary layer in the first light-emitting device, the second light-emitting device, and the third light-emitting device increases sequentially. The indium content on the third surface of the quantum well growth auxiliary layer in the first light-emitting device, the second light-emitting device, and the third light-emitting device decreases sequentially.

12. The semiconductor structure as claimed in claim 11, characterized in that, The indium content of the quantum well growth auxiliary layer in the first light-emitting device is greater than or equal to 5% and less than or equal to 20%. The indium content of the quantum well growth auxiliary layer in the second light-emitting device is greater than or equal to 5% and less than or equal to 15%. The indium content of the quantum well growth auxiliary layer in the third light-emitting device is greater than or equal to 1% and less than or equal to 10%.

13. The semiconductor structure as described in claim 10, characterized in that, In light-emitting devices with different emission colors, the thickness of each quantum well layer is the same in the direction perpendicular to the plane of the substrate; The thickness of the quantum well layer is 2 nanometers to 200 nanometers; The indium content of the quantum well layer in the first light-emitting device, the second light-emitting device, and the third light-emitting device decreases sequentially.

14. The semiconductor structure as described in claim 13, characterized in that, The indium content of the quantum well layer in the first light-emitting device is greater than or equal to 30% and less than or equal to 40%. The indium content of the quantum well layer in the second light-emitting device is greater than or equal to 18% and less than or equal to 25%. The indium content of the quantum well layer in the third light-emitting device is greater than or equal to 8% and less than or equal to 15%.

15. The semiconductor structure as claimed in claim 10, characterized in that, The substrate includes a substrate, a buffer layer, and a mask layer stacked together. The mask layer includes a mask opening that exposes the buffer layer. The mask opening includes a first mask opening corresponding to the first light-emitting device, a second mask opening corresponding to the second light-emitting device, and a third mask opening corresponding to the third light-emitting device. The first mask opening, the second mask opening, and the third mask opening have the same size, or the sizes of the first mask opening, the second mask opening, and the third mask opening increase sequentially.

16. The semiconductor structure according to any one of claims 10-15, characterized in that, The first light-emitting device, the second light-emitting device, and the third light-emitting device that are adjacent to each other form a pixel unit; The first light-emitting device, the second light-emitting device, and the third light-emitting device are respectively a red light-emitting device, a green light-emitting device, and a blue light-emitting device.

17. The semiconductor structure as claimed in claim 16, characterized in that, The pixel unit includes a first light-emitting device, a second light-emitting device and a third light-emitting device; In the pixel unit, the center line connecting the first light-emitting device, the second light-emitting device, and the third light-emitting device forms a triangle.

18. The semiconductor structure as claimed in claim 16, characterized in that, The pixel unit includes two first light-emitting devices, one second light-emitting device, and one third light-emitting device; In the pixel unit, the center line connecting the first light-emitting device, the second light-emitting device, and the third light-emitting device forms a quadrilateral; The two first light-emitting devices are located on the same side of the quadrilateral, or on the diagonal of the quadrilateral.

19. A display device, characterized in that, The display device includes a semiconductor structure prepared by the method of preparing the semiconductor structure according to any one of claims 1-8, or a semiconductor structure according to any one of claims 9-18.

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