A method for manufacturing a glass core plate with a built-in bridge chip

Abstract

The application discloses a kind of glass core plate manufacturing method of built-in bridge chip, belong to semiconductor packaging technical field;The method is respectively prepared with blind slot, heat dissipation channel and glass via of first, second glass substrate by laser-induced etching, and the bridge chip with the conductive bump of double-sided is embedded in the blind slot of first glass substrate and is electrically connected with the first conductive path of groove bottom, then second glass substrate is clamped by alignment, and the packaging structure of double-layer glass full package is formed by hybrid bonding, then the second conductive path is made to realize the double-sided conduction of bridge chip, finally, optical waveguide is made on the side of packaging structure to realize optical coupling connection;The application is dispersed by double-layer matching glass heat cycle stress, and the upper and lower glass vias form double-layer shielding structure, and the heat dissipation capacity is improved by surrounding type through heat dissipation channel, integrated optical waveguide supports co-packaging optical demand, and is suitable for high-speed optoelectronic hetero integration scene.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor packaging technology, and specifically relates to a method for manufacturing a glass core board with a built-in bridging chip. Background Technology

[0002] With the rapid development of high-speed interconnect and co-package optics (CPO) technologies, glass substrates have become one of the core substrate materials in advanced packaging due to their advantages such as low coefficient of thermal expansion (CTE), low dielectric loss, and high flatness. Glass core board solutions combining through-glass vias (TGV) and embedded bridge dies can achieve high-density signal interconnects and are widely used in multi-chip heterogeneous integration scenarios.

[0003] In existing glass substrate embedded bridging chip manufacturing solutions, blind holes or blind grooves are usually made only on the surface of a single-layer glass substrate. The bridging chip with conductive bumps on one side is bonded and fixed in the blind groove by a DAF adhesive film, which can only achieve electrical interconnection on one side of the bridging chip.

[0004] This solution has the following shortcomings: Firstly, the bridging chip is supported by a glass substrate on only one side. The difference in CTE between the silicon chip and the glass substrate will cause stress to concentrate at the bonding interface during thermal cycling, resulting in poor long-term reliability. Secondly, the shielding capability of a single-layer glass substrate is limited, and the suppression effect of electromagnetic interference (EMI) coupled with substrate noise is poor under high-frequency operation, which limits the signal transmission rate. Third, the chip is surrounded by the adhesive layer and the bottom of the trench, resulting in a single heat dissipation path and insufficient heat dissipation efficiency, which can easily lead to excessive temperature rise of the device. Fourth, it only supports electrical signal interconnection and cannot integrate optical transmission paths, making it difficult to meet the integration requirements of co-packaged optics. Summary of the Invention

[0005] To address the problems mentioned in the background section, this invention provides a method for manufacturing a glass core board with a built-in bridging chip, thereby solving the problems of thermal stress concentration, poor high-frequency shielding effect, insufficient heat dissipation capacity, and inability to integrate optical interconnects in the prior art.

[0006] To achieve the above objectives, the present invention provides the following technical solution: A method for manufacturing a glass core board with a built-in bridging chip includes the following steps: S1: The first glass substrate is processed by laser-induced etching process, forming a first blind groove with the opening facing upward, a plurality of first heat dissipation channels distributed around the outer periphery of the first blind groove, and a plurality of first glass through holes that completely penetrate along the thickness direction of the first glass substrate, and a first conductive path is made at the bottom of the first blind groove. S2: The bridge chip with conductive bumps on both sides is embedded in the first blind slot through flip-chip bonding or precision mounting process, so that the conductive bumps on the first surface of the bridge chip facing the bottom of the first blind slot are electrically connected to the first conductive path. S3: The second glass substrate is prefabricated using the same process as S1, forming a second blind groove with an opening facing the lower surface of the second glass substrate, a plurality of second heat dissipation channels distributed around the outer periphery of the second blind groove, and a plurality of second glass through holes that completely penetrate along the thickness direction of the second glass substrate. The second glass substrate is snapped onto the first glass substrate after the bridge chip is embedded, so that the second blind groove and the first blind groove are aligned vertically to form a closed cavity, the second heat dissipation channel and the first heat dissipation channel are connected vertically and vertically, and the second glass through hole and the first glass through hole are aligned vertically and vertically. Then, the first glass substrate and the second glass substrate are bonded together by a hybrid bonding process to obtain a packaging structure in which the bridge chip is fully wrapped by two layers of glass. S4: A second conductive path is processed on the upper surface of the package structure to connect the second blind slot. The second conductive path forms an electrical connection with the conductive bumps on the second surface of the bridging chip, thereby realizing double-sided conduction of the bridging chip. S5: An optical waveguide is fabricated in the side region of the packaging structure by laser-induced modification or ion implantation modification. The optical waveguide and the bridging chip form an optical coupling connection, and finally a glass core board with built-in bridging chip is obtained.

[0007] Compared with the prior art, the beneficial effects of the present invention are: 1. Significantly improved thermal reliability: Two CTE-matched glass substrates are bonded together, completely encapsulating the silicon-based bridging chip inside the double-layer glass. During thermal cycling, stress can be evenly distributed through the two layers of glass, avoiding the stress concentration problem of single-sided bonding, and greatly improving the thermal cycling reliability of the packaging structure.

[0008] 2. Double-layer shielding: The medium is fully enclosed by double-layer glass, and the upper and lower TGVs form a double-layer shield, which is better than the suppression effect of high-frequency EMI and substrate coupling noise than single-layer glass.

[0009] 3. Enhanced heat dissipation: A heat dissipation channel is set around the bridging chip, forming a heat dissipation path that runs through the entire thickness of the glass core board. This expands the heat dissipation path of the chip, which can quickly dissipate the heat generated by the chip during operation, reduce the operating temperature of the device, and extend its service life.

[0010] 4. Supports optoelectronic co-packaging: The optical waveguide is integrated on the side of the package structure, which can be directly connected to the optical coupling area of ​​the bridging chip to realize on-chip transmission of optical signals without the need for additional optical interconnect components. This meets the integration requirements of co-packaged optics (CPO) and improves integration and signal transmission bandwidth.

[0011] 5. Higher interconnect density: The bridging chip has conductive bumps on both sides and connects to the upper and lower conductive paths respectively, realizing double-sided electrical conduction. Compared with the single-sided conduction scheme, it can provide more interconnect channels and improve the signal interconnection density. Attached Figure Description

[0012] Figure 1 A schematic diagram of the structure of a glass core board with an embedded bridging chip prepared using the method of this application; The diagram is marked as follows: 1-Second glass substrate; 2-First glass substrate; 3-Second glass through-hole; 4-First glass through-hole; 5-Second heat dissipation channel; 6-First heat dissipation channel; 7-Second conductive path; 8-First conductive path; 9-Second blind trench; 10-First blind trench; 11-Conductive bump; 12-Bridge chip; 13-Optical waveguide. Detailed Implementation

[0013] To facilitate understanding of the technical content of this invention by those skilled in the art, the invention will be further described in detail below with reference to the accompanying drawings and specific examples. It should be understood that the specific examples described herein are merely illustrative and not intended to limit the scope of the invention.

[0014] The glass core plate structure prepared using the method of this application is as follows: Figure 1 As shown, this application relates to a method for manufacturing a glass core board with a built-in bridging chip, which includes the following steps: S1: Fabrication of the first glass substrate; Borosilicate glass with a thickness of 300-500 μm was selected as the first glass substrate 2. Its coefficient of thermal expansion is close to that of the silicon-based chip, ranging from 2 to 4 ppm / ℃, ensuring thermal compatibility. Laser-induced etching was used to fabricate the substrate's slot structure. First, a femtosecond laser is used to scan a predetermined area of ​​the first glass substrate 2 point by point, causing chemical bond breakage and structural modification of the glass material in the scanned area. The modified areas correspond to the outlines of the first blind groove 10, the first heat dissipation channel 6, and the first glass through hole 4, respectively. Then, the glass substrate is placed in a hydrofluoric acid etching solution with a mass fraction of 10%~20% for selective etching. The etching rate of the laser-modified areas is much higher than that of the unmodified areas, and they are preferentially etched away. Finally, a first blind groove 10 with its opening facing the upper surface, a plurality of first heat dissipation channels 6 evenly distributed around the outer periphery of the first blind groove 10, and a plurality of first glass through holes 4 that completely penetrate along the thickness direction are formed on the first glass substrate 2.

[0015] The first blind slot 10 has a depth of half the thickness of the bridging chip 12, and its planar dimensions are adapted to the shape of the bridging chip 12, with a 5~10μm alignment margin reserved on each side; the first heat dissipation channel 6 is a columnar or slit-shaped channel that runs through the thickness direction and is arranged in a ring array around the first blind slot 10; the first glass through holes 4 are distributed in the outer area of ​​the first heat dissipation channel 6 and are arranged in a regular array.

[0016] After the slot machining is completed, the first conductive path 8 is fabricated using a semiconductor electroplating process: First, a Ti / Cu seed layer is deposited on the bottom surface of the first blind trench 10 and the inner wall of the first glass via 4 using a physical vapor deposition (PVD) sputtering process, where Ti is the adhesion layer and Cu is the conductive seed layer. Then, the conductive lines and via filling areas are defined by photoresist coating, exposure, and development. After copper plating, photoresist removal, and chemical mechanical polishing (CMP) leveling, a first conductive path 8 is formed at the bottom of the first blind trench 10. The pad positions of the first conductive path 8 correspond one-to-one with the conductive bumps 11 on the lower surface of the bridging chip 12.

[0017] S2: Embedded bridge chip 12; A silicon-based bridging chip 12 is selected, with copper pillar solder bumps arranged in a planar array on both its upper and lower surfaces as conductive bumps 11. The bump height is 10~20μm, and the solder material is a tin-silver-copper alloy. The bridging chip 12 is mounted and embedded into the first blind slot 10 using a flip-chip bonding (FC) process: The bridging chip 12 and the first blind slot 10 are visually aligned using high-precision mounting equipment, ensuring that the conductive bumps 11 on the lower surface (first surface) of the chip are aligned one-to-one with the first conductive path 8 pads at the bottom of the slot. Subsequently, a hot-press reflow process is used to melt and then solidify the solder, achieving a metallurgical bond between the bumps and the pads, forming a reliable electrical connection. In an alternative embodiment, a precision mounting (PNP) process can also be used to achieve chip embedding and electrical connection.

[0018] S3: Hybrid bonding of double-layer glass substrates; The second glass substrate 1 (upper substrate) is prepared using the same process as S1. The material and thickness of the second glass substrate 1 are completely the same as those of the first glass substrate 2. It is processed to form a second blind groove 9 with its opening facing its lower surface, a plurality of second heat dissipation channels 5 surrounding the outer periphery of the second blind groove 9, and a plurality of second glass through holes 3 penetrating along the thickness direction. The position and size of each structure correspond one-to-one with those of the first glass substrate 2.

[0019] The second glass substrate 1 is flipped and snapped onto the first glass substrate 2 on which the bridging chip 12 is embedded. Alignment is performed using a submicron-level high-precision alignment device: the second blind groove 9 and the first blind groove 10 are aligned vertically to form a closed cavity that accommodates the bridging chip 12; the second heat dissipation channel 5 and the first heat dissipation channel 6 are coaxially connected vertically to form a heat dissipation path that runs through the entire package structure along the thickness direction; the second glass through hole 3 and the first glass through hole 4 are coaxially aligned vertically.

[0020] After alignment, a low-temperature hybrid bonding process is used to achieve permanent bonding of the two substrates: first, the bonding surfaces of the two substrates are activated by argon plasma to improve the density of dangling bonds and surface activity. Then, the two substrates are precisely bonded in a vacuum environment and subjected to low-temperature annealing at 200~300℃ for 2~4 hours to achieve covalent bonding at the glass-glass interface. Finally, a packaging structure in which the bridging chip 12 is fully enclosed by two layers of glass is obtained.

[0021] S4: Create the second conductive path 7 to achieve double-sided conductivity; The second conductive path 7 is fabricated by processing the upper surface of the packaging structure: A laser-induced etching process is used to fabricate micro-conductive vias from the upper surface of the second glass substrate 1 downwards. The diameter of the vias is adapted to the size of the chip bumps, and the depth of the vias extends to the position of the conductive bumps 11 on the upper surface of the bridging chip 12, exposing the top surface of the bumps. Subsequently, using the same electroplating process as the first conductive path 8, copper conductive lines and pads are formed on the inner wall of the vias and the upper surface of the second glass substrate 1 to form the second conductive path 7. The second conductive path 7 forms an electrical connection with the conductive bumps 11 on the upper surface of the bridging chip 12 through the micro-conductive vias, and together with the first conductive path 8, it achieves double-sided electrical conduction of the bridging chip 12.

[0022] S5: Fabricate side waveguide 13; An optical waveguide 13 is fabricated on the side of the package structure. In this embodiment, a femtosecond laser-induced modification process is used: a femtosecond laser is used to perform a direct-write scan from the side of the package structure, aligned with the optical coupling region of the bridging chip 12. Through nonlinear absorption effects, the density of the glass material along the scan path is increased, and the refractive index is permanently enhanced, forming a strip-shaped optical waveguide 13 with a core layer refractive index 0.5% to 1% higher than the surrounding glass. The optical waveguide 13 extends horizontally along the package structure, with one end precisely aligned and coupled to the optical coupling region of the bridging chip 12, and the other end extending to the side edge of the package structure, serving as the input / output port for optical signals. In an alternative embodiment, an ion implantation process can also be used to change the local refractive index by injecting hydrogen ions into the side of the glass substrate to form the optical waveguide 13 structure.

[0023] After the optical waveguide 13 is fabricated, the glass core board with built-in bridging chip 12 is obtained.

[0024] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A method for manufacturing a glass core board with a built-in bridging chip, characterized in that, Includes the following steps: S1: The first glass substrate (2) is processed by laser-induced etching process, forming a first blind groove (10) with the opening facing upward, a plurality of first heat dissipation channels (6) distributed around the outer periphery of the first blind groove (10), and a plurality of first glass through holes (4) that completely penetrate along the thickness direction of the first glass substrate (2), and a first conductive path (8) is made at the bottom of the first blind groove (10). S2: The bridge chip (12) with conductive bumps (11) on both sides is embedded in the first blind slot (10) by flip-chip bonding or precision mounting process, so that the conductive bumps (11) on the first surface of the bridge chip (12) facing the bottom of the first blind slot (10) are electrically connected to the first conductive path (8). S3: The second glass substrate (1) is prefabricated using the same process as S1, forming a second blind groove (9) with an opening facing the lower surface of the second glass substrate (1), a plurality of second heat dissipation channels (5) distributed around the outer periphery of the second blind groove (9), and a plurality of second glass through holes (3) that completely penetrate along the thickness direction of the second glass substrate (1). The second glass substrate (1) is fastened above the first glass substrate (2) after the bridge chip (12) is embedded, so that the second blind groove (9) and the first blind groove (10) are aligned vertically to form a closed cavity, the second heat dissipation channel (5) and the first heat dissipation channel (6) are connected vertically and vertically, and the second glass through hole (3) and the first glass through hole (4) are aligned vertically and vertically. Then, the first glass substrate (2) and the second glass substrate (1) are bonded together by a hybrid bonding process to obtain a packaging structure in which the bridge chip (12) is fully wrapped by double-layer glass. S4: A second conductive path (7) is processed on the upper surface of the package structure to connect the second blind groove (9). The second conductive path (7) is electrically connected to the conductive bump (11) on the second surface of the bridge chip (12) to achieve double-sided conduction of the bridge chip (12). S5: An optical waveguide (13) is fabricated in the side area of ​​the packaging structure by laser-induced modification or ion implantation modification. The optical waveguide (13) and the bridging chip (12) form an optical coupling connection, and finally a glass core board with built-in bridging chip (12) is obtained.

2. The method for manufacturing a glass core board with a built-in bridging chip according to claim 1, characterized in that, In S2, the bridging chip (12) is a silicon-based bridging chip (12), and the conductive bumps (11) on its first and second surfaces are arranged in an array.

3. The method for manufacturing a glass core board with a built-in bridging chip according to claim 1, characterized in that, In S3, the first glass substrate (2) and the second glass substrate (1) are glass materials with matching coefficients of thermal expansion.

4. The method for manufacturing a glass core board with a built-in bridging chip according to claim 1, characterized in that, In S5, the optical waveguide (13) extends along the horizontal direction of the packaging structure to transmit optical signals and realize co-packaged optical functions.

5. The method for manufacturing a glass core board with a built-in bridging chip according to claim 4, characterized in that, In S5, one end of the optical waveguide (13) is aligned with the optical coupling region of the bridging chip (12), and the other end extends to the side edge of the package structure.

6. The method for manufacturing a glass core board with a built-in bridging chip according to claim 1, characterized in that, The first heat dissipation channel (6) is disposed through the thickness direction of the first glass substrate (2), and the second heat dissipation channel (5) is disposed through the thickness direction of the second glass substrate (1).

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