Silicon carbide-based composite structure with good vertical electrical conduction

Abstract

The invention relates to a composite structure having a front face and a back face extending parallel to a main plane, comprising: - a useful layer of single-crystal silicon carbide, the free face of which constitutes the front face, the layer having a first concentration of N-type dopant; - a carrier substrate made of polycrystalline silicon carbide, the free face of which constitutes the back face, the substrate having a second concentration of N-type dopant, the second concentration being higher than the first concentration; - an intermediate region extending along the main plane and comprising an interface zone between the assembled face of the useful layer and the assembled face of the carrier substrate; the composite structure being characterized in that the intermediate region comprises single-crystal silicon carbide inclusions which are in direct contact with the useful layer and extend between the grains of the carrier substrate in a direction perpendicular to the main plane, the inclusions having a third concentration of N-type dopant between the first and second concentrations. The invention also relates to a method for manufacturing such a composite structure.

Description

Technical Field

[0001] This invention relates to the fields of microelectronic devices and semiconductors. In particular, this invention relates to a composite structure comprising a single-crystal silicon carbide working layer, a polycrystalline silicon carbide carrier substrate, and an intermediate region between the working layer and the carrier substrate that facilitates vertical electrical conduction. Background Technology

[0002] Silicon carbide (SiC) is increasingly used in the fabrication of high-performance power devices. High-quality single-crystal SiC substrates (c-SiC) intended for the microelectronics industry remain expensive and difficult to supply in large sizes. Therefore, it is advantageous to produce composite structures using solutions for transfer layers, which typically include a thin film of c-SiC (from a high-quality c-SiC substrate and designed to house the sensitive functional portions of the device) on a lower-cost carrier substrate, such as p-SiC. It should also be noted that composite structures can provide additional functionality and performance, particularly by providing carrier substrates with favorable mechanical, electrical, and / or thermal properties.

[0003] The well-known thin-film transfer solution is Smart Cut. ® The method involves implanting light ions into a donor substrate (c-SiC) and directly bonding them at the bonding interface between the donor substrate and a support substrate (e.g., p-SiC).

[0004] In the field of power electronics, vertical components require good electrical conductivity between the thin film (also known as the active layer) and the substrate supporting the composite structure. Specifically, the interface between the active layer and the carrier substrate must have the lowest possible resistivity, preferably less than 1 mol·cm⁻¹. 2 or even less than 0.1 mohm.cm 2 .

[0005] Reference WO2022 / 008809 proposes forming interface regions from very thin layers of metal materials (such as tungsten) in SiC / SiC semiconductor structures. This is based on the consideration of the working layer and carrier substrate made of single-crystal SiC with a resistivity of 20 mol / cm.

[0006] A 1 nm to 3 nm tungsten (W) layer sandwiched between the working layer and the carrier substrate can potentially achieve a thickness of less than or equal to 0.1 mol / cm after appropriate heat treatment and the formation of very fine nodules composed primarily of metal (W). 2 The resistivity of the interface region results in good vertical conductivity.

[0007] Interface area.

[0008] Document WO2022 / 129726 proposes forming an interface region in a SiC / SiC semiconductor structure. This interface region includes a direct contact region between the active layer and the carrier substrate, and an aggregate consisting of a semiconductor material different from the semiconductor materials of the active layer and the carrier substrate, and having a thickness of less than or equal to 250 nm. The semiconductor material is chosen because of its specific affinity for oxygen. Therefore, the aggregate can effectively trap oxygen that may be present at the bonding interface; the direct contact region between the active layer and the carrier substrate (especially without natural oxide residues) allows for efficient and high-quality electrical conduction and / or vertical semiconductor / semiconductor contacts. Considering the silicon semiconductor material and the active layer and carrier substrate made of c-SiC with a resistivity of 20 molhm·cm, a thickness of less than or equal to 0.1 molhm·cm is possible. 2 For example, 0.032 mohm.cm 2 (After annealing the structure at 1370℃) or 0.0076 mohm.cm 2 The resistivity of the interface region after annealing at a very high temperature (i.e., 1900°C).

[0009] Purpose of the invention

[0010] This invention provides a particularly advantageous alternative solution for achieving very low interfacial resistivity in a composite structure having a c-SiC active layer and a p-SiC support substrate, and whose doping levels are not necessarily extremely high. The invention relates to a composite structure comprising an intermediate region including an interface region between the bonded surfaces of the active layer and the bonded surfaces of the support substrate, and including single-crystal silicon carbide inclusions in direct contact with the active layer and extending between the grains of the support substrate. These inclusions are particularly advantageous for vertical electrical conduction. The invention also relates to a method for manufacturing said composite structure. Summary of the Invention

[0011] This invention relates to a composite structure having a front side and a back side extending parallel to a main plane, and comprising: - A working layer made of single-crystal silicon carbide with a first concentration of N-type dopant, one free face of which forms the front side. - A support substrate made of polycrystalline silicon carbide with a second concentration of N-type dopant, wherein one free side of the support substrate forms the back side, and the second concentration is higher than the first concentration. - An intermediate region that extends along the main plane and includes the interface region between the bonded surface of the working layer and the bonded surface of the carrier substrate.

[0012] The remarkable feature of this composite structure is that the intermediate region includes a single-crystal silicon carbide inclusion that is in direct contact with the working layer and extends between the grains of the carrier substrate in a direction perpendicular to the main plane. The inclusion has a third N-type dopant concentration between a first concentration and a second concentration.

[0013] Advantageous features according to the invention (alone or in any feasible combination): The carrier substrate includes silicon carbide grains with a size of less than or equal to 500 nm on at least its bonded side, the grains covering more than or equal to 20% of the surface area of ​​the bonded surface in the main plane; Silicon carbide grains with a size of less than 500 nm cover 50% or even 80% of the surface area of ​​the bonded surface of the carrier substrate in the principal plane (x,y). On the bonded side of the carrier substrate, at least 20% of the silicon carbide grains have an orientation difference of greater than or equal to 30° between themselves or relative to the orientation

[111] . The intermediate region includes silicon junctions located in the interface region or below inclusions between grains of the carrier substrate; The first concentration is 1×10 18 / cm 3 Up to 5×10 18 / cm 3 between; The second concentration is 1×10 20 / cm 3 Up to 5×10 20 / cm 3 Between, preferably between 1×10 20 / cm 3 Up to 2×10 20 / cm 3 between; The inclusion has a thickness between 20 nm and 70 nm along an axis perpendicular to the main plane and a width between 100 nm and 700 nm in the main plane; The intermediate region has a value of 0.1 / μm in the principal plane. 2 Up to 1 / μm 2 The density of inclusions between them.

[0014] This invention also relates to a method for manufacturing the above-mentioned composite structure, the method comprising the following steps: a) Provide a single-crystal silicon carbide donor substrate having a first concentration of N-type dopant and including a buried brittle plane induced by ion implantation of a light material. b) Provide a polycrystalline carrier substrate; c) Deposit a silicon film on the bonding surface of the donor substrate and / or on the bonding surface of the carrier substrate; d) Bond the donor substrate and the carrier substrate at their bonding surfaces to obtain a bonded assembly comprising a silicon interlayer derived from the film deposited in step c) between the donor substrate and the carrier substrate, the interlayer having a thickness between 8 nm and 30 nm. e) Separate along the buried brittle plane to form a transferred structure comprising a working layer disposed on an interlayer transferred from a donor substrate, the interlayer itself being disposed on a carrier substrate; f) The transferred structure is subjected to heat treatment at a plateau temperature between 1500°C and 2000°C to form a composite structure.

[0015] Advantageous features according to the invention (alone or in any feasible combination): The carrier substrate includes silicon carbide grains with a size of less than or equal to 500 nm on at least the side of the bonding surface, and the grains cover more than or equal to 20% of the surface area of ​​the bonding surface in the main plane. On the bonded side of the carrier substrate, at least 20% of the silicon carbide grains have an orientation difference of greater than or equal to 30° between themselves or relative to the orientation

[111] . The plateau temperature was maintained for a duration between 30 minutes and 4 hours. The treatment in step f) has a heating rate of less than or equal to 20 °C / min or even less than or equal to 10 °C / min; The second concentration is approximately 1 × 10⁻⁶. 20 / cm 3 The first concentration was approximately 3 × 10⁻⁶. 18 / cm 3 Furthermore, silicon carbide grains with a size of less than or equal to 500 nm cover 50% or even 60% of the surface area of ​​the substrate to be bonded in the main plane. The second concentration is approximately 1 × 10⁻⁶. 20 / cm 3 The first concentration was approximately 1 × 10⁻⁶. 18 / cm 3Furthermore, silicon carbide grains with a size of less than or equal to 500 nm cover 80% or more of the surface area of ​​the substrate to be bonded in the main plane. Attached Figure Description

[0016] Other features and advantages of the invention will become apparent from the following detailed description with reference to the accompanying drawings, in which: [ Figure 1 ][ Figure 1 The composite structure according to the present invention is shown; [ Figure 2 ][ Figure 2 The central region of the composite structure according to the invention is schematically shown on the left side of the figure, with a transmission electron microscope image on the right. [ Figure 3a ] [ Figure 3b ] [ Figure 3c ] [ Figure 3d ] [ Figure 3e ] [ Figure 3f ] Figures 3a to 3f The steps of a method for manufacturing a composite structure according to the present invention are shown; [ Figure 4 ][ Figure 4 The central region of the composite structure according to the invention is schematically shown on the left side of the figure, with a transmission electron microscope image on the right. [ Figure 5 ][ Figure 5 The central region of the composite structure according to the present invention is shown in a transmission electron microscope image; [ Figure 6 ][ Figure 6 The diagram shows the target layer (N) monoSiC ) and carrier substrate (N polySiC Theoretical curves (numerical simulations) showing the relationship between the resistivity of the middle region of the composite structure and the percentage of the surface area of ​​the carrier substrate in which p-SiC grains have a size of less than or equal to 500 nm were obtained by using different doping concentrations.

[0017] Some of the accompanying figures are schematic diagrams and are not drawn to scale for clarity. Specifically, the thickness of the layer along the z-axis is not proportional to the lateral dimensions along the x- and y-axis.

[0018] The same markings in the accompanying drawings or specifications may be used for the same type of components. Detailed Implementation

[0019] This invention relates to a composite structure 100 and an associated manufacturing method. The composite structure 100 has a front side 100a and a back side 100b extending parallel to a principal plane (x,y). It comprises: a working layer 10 made of monocrystalline silicon carbide (preferably polymorphic 4H), one free side of which forms the front side 100a; and a carrier substrate 20 made of polycrystalline silicon carbide 3C, one free side of which forms the back side 100b. Figure 1 The composite structure 100 also includes an intermediate region 30 that extends along the principal plane (x,y) and includes an interface region between the bonded surfaces of the working layer 10 and the carrier substrate 20. The intermediate region 30 includes single-crystal silicon carbide inclusions 31 that are in direct contact with the working layer 10 and extend in a direction perpendicular to the principal plane (x,y) between the grains 21i and 21j of the carrier substrate 20 ([...]). Figure 2 ]).

[0020] To facilitate understanding of the specific properties of the composite structure 100, particularly those relating to the intermediate region 30, we will first describe the method for manufacturing the structure 100.

[0021] The method according to the invention includes step a): providing a single-crystal silicon carbide (e.g., polytype 4H) donor substrate 1 with a given concentration (referred to as the first concentration) of N-type dopant. Typically, the first concentration is 1 × 10⁻⁶. 18 / cm 3 Up to 5×10 18 / cm 3 The range corresponds to a resistivity range between 20 mohm·cm and 30 mohm·cm.

[0022] Donor substrate 1 includes a back side 1b and a front side 1a intended for bonding ([ Figure 3a It includes a buried brittle plane 11 induced by ion implantation of a light material (refer to the Smart Cut method). These materials are, for example, hydrogen, helium, or a combination of both. The buried brittle plane, together with the front side 1a of the donor substrate 1, defines the working layer 10 to be transferred.

[0023] The method includes step b): providing a polycrystalline silicon carbide (polytype 3C) carrier substrate 20. The carrier substrate 20 includes a back side 20b and a front side 20a intended for bonding. Figure 3b It has a higher N-type dopant concentration than the first concentration (referred to as the second concentration). Typically, the second concentration is 1 × 10⁻⁶. 20 / cm 3 Up to 5×10 20 / cm 3Between. To facilitate the provision of the carrier substrate 20, the second concentration of the dopant may preferably be limited to 1 × 10⁻⁶. 20 / cm 3 Up to 2×10 20 / cm 3 The range between them.

[0024] The N-type dopant in the donor substrate 1 or the carrier substrate 20 may be nitrogen.

[0025] Typically, in the field of microelectronics, the carrier substrate 20 and the donor substrate 1 are in the form of circular wafers with diameters typically between 100 mm and 200 mm (or even larger). The (circular) front sides 1a, 20a and back sides 1b, 20b of the wafers 1 and 20 extend parallel to the principal plane (x, y). The thickness of the donor substrate 1 and the carrier substrate 20 is typically between 200 μm and 800 μm.

[0026] Advantageously, the carrier substrate 20 has the following characteristics: it includes silicon carbide grains 21i, 21j with dimensions less than or equal to 2 μm, less than or equal to 1 μm, or even less than or equal to 500 nm on at least its bonding surface 20a side, said grains covering more than or equal to 20% of the surface area of ​​the bonding surface 20a in the principal plane (x,y). The dimensions of the grains 21i, 21j defined by the grain boundaries 22 correspond to the maximum dimensions of said grains 21i, 21j in the principal plane (x,y). To measure the grain sizes 21i, 21j or the distance between the grain boundaries 22, images obtained by conventional scanning electron microscopy (SEM) or electron backscatter diffraction (EBSD) can be used. X-ray crystallography can also be used.

[0027] Advantageously, p-SiC grains 21i, 21j with dimensions less than or equal to 2 μm, less than or equal to 1 μm, or even less than or equal to 500 nm cover 30%, 40%, 50%, 60%, 70%, or even greater than or equal to 80% of the surface area of ​​the substrate 20 to be bonded in the principal plane (x,y). It should be understood that the remaining surface area is occupied by the larger grains.

[0028] The manufacturing method then includes step c): depositing a silicon film 3' (amorphous or polycrystalline) on the bonding surface 1a of the donor substrate 1, on the bonding surface 20a of the carrier substrate 20, or on both surfaces 1a and 20a. Figure 3c Advantageously, the deposition is performed by cryogenic sputtering and typically involves 3x10⁻¹¹ molten metal before the injection of sputtering gas (Ar). -6 Pa to 8x10 -6 A high vacuum between Pa, and then during deposition at approximately 10 -1 Pa and 10 -2The atmosphere is Pa. The thickness of the deposited film 3' can range from a few nm to tens of nm.

[0029] The next step d) corresponds to directly bonding the donor substrate 1 and the carrier substrate 20 at their bonding surfaces 1a and 20a to obtain a bonded assembly 50, which includes a silicon interlayer 3 ([…]) between the donor substrate 1 and the carrier substrate 20, originating from the film 3' deposited in step c). Figure 3d The interlayer 3 advantageously has a thickness between 8 nm and 30 nm.

[0030] This bonding is achieved through molecular adhesion bonding, which involves bringing the surfaces to be bonded, 1a and 20a, into contact without adding any adhesive material. When the silicon film 3' is deposited only on the carrier substrate 20, it can be a direct bond between the working layer 10 and the silicon film 3'; or when the film 3' is deposited only on the donor substrate 1, it can be a direct bond between the carrier substrate 20 and the film 3'; or even when two silicon films 3' are deposited on the donor substrate 1 and the carrier substrate 20, it can be a direct bond between these films 3'. Direct bonding is preferably achieved at approximately 10... -6 The procedure is performed under a high vacuum of Pa or less.

[0031] Advantageously, the deposition in step c) and the direct bonding in step d) can be performed in situ or in a multi-chamber apparatus without disrupting the vacuum. For example, the Atomic Diffusion Bonding BV7000 from Canon can be mentioned, in which the deposition and direct bonding of membrane 3' can be performed continuously while maintaining a controlled atmosphere.

[0032] The method then includes step e): separation along the buried brittle plane 11 to form a transferred structure 100', which includes a working layer 10 transferred from the donor substrate 1 and disposed on a sandwich 3, the sandwich itself being disposed on a carrier substrate 20. Such separation can be performed during a heat treatment typically at about 900°C to 1000°C, which allows cavities and microcracks (induced by the injected material) to grow in the buried brittle plane 11. Separation can also be performed by applying mechanical stress or by a combination of thermal and mechanical stress, as is well known with reference to the Smart Cut method.

[0033] The sequence of separation surfaces 10a of the working layer 10 and / or the remaining portion 1' of the donor substrate 1' can be operated to restore good surface quality, particularly in terms of roughness, defect rate and other contamination.

[0034] Finally, the method includes step f), which corresponds to applying a heat treatment to the transferred structure 100' at a plateau temperature between 1500°C and 2000°C, advantageously between 1750°C and 2000°C, to form the composite structure 100. Figure 3f [Left side] This temperature range melts the silicon in the interlayer 3. The interlayer 3 will segment into droplets to optimize its surface energy, and at least some of these droplets will diffuse the liquid silicon 3'' into the grain boundaries 22. It will then be able to interact with the SiC grains 21i, 21j of the carrier substrate and dissolve a certain amount of the SiC grains. The dissolved carbon will then be transported from the dissolution region to the interface between the liquid silicon and the single-crystal working layer 10, the dissolved carbon having a diffusion coefficient of 1.7 × 10⁻⁶ in the liquid silicon. -8 m 2 / s. Through recombination with silicon, carbon will enable the growth of single-crystal SiC from the working layer 10, which acts as a seed crystal ([ Figure 3f [, right side]. This is similar to the TSSG ("Top Seed Solution Growth") method, in which liquid silicon is placed in a graphite crucible and a high-quality single-crystal SiC seed is subsequently positioned on the surface of the liquid silicon; carbon present on the crucible wall dissolves upon contact with the liquid silicon and diffuses therethrough via a temperature gradient until it reaches the SiC seed. The single-crystal SiC then grows from this seed. In this invention, the growth process is carried out on a very localized scale and at the interface between the working layer 10 and the carrier substrate 20: the graphite crucible is replaced by grains 21i, 21j of the p-SiC carrier substrate, the seed is replaced by the c-SiC working layer 10, and the silicon source is from the interlayer 3.

[0035] Therefore, the composite structure 100 produced by step f) has an intermediate region 30 extending along the principal plane (x, y) and including single-crystal silicon carbide inclusions 31 that are in direct contact with the working layer 10 and extend between the grains 21i and 21j of the carrier substrate 20 in a direction perpendicular to the principal plane (x, y) and (z). The growth pattern of these inclusions 31 facilitates the diffusion of dopants present in the grains 21i and 21j into the inclusions 31. Thus, the latter has a third concentration of N-type dopant between a first and a second concentration, which is highly conducive to establishing good electrical conductivity between the working layer 10 and the carrier substrate 20. For example, for 5 × 10⁻⁶… 18 / cm 3 The first dopant concentration and 5×10 20 / cm 3 The second dopant concentration and the third dopant concentration are expected to be 1 × 10⁻⁶. 20 / cm 3 Up to 1.5×10 20 / cm 3 between.

[0036] Inclusion 31 typically has a thickness between 20 nm and 70 nm along an axis (z) perpendicular to the principal plane (x, y) and a width between 100 nm and 700 nm in the principal plane (x, y). The size of inclusion 31 depends particularly on the thickness of silicon interlayer 3.

[0037] The intermediate region 30 typically has a diameter of 0.1 μm in the principal plane (x,y). 2 Up to 1 / μm 2 The density of inclusions 31. This density is even greater when small-sized grains 21i, 21j (less than or equal to 2 μm, less than or equal to 1 μm, or even less than or equal to 500 nm) cover a large surface area of ​​the bonded surface 20a of the carrier substrate 20. According to the present invention, these small grains cover more than 20%, more than 30%, more than 40%, more than 50%, more than 60%, more than 70%, or even more than 80% of the surface area of ​​the bonded surface 20a.

[0038] The crystallographic orientation of the grains 21i and 21j on the bonding surface 20a of the carrier substrate 20 may also affect the formation, size, and density of the inclusions 31. The density of the inclusions 31 is also related to the thickness of the silicon interlayer 3, and a larger amount of silicon can increase the density in the intermediate region 30.

[0039] It should be noted that significant orientation differences between grains or relative to orientation

[111] favor the interaction between silicon droplets and grain boundaries 22, because such orientation differences are accompanied by grain boundaries 22 that are not very stable, and subsequently, energy-wise, favor the dissolution of carbon atoms at said grain boundaries 22 by silicon. Orientation differences greater than 10°, 20°, or even 30° appear to be particularly advantageous. Grain orientation can be observed by transmission electron microscopy (TEM) or electron backscatter diffraction (EBSD).

[0040] Such orientation differences are expected to be between grains 21i, 21j covering at least 20%, 30%, 40% or even greater than 50% of the surface area of ​​the bonded surface 20a of the substrate 20; this objective can be evaluated by statistical measurements of said surface 20a.

[0041] The c-SiC inclusions 31 between the p-SiC grains (3C) have a special geometry. For example, with regard to the working layer 10 made of polytype 4H c-SiC, it has been observed that the base of the inclusions 31 is perpendicular to the direction of the c-SiC in the working layer 10

[0004] and parallel to the {0004} plane. Therefore, at least some of the bases of the inclusions 31 are not parallel to the principal plane (x,y), but have an orientation difference of 4° relative to the principal plane. This is due to the fact that before step e), the {0004} plane of the SiC-4H single crystal has an orientation difference of 4° relative to the bonding surface 1a of the working layer 10 (and therefore relative to the principal plane). As SiC in the form of inclusions 31 grows epitaxially from the working layer 10, the crystal planes maintain the same orientation. Therefore, the growth ends on the {0004} plane at a 4° angle to the principal plane (x,y).

[0042] The orientation of the sidewalls of the c-SiC inclusion 31 appears to depend on the stability of the facets between the hexagonal single crystal and the cubic polycrystalline material. The tilt of the sidewalls also depends on the corresponding orientation of the grains 21i and 21j in contact with the inclusion 31. Generally, the sidewalls of the inclusion 31 have a tilt of between 110° and 135° relative to the base.

[0043] The heat treatment in step f) plays an important role in the formation of these c-SiC inclusions 31. Therefore, in addition to the plateau temperature between 1500°C and 2000°C, the duration of the plateau, as well as the heating and cooling slopes, also play a role.

[0044] The plateau temperature is preferably 1600°C, 1700°C, 1750°C, 1800°C, 1850°C, 1900°C, or 1950°C. The duration of the plateau is set to allow carbon to diffuse from the droplets into the liquid silicon at the grain boundaries 22 and to allow inclusions 31 to grow from the working layer 10. It is these inclusions 31 that promote vertical electrical conduction; therefore, their size and density should be optimized. Preferably, the plateau temperature is maintained for a duration of 30 minutes, 1 hour, 2 hours, 3 hours, 4 hours, or even longer.

[0045] The heating rate (to plateau) is advantageously chosen to be less than or equal to 20 °C / min, less than or equal to 10 °C / min, or even less than or equal to 5 °C / min, as this facilitates the flow of silicon from the interlayer 3 toward the grain boundary 22. The same range of slopes can be applied to lower temperatures. Furthermore, these ranges of slopes reduce the risk of forming "bubble" type defects at the bonding interface.

[0046] The intermediate region 30 may also include silicon junctions 33, 32, which are arranged in the interface region or below the inclusions 31 between the grains 21i, 21j of the carrier substrate 20. Figure 4In fact, some silicon droplets generated by the segmentation of the interlayer 3 during the heat treatment in step f) can be positioned opposite to the grains 21i, 21j rather than to the grain boundaries 22: in this case, after their solidification during the temperature ramp-down of the heat treatment, they form silicon nodules 33 arranged between the working layer 10 and the carrier substrate 20 in the composite structure 100. Such nodules 33 may have a thickness between 50 nm and 200 nm along an axis (z) perpendicular to the principal plane (x, y) and a width between 200 nm and 400 nm in the principal plane (x, y).

[0047] It was also observed that if the liquid silicon 3'' was not completely consumed during the growth of the inclusion 31, the liquid silicon that had diffused along the grain boundaries 22 between the grains 21i and 21j could form nodules 32. In this case, at the end of step e), silicon nodules 32 were again found in the composite structure 100 arranged below the inclusion 31 and between the grains 21i and 21j of the carrier substrate 20. This type of nodule 32 can have a size of approximately 200 nm to 400 nm in the principal plane (x, y) and a typical thickness in the range of several nm to several μm along the (z) axis. The interface between the c-SiC inclusion 31 and the underlying silicon nodule 32 has an orientation difference of 4° relative to the principal plane (x, y).

[0048] The intermediate region 30 also includes an interface region between the bonding surface 1a of the working layer 10 and the bonding surface 20a of the carrier substrate 20. This interface region is due to the segmentation of the sandwich layer 3, resulting in a direct contact area between the c-SiC working layer 10 and the p-SiC carrier substrate 20. These direct contact areas can form steps 34, such as […]. Figure 5 As can be seen in [the diagram]. It is assumed that during step f), the dissolution of p-SiC (3C) in liquid silicon 3'' allows c-SiC (4H) of the working layer 10 to be reconstructed in the form of stepped aggregates 34 in at least some of the direct contact regions between the thin layer 10 and the carrier substrate 20. It appears that the steps 34 are located in the direct contact regions where the grains 21i, 21j of the carrier substrate 20 exhibit small orientation differences between themselves, while the aforementioned c-SiC inclusions 31 are located in grains 21i, 21j with high orientation differences and / or thermodynamically unstable orientation differences.

[0049] The total thickness of the intermediate region 30 along the axis (z) perpendicular to the principal plane (x, y) is greater than or equal to the maximum thickness of the inclusion 31. The presence of silicon nodules 32 beneath all or some of the inclusions 31 can certainly increase this total thickness.

[0050] To achieve good vertical electrical conduction, in other words, the resistivity of the intermediate region 30 should be as low as possible (preferably less than 1 mol / cm). 2Or even less than 0.1 mohm.cm 2 Certain preferred embodiments have been proposed based on the doping levels of the working layer 10 and the carrier substrate 20.

[0051] According to the first embodiment, the initial concentration of the N-type dopant (nitrogen) (working layer 10) is approximately 5 × 10⁻⁶. 18 / cm 3 And the second concentration of N-type dopant (nitrogen) (on carrier substrate 20) is approximately 1 × 10⁻⁶. 20 / cm 3 To achieve the desired low resistivity, a carrier substrate 20 is selected such that silicon carbide grains 21i, 21j with a size of less than or equal to 500 nm cover more than or equal to 20% of the surface area of ​​their bonding surfaces in the principal plane (x,y). This helps to achieve a density of c-SiC inclusions 31 that is favorable for vertical electrical conduction, which is compatible with the desired target. The third concentration of the dopant (inclusions) is between the first and second concentrations.

[0052] According to the second embodiment, the first concentration of the N-type dopant (working layer) is approximately 3 × 10⁻⁶. 18 / cm 3 And the second concentration of the N-type dopant (carrier substrate) is approximately 1 × 10⁻⁶. 20 / cm 3 To achieve the desired low resistivity, a carrier substrate is selected such that silicon carbide grains with a size of 500 nm or less cover 50% or even 60% of the surface area of ​​the substrate to be bonded. This facilitates the achievement of a density of c-SiC inclusions 31 with a third dopant concentration between a first and a second concentration, which are beneficial for vertical electrical conduction, thus aligning with the desired objective.

[0053] According to the third embodiment, the first concentration of the N-type dopant (working layer) is approximately 1 × 10⁻⁶. 18 / cm 3 And the second concentration of the N-type dopant (carrier substrate) is approximately 1 × 10⁻⁶. 20 / cm 3 To achieve the desired low resistivity, a carrier substrate is selected such that silicon carbide grains with a size of 500 nm or less cover more than 80% of the surface area of ​​the bonding surface in the main plane. Similarly, this facilitates achieving a density of c-SiC inclusions 31 with a third dopant concentration between a first and a second concentration, which is beneficial for vertical electrical conduction, consistent with the desired objective.

[0054] [ Figure 6The figures show theoretical curves obtained through numerical simulations of vertical electron transport in the composite structure 100. They show the evolution of the resistivity of the intermediate region 30 as a percentage of the surface area of ​​the carrier substrate 20, in which grains 21i, 21j have a size of less than or equal to 500 nm (on its bonding surface 20a side). When the second dopant concentration of the carrier substrate 20 (at [ Figure 6 ] is denoted as N polySiC Very high (typically 5×10) 20 / cm 3 When the substrate 20 has a certain percentage of small grains (<500nm), it is not necessary because regardless of the doping level of the working layer 10 (in the range of 1×10⁻⁶), it is not necessary for the carrier substrate 20 to have a certain percentage of small grains (<500nm), because regardless of the doping level of the working layer 10 (in the range of 1×10⁻⁶), it is not necessary for the carrier substrate 20 to have 18 / cm 3 Up to 5×10 18 / cm 3 Regardless of the value (between), a value less than 10 can be achieved. -5 ohm.cm 2 The resistivity. On the other hand, when the concentration of the second dopant is approximately 1 × 10⁻⁶. 20 / cm 3 At that time, achieve less than 10 -5 ohm.cm 2 The resistivity will depend on the presence of small grains that facilitate the formation of c-SiC inclusions 31, which benefit from a third dopant concentration higher than the first concentration of the working layer 10. The lower the first concentration, the higher the percentage of grains 21i, 21j with a size of less than or equal to 500 nm in the surface area of ​​the bonded surface 20a of the carrier substrate 20.

[0055] The present invention also relates to a composite structure 100 having a front side 100a and a back side 100b extending parallel to the principal plane (x,y). Figure 1 It includes a working layer 10 with a first concentration of N-type dopant. Typically, the first concentration is 1 × 10⁻⁶. 18 / cm 3 Up to 5×10 18 / cm 3 between.

[0056] It also includes a support substrate 20 with a second concentration of N-type dopant, which is higher than the first concentration. Typically, the second concentration is 1 × 10⁻⁶. 20 / cm 3 Up to 5×10 20 / cm 3 Between, or even preferably limited to 1×10 20 / cm 3 Up to 2×10 20 / cm 3 The range between them.

[0057] Advantageously, the carrier substrate 20 includes silicon carbide grains 21i, 21j with dimensions less than or equal to 2 μm, less than or equal to 1 μm, or even less than or equal to 500 nm on at least its bonding surface 20a side, said grains covering more than or equal to 20% of the surface area of ​​the bonding surface 20a in the principal plane (x,y). In a particular embodiment, the silicon carbide grains 21i, 21j with dimensions less than or equal to 2 μm, less than or equal to 1 μm, or even less than 500 nm cover more than or equal to 30%, 40%, 50%, 60%, 70%, or even 80% of the surface area of ​​the bonding surface 20a of the carrier substrate 20 in the principal plane (x,y).

[0058] Advantageously, the grains of the carrier substrate 20 have significant orientation differences on their bonded surface 20a side, either between themselves (i.e., between two adjacent grains) or relative to orientation

[111] . As previously mentioned in the method according to the invention, this favors the interaction between the silicon droplets and the grain boundaries 22 (in step f), because the low stability of the grain boundaries 22 associated with this orientation difference makes it energy-friendly for silicon to dissolve carbon atoms at the grain boundaries 22. Orientation differences greater than 10°, 20°, or even 30° appear to be particularly advantageous. Such orientation differences are expected between grains 21i, 21j covering at least 20%, 30%, 40%, or even greater than 50% of the surface area of ​​the bonded surface 20a of the carrier substrate 20.

[0059] The composite structure 100 also includes an intermediate region 30 that extends along the main plane (x,y) and includes an interface region between the bonded surface 1a of the working layer 10 and the bonded surface 20a of the carrier substrate 20.

[0060] The intermediate region 30 includes single-crystal silicon carbide inclusions 31 that are in direct contact with the working layer 10 and extend between the grains 21i and 21j of the carrier substrate 20 in a direction (z) perpendicular to the principal plane (x, y). The inclusions 31 have a third concentration of N-type dopant, between a first and a second concentration. The presence of these inclusions 31 provides significant advantages in terms of electrical conductivity in the intermediate region 30 of the composite structure 100.

[0061] The intermediate region 30 may have a value of 0.1 / μm in the principal plane (x,y). 2 Up to 1 / μm 2 The density of the inclusions between them is 31.

[0062] Inclusion 31 typically has a thickness between 20 nm and 70 nm along an axis (z) perpendicular to the principal plane (x, y) and a width between 100 nm and 700 nm in the principal plane (x, y).

[0063] As already mentioned in the description of the method for manufacturing the composite structure 100, the intermediate region 30 may also include silicon junctions 32, 33 and steps 34 at the interface region between the bonded surface of the working layer 10 and the bonded surface of the carrier substrate 20.

[0064] Of course, the present invention is not limited to the described embodiments, and variant embodiments may be conceived without departing from the scope of the invention as defined by the claims.

Claims

1. A composite structure (100) having a front side (100a) and a back side (100b) extending parallel to a principal plane (x,y), and comprising: - A working layer (10) made of single-crystal silicon carbide with a first concentration of N-type dopant, one free face of the working layer forming the front face (100a). - A carrier substrate (20) made of polycrystalline silicon carbide with a second concentration of N-type dopant, one free side of which forms the back side (100b), the second concentration being higher than the first concentration. - Intermediate region (30), which extends along the main plane (x,y) and includes the interface region between the bonded surface (1a) of the working layer (10) and the bonded surface (20a) of the carrier substrate (20); The composite structure (100) is characterized in that the intermediate region (30) includes a single-crystal silicon carbide inclusion (31) which is in direct contact with the working layer (10) and extends between the grains (21i, 21j) of the carrier substrate (20) in a direction (z) perpendicular to the main plane (x,y), and the inclusion (31) has a third N-type dopant concentration between the first concentration and the second concentration.

2. The composite structure (100) according to claim 1, wherein the carrier substrate (20) includes silicon carbide grains (21i, 21j) having a size of less than or equal to 500 nm on at least its bonded surface (20a) side, the grains (21i, 21j) covering more than or equal to 20% of the surface area of ​​the bonded surface (20a) in the principal plane (x,y).

3. The composite structure (100) according to any one of the preceding claims, wherein the silicon carbide grains (21i, 21j) having a size of less than 500 nm cover 50% or even 80% of the surface area of ​​the bonded surface (20a) of the carrier substrate (20) in the main plane (x,y).

4. The composite structure (100) according to any one of the preceding claims, wherein at least 20% of the silicon carbide grains (21i, 21j) on the bonding surface (20a) side of the carrier substrate (20) have an orientation difference of greater than or equal to 30° between themselves or relative to the orientation [111].

5. The composite structure (100) according to any one of the preceding claims, wherein the intermediate region (30) includes silicon nodules (32, 33) disposed in the interface region or below the inclusions (31) between the grains (21i, 21j) of the carrier substrate (20).

6. The composite structure (100) according to any one of the preceding claims, wherein the first concentration is 1×10 18 / cm 3 Up to 5×10 18 / cm 3 between.

7. The composite structure (100) according to any one of the preceding claims, wherein the second concentration is 1×10 20 / cm 3 Up to 5×10 20 / cm 3 Between, preferably between 1×10 20 / cm 3 Up to 2×10 20 / cm 3 between.

8. The composite structure (100) according to any one of the preceding claims, wherein the inclusion (31) has a thickness between 20 nm and 70 nm along an axis (z) perpendicular to the main plane (x, y) and a width between 100 nm and 700 nm in the main plane (x, y).

9. The composite structure (100) according to any one of the preceding claims, wherein the intermediate region (30) has a diameter of 0.1 μm in the principal plane (x,y). 2 Up to 1 / μm 2 Density of inclusions (31) between them.

10. A method for manufacturing a composite structure (100) according to any one of claims 1 to 9, the method comprising the following steps: a) Provide a single-crystal silicon carbide donor substrate (1) having a first concentration of N-type dopant and including a buried brittle plane (11) induced by ion implantation of a light material. b) Provide a polycrystalline carrier substrate (20); c) Deposit a silicon film (3') on the bonding surface (1a) of the donor substrate (1) and / or on the bonding surface (20a) of the carrier substrate (20). d) The donor substrate (1) and the carrier substrate (20) are bonded at their bonding surfaces (1a, 20a) to obtain a bonded assembly (50) comprising a silicon interlayer (3) between the donor substrate (1) and the carrier substrate (20) derived from the film (3') deposited in step c), the interlayer (3) having a thickness between 8 nm and 30 nm; e) Separate along the buried brittle plane (11) to form a transferred structure (100') comprising the working layer (10) disposed on the interlayer (3) transferred from the donor substrate (1), the interlayer itself being disposed on the carrier substrate (20); f) The transferred structure (100') is subjected to heat treatment at a plateau temperature between 1500°C and 2000°C to form the composite structure (100).

11. The method of manufacturing a composite structure (100) according to claim 10, wherein the carrier substrate (20) includes silicon carbide grains (21i, 21j) having a size of less than or equal to 500 nm on at least the side of the bonding surface (20a), the grains (21i, 21j) covering more than or equal to 20% of the surface area of ​​the bonding surface (20a) in the principal plane (x,y).

12. The method of manufacturing a composite structure (100) according to any one of claims 10 and 11, wherein at least 20% of the silicon carbide grains (21i, 21j) on the bonded surface (20a) side of the carrier substrate (20) have an orientation difference of greater than or equal to 30° between themselves or relative to the orientation [111].

13. The method of manufacturing a composite structure (100) according to any one of claims 10 to 12, wherein the plateau temperature is maintained for a duration between 30 minutes and 4 hours.

14. The method of manufacturing a composite structure (100) according to any one of claims 10 and 13, wherein the treatment in step f) has a heating slope of less than or equal to 20 °C / min or even less than or equal to 10 °C / min.

15. The method of manufacturing the composite structure (100) according to any one of claims 10 to 14, wherein: - The second concentration is approximately 1×10 20 / cm 3 , - The first concentration is approximately 3 × 10 18 / cm 3 ,and - The silicon carbide grains (21i, 21j) having a size of less than or equal to 500 nm cover 50% or even 60% of the surface area of ​​the bonding surface (20a) of the carrier substrate (20) in the main plane (x,y).

16. The method of manufacturing the composite structure (100) according to any one of claims 10 to 14, wherein: - The second concentration is approximately 1×10 20 / cm 3 , - The first concentration is approximately 1 × 10 18 / cm 3 ,and - The silicon carbide grains (21i, 21j) having a size of less than or equal to 500 nm cover 80% or more of the surface area of ​​the bonding surface (20a) of the carrier substrate (20) in the main plane (x,y).

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