Alignment marks used in wafer bonding processes, wafer bonding methods using the same, wafer alignment error measurement methods using the same

Abstract

The present application relates to an alignment mark for alignment of a first semiconductor wafer and a second semiconductor wafer in a wafer bonding process in which the first semiconductor wafer and the flipped second semiconductor wafer are aligned and bonded with the faces on which semiconductor elements are formed facing each other, and a wafer bonding method using the alignment mark. The present application provides an alignment mark used in a wafer bonding process, comprising: a first alignment mark formed on a predetermined first region of the first semiconductor wafer and having a first center of symmetry; and a second alignment mark formed on a predetermined second region of the second semiconductor wafer and having a second center of symmetry, the second region overlapping the first region when the first semiconductor wafer and the flipped second semiconductor wafer are bonded, the first center of symmetry overlapping the second center of symmetry when the first semiconductor wafer and the flipped second semiconductor wafer are aligned, and a difference between the first center of symmetry and the second center of symmetry indicating an alignment error between the first semiconductor wafer and the flipped second semiconductor wafer.

Description

Technical Field

[0001] The present invention relates to an alignment mark for aligning a first semiconductor wafer and a flipped second semiconductor wafer in a wafer bonding process in which the surfaces on which semiconductor elements are formed are aligned and bonded facing each other, a wafer bonding method using the alignment mark, and a wafer alignment error measurement method using the alignment mark. Background Technology

[0002] If semiconductor integration was previously achieved by miniaturizing patterns on the XY plane, more recently it has been achieved by stacking patterns along the Z-axis.

[0003] Furthermore, semiconductor integration is achieved using wafer bonding technology, which joins two semiconductor wafers containing semiconductor elements into one. For example, a method is used to bond semiconductor wafers containing memory elements to semiconductor wafers containing logic elements, and electrically connect the pads of the memory elements to the pads of the logic elements.

[0004] If misalignment occurs between semiconductor wafers, there is a problem that the pads of memory elements and the pads of logic elements cannot be electrically connected.

[0005] To solve this problem, a method is adopted in which alignment marks are formed on each semiconductor wafer and these alignment marks are used to align the semiconductor wafers.

[0006] For example, US Patent Publication US 2023 / 0135060 A1 discloses a method for aligning a first wafer and a second wafer by aligning a first alignment mark on a first wafer with a second alignment mark on a second wafer.

[0007] However, in semiconductor wafer bonding processes, to measure the alignment between wafers, it is necessary to acquire an image of the alignment marks through the silicon wafer used as a substrate for forming semiconductor devices. This requires infrared illumination. However, using infrared illumination leads to a significant decrease in optical resolution. Therefore, in order to accurately measure alignment while maintaining the size of the alignment marks, the design of the alignment marks must be changed.

[0008] Furthermore, Korean Patent 10-2440758 discloses an overlay mark capable of generating a non-periodic symmetrical signal, enabling accurate measurement of overlay errors even when they are very large. In the case of generating a periodic signal, it is difficult to distinguish when the overlay error exceeds one period. The overlay mark in Korean Patent 10-2440758 generates a non-periodic symmetrical signal by varying the spacing between the bars. For this purpose, at least four bars are required for each region. Since optical resolution determines the maximum width and spacing of the bars, using infrared illumination would require an overlay mark that increases in size to generate the non-periodic symmetrical signal.

[0009] Existing technical documents

[0010] US Patent Publication US 2023 / 0135060A1

[0011] Korean Patent Publication No. 10-2011-0135104

[0012] Korean Patent No. 10-2440758 Summary of the Invention

[0013] Technical issues

[0014] The present invention aims to improve the above-mentioned problems and its purpose is to provide a novel alignment mark for use in wafer bonding processes, which can easily measure alignment errors even when the alignment error is large, and is small in size.

[0015] Technical solution

[0016] To achieve the above objectives, the present invention provides an alignment mark used in a wafer bonding process. This alignment mark is used in a wafer bonding process that aligns and bonds a first semiconductor wafer with a flipped second semiconductor wafer. The alignment mark used in the wafer bonding process includes: a first alignment mark formed in a predetermined first region of the first semiconductor wafer and having a first center of symmetry; and a second alignment mark formed in a predetermined second region of the second semiconductor wafer and having a second center of symmetry. When the first semiconductor wafer is bonded with the flipped second semiconductor wafer, the second region overlaps with the first region. When the first semiconductor wafer and the flipped second semiconductor wafer are aligned, the first center of symmetry overlaps with the second center of symmetry. The difference between the first center of symmetry and the second center of symmetry represents the alignment error between the first semiconductor wafer and the flipped second semiconductor wafer.

[0017] The first alignment mark includes: a first mark structure disposed at the center of the alignment mark, and including a first bar pattern and a second bar pattern, wherein the first bar pattern includes a plurality of first bars spaced apart along a first direction, and the second bar pattern includes a plurality of second bars spaced apart along the first direction, and is rotationally symmetrical with the first bar pattern by 180 degrees; and

[0018] The third marking structure includes a fifth rod pattern and a sixth rod pattern disposed on a first diagonal, separated from the first marking structure. The fifth rod pattern and the sixth rod pattern are rotationally symmetrical by 180 degrees. The fifth rod pattern includes a plurality of fifth rods spaced apart along a second direction orthogonal to the first direction. The sixth rod pattern includes a plurality of sixth rods spaced apart along the second direction.

[0019] Additionally, the flipped second alignment mark includes: a second mark structure comprising a third rod pattern and a fourth rod pattern, the third rod pattern being offset from the first rod pattern in the second direction and including a plurality of third rods spaced apart along the first direction; the fourth rod pattern including a plurality of fourth rods spaced apart along the first direction, and configured to face the third rod pattern across the first mark structure and to be rotationally symmetrical with the third rod pattern by 180 degrees; and

[0020] The fourth marking structure includes a seventh rod pattern and an eighth rod pattern disposed on a second diagonal intersecting the first diagonal, separated from the first marking structure. The seventh rod pattern and the eighth rod pattern are rotationally symmetrical by 180 degrees. The seventh rod pattern includes a plurality of seventh rods spaced apart along the second direction, and the eighth rod pattern includes a plurality of eighth rods spaced apart along the second direction.

[0021] In addition, each bar pattern included in the first alignment mark and the second alignment mark includes at least two bars with different widths from each other.

[0022] Furthermore, in the alignment marks used in the wafer bonding process provided by the present invention, the spacing between the bars included in each bar pattern included in the first alignment mark and the second alignment mark is constant.

[0023] Furthermore, according to the alignment marks used in the provided wafer bonding process, among the bars in each bar pattern included in the first alignment mark and the second alignment mark, the width of the bar disposed at the center is wider than the width of the bar disposed at the outer contour.

[0024] Furthermore, according to the alignment marks used in the provided wafer bonding process, each bar pattern included in the first alignment mark and the second alignment mark includes three bars, with the bar disposed at the center having a first width and the bar disposed at the outer contour having a second width, the first width being wider than the second width.

[0025] Furthermore, according to the alignment marks used in the provided wafer bonding process, the first bar and the second bar are interconnected along the second direction.

[0026] Furthermore, according to the alignment marks used in the provided wafer bonding process, the alignment marks can be identified by an optical measurement device that uses infrared light as an illumination source, and have an area of ​​less than 20 μm × 20 μm.

[0027] Furthermore, according to the alignment marks used in the provided wafer bonding process, each bar in each bar pattern included in the first alignment mark and the second alignment mark is composed of multiple segmented micro-elements.

[0028] Furthermore, the fine features are parallel lines or quadrilaterals, depending on the alignment marks used in the provided wafer bonding process.

[0029] Furthermore, based on the alignment marks used in the provided wafer bonding process, the plurality of segmented micro-elements have a narrow width and spacing that cannot be optically resolved by the optical measurement device that captures the alignment marks.

[0030] Furthermore, according to the alignment marks used in the provided wafer bonding process, in each bar pattern included in the first alignment mark and the second alignment mark, the bar disposed at the center is composed of multiple segmented micro-elements.

[0031] Furthermore, the present invention provides a wafer bonding method that utilizes the aforementioned alignment mark. The wafer bonding method includes the steps of: forming the first alignment mark in a first region of a first semiconductor wafer and forming the second alignment mark in a second region of a second semiconductor wafer; adjusting the relative position between the first semiconductor wafer and the second semiconductor wafer in a manner that aligns the first alignment mark with the second alignment mark; and bonding the first semiconductor wafer and the second semiconductor wafer.

[0032] Furthermore, the present invention provides a wafer alignment error measurement method, which utilizes the aforementioned alignment mark. The wafer alignment error measurement method includes: acquiring an alignment mark image; selecting two regions of a first alignment mark that are symmetrical to each other at 180 degrees with respect to the center of the acquired alignment mark image; projecting the two-dimensional images of the two regions into one dimension to obtain a pair of charts representing each region; and comparing the pair of charts to determine the offset value between the center of the first alignment mark and the center of the alignment mark image.

[0033] Furthermore, according to the provided wafer alignment error measurement method, the step of obtaining the alignment mark image is: adjusting the wavelength or focus position of the illumination used in the step of obtaining the alignment mark image to obtain an alignment mark image in which the first to eighth bar patterns are displayed darker than the background area.

[0034] The effects of the invention

[0035] The alignment mark of the present invention can generate a non-periodic symmetrical signal. Therefore, alignment errors can be easily measured even when they are large. Furthermore, since the non-periodic symmetrical signal is generated by adjusting the widths of the bars differently, the alignment mark of the present invention only requires three bars to generate the non-periodic symmetrical signal. Therefore, the size of the alignment mark can be reduced when infrared light is used for illumination. Attached Figure Description

[0036] Figure 1 A first semiconductor wafer with first alignment marks formed is shown.

[0037] Figure 2 A second semiconductor wafer with second alignment marks formed is shown.

[0038] Figure 3 This is a diagram illustrating a method for confirming the alignment error between a first semiconductor wafer and a flipped second semiconductor wafer.

[0039] Figure 4 This is an example of an alignment mark image.

[0040] Figure 5 Show Figure 4 The first alignment mark is shown.

[0041] Figure 6 Show Figure 4 The second alignment mark is shown.

[0042] Figure 7 It is used for explanation Figure 4 The diagram shows the effect of reducing the size of the alignment mark.

[0043] Figure 8 This is a diagram used to illustrate the method for measuring alignment error.

[0044] Figure 9 This is another example of a graph used to measure alignment error.

[0045] Figure 10 This is a diagram illustrating alignment marks according to another embodiment of the present invention.

[0046] Figure 11 This is a diagram showing other examples of the first bar pattern.

[0047] Figure 12 This is a diagram illustrating a portion of the alignment marks according to yet another embodiment of the present invention. Detailed Implementation

[0048] Hereinafter, some embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the embodiments of the present invention can be modified in many other ways, and the scope of the present invention should not be construed as limited to the embodiments detailed below. The embodiments of the present invention are provided to illustrate the present invention more completely to those skilled in the art. Therefore, the shapes of elements in the drawings are exaggerated for the purpose of emphasizing clarity, and elements indicated by the same reference numerals in the drawings refer to the same elements.

[0049] Figure 1 This is a diagram showing a first semiconductor wafer with first alignment marks formed on it. Figure 2 This is a diagram showing a second semiconductor wafer with second alignment marks formed on it.

[0050] The first semiconductor wafer 1 and the second semiconductor wafer 2 may include a silicon wafer and multiple patterned layers forming a semiconductor device. Other wafers besides silicon wafers may also be used.

[0051] like Figure 1 As shown, a first alignment mark 10 is formed in a predetermined area of ​​the first semiconductor wafer 1. A plurality of first alignment marks 10 may be formed on the first semiconductor wafer 1.

[0052] like Figure 2 As shown, a second alignment mark 20 is formed in a predetermined area of ​​the second semiconductor wafer 2. A plurality of second alignment marks 20 may be formed on the second semiconductor wafer 2.

[0053] When the first semiconductor wafer 1 is combined with the flipped second semiconductor wafer 2, the region where the second alignment mark 20 is formed overlaps with the region where the corresponding first alignment mark 10 is formed.

[0054] exist Figure 1 and Figure 2In the illustration, the first alignment mark 10 and the second alignment mark 20 are formed on the uppermost layer and exposed to the outside, but other layers may also be formed above the first alignment mark 10 and the second alignment mark 20.

[0055] Figure 3 This is a diagram used to illustrate the method of obtaining alignment mark images.

[0056] like Figure 3 As shown, the camera 5 captures images of the overlapping first alignment mark 10 and second alignment mark 20 simultaneously to obtain an alignment mark image including both the first alignment mark 10 and the flipped second alignment mark 20. Then, by analyzing the acquired alignment mark image, alignment errors can be confirmed. The illumination used for capturing the image can be high reflectivity for the first alignment mark 10 and second alignment mark 20, low reflectivity for the second semiconductor wafer 2, and high transmittance. For example, if a silicon wafer is used as the second semiconductor wafer 2, the wavelength range of the illumination is preferably between 900 nm and 2000 nm. This is because, although there are differences depending on the thickness of the silicon wafer, a region of rapidly changing (increased) light transmittance forms at the edge of the wafer starting from around 900 nm.

[0057] When the first alignment mark 10 is embedded in the first semiconductor wafer 1, it can also provide illumination with high transmittance to the first semiconductor wafer 1. The illumination is reflected from the second alignment mark 20 and the first alignment mark 10 after being transmitted through the second semiconductor wafer 2.

[0058] like Figure 3 As shown, the alignment mark image can be acquired during the alignment process or after the bonding of the first semiconductor wafer 1 and the second semiconductor wafer 2 is completed. When acquired during the alignment process, the measured alignment error can be used for the alignment of the first semiconductor wafer 1 and the second semiconductor wafer 2. When acquired after bonding, the measured alignment error can be used to determine whether the bonded wafers are defective.

[0059] The first semiconductor wafer 1 and the second semiconductor wafer 2 are fixed on a stage, worktable, vacuum chuck, etc., which can move along the X, Y, and Z directions, and can perform planar movement for alignment and distance adjustment between the first semiconductor wafer 1 and the second semiconductor wafer 2 for bonding.

[0060] Figure 4 This is a diagram illustrating an example of an alignment mark image. Figure 5 Show Figure 4 The first alignment mark shown, Figure 6 Show Figure 4 The second alignment mark is shown. Figure 5 The first alignment mark 10 is shown as viewed from the top surface of the first semiconductor wafer 1. Figure 6The second alignment mark 20 is shown as viewed from the back side of the second semiconductor wafer 2.

[0061] Alignment mark 30 includes a first alignment mark 10 and a flipped second alignment mark 20. In the step of measuring alignment error, such as... Figure 4 As shown, an alignment mark image can be obtained showing the state in which the first alignment mark 10 overlaps with the flipped second alignment mark 20.

[0062] Figure 4 The COI indicates the center of the alignment mark image. For example, if the size of the alignment mark image is 100×100 pixels, the XY coordinates of the center COI of the alignment mark image can be (50 pixels, 50 pixels).

[0063] exist Figure 4 For convenience, the diagram shows that the center of symmetry COS1 of the first alignment mark 10, the center of symmetry COS2 of the second alignment mark 20, and the center COI of the alignment mark image are all the same. However, when alignment errors exist, the center of symmetry COS1 of the first alignment mark 10 and the center of symmetry COS2 of the second alignment mark 20 will not be the same. Furthermore, regardless of whether there are alignment errors, the center COI of the alignment mark image may differ from the center of symmetry COS1 of the first alignment mark 10 and the center of symmetry COS2 of the second alignment mark 20.

[0064] The alignment error between the first semiconductor wafer 1 and the flipped second semiconductor wafer 2 can be measured by measuring the offset between the center of symmetry COS1 of the first alignment mark 10 and the center of symmetry COS2 of the second alignment mark 20.

[0065] When the alignment error between the first semiconductor wafer 1 and the flipped second semiconductor wafer 2 is 0 (zero), the center of symmetry COS1 of the first alignment mark 10 and the center of symmetry COS2 of the second alignment mark 20 coincide with each other. The difference between the center of symmetry COS1 of the first alignment mark 10 and the center of symmetry COS2 of the second alignment mark 20 represents the alignment error between the first semiconductor wafer 1 and the flipped second semiconductor wafer 2.

[0066] like Figure 4 and Figure 5 As shown, the first alignment mark 10 includes a first mark structure 100 and a third mark structure 300.

[0067] like Figure 4 and Figure 6 As shown, the second alignment mark 20 includes a second mark structure 200 and a fourth mark structure 400.

[0068] A first marking structure 100 is disposed at the center of the alignment mark 30. The first marking structure 100 includes a first bar pattern 110 and a second bar pattern 120. In this embodiment, the first bar pattern 110 and the second bar pattern 120 are connected to each other. The first marking structure 100 is rotationally symmetrical about the center of symmetry COS1 of the first alignment mark 10 by 180 degrees.

[0069] In this embodiment, the first bar pattern 110 and the second bar pattern 120 are used to locate the center of the first alignment mark 10 in the X-axis direction.

[0070] The first bar pattern 110 includes a plurality of first bars 112a, 112b that are elongated in the Y-axis direction. The first bars 112a, 112b are spaced apart in the X-axis direction. The spacing between the first bars 112a, 112b can be constant. The first bar pattern 110 is symmetrical about a center line in the Y-axis direction (aligned with the Y-axis) passing through the center of the first alignment mark 10.

[0071] The first bar pattern 110 includes first bars 112a and 112b with different widths. In this embodiment, the widths of the first bars 112a and 112b narrow as they move away from the center line in the Y-axis direction. That is, the width of the first bar 112a located in the center is wider than the width of the first bars 112b located on both sides. Conversely, the width of the first bar located in the center can also be narrower than the width of the first bars located on both sides, but from the perspective of reducing the size of the alignment mark 30, it is preferable that the width of the first bar 112a located in the center is wider. This is because, due to the limitation of the resolution of the optical measuring device, the spacing between the bars cannot be further reduced, and it is necessary to increase the width of the two first bars on both sides (rather than one first bar) to a width greater than the minimum width.

[0072] The second bar pattern 120 also includes a plurality of second bars 122a, 122b that are elongated in the Y-axis direction. The second bars 122a, 122b are spaced apart in the X-axis direction. The second bar pattern 120 is symmetrical about a center line in the Y-axis direction (which coincides with the Y-axis) passing through the center of the first alignment mark 10. The second bars 122a, 122b are also configured such that their width narrows as they move away from the center line in the Y-axis direction.

[0073] In this embodiment, the first rods 112a and 112b and the second rods 122a and 122b are connected to each other in the Y-axis direction, but the first rods 112a and 112b and the second rods 122a and 122b can also be separated from each other.

[0074] The first rods 112a and 112b and the second rods 122a and 122b are shown as three in the diagram, but if the size is not limited, there can be four or more.

[0075] The second marking structure 200 includes a third bar pattern 210 and a fourth bar pattern 220. The second marking structure 200 is rotationally symmetrical about the center of symmetry of the second alignment mark 20 by 180 degrees. The third bar pattern 210 and the fourth bar pattern 220 are arranged vertically above the first marking structure 100.

[0076] In this embodiment, the third bar pattern 210 and the fourth bar pattern 220 are used to locate the X-axis center of the second alignment mark 20. Additionally, the first mark structure 100 and the second mark structure 200 are used to measure the X-axis alignment error between the first semiconductor wafer 1 and the second semiconductor wafer 2.

[0077] The third bar pattern 210 includes multiple third bars 212a and 212b that are elongated in the Y-axis direction. The third bars 212a and 212b are spaced apart in the X-axis direction. The third bar pattern 210 is symmetrical about the Y-axis centerline (which is aligned with the Y-axis) passing through the center of the third bar pattern 210. The width of the third bars 212a and 212b narrows as they move away from the Y-axis centerline.

[0078] The fourth bar pattern 220 also includes multiple fourth bars 222a and 222b that are formed relatively long in the Y-axis direction. The fourth bars 222a and 222b are spaced apart along the X-axis direction. The fourth bar pattern 220 is symmetrical about a Y-axis centerline (aligned with the Y-axis) passing through the center of the fourth bar pattern 220. The spacing between the fourth bars 222a and 222b narrows as they move away from the Y-axis centerline.

[0079] The third rods 212a and 212b and the fourth rods 222a and 222b are shown as three in the diagram, but if the size is not limited, there can be four or more.

[0080] The number and spacing of the third rods 212a, 212b and the fourth rods 222a, 222b are the same as those of the first rods 112a, 112b and the second rods 122a, 122b, but the number and spacing can also be different from each other.

[0081] The third marking structure 300 includes a fifth bar pattern 310 and a sixth bar pattern 320. The third marking structure 300 is rotationally symmetrical about the center of symmetry COS1 of the first aligned mark 10. The fifth bar pattern 310 and the sixth bar pattern 320 are positioned on the first diagonal D1, separated from the first marking structure 100. Figure 4 and Figure 5 In the middle, the fifth bar pattern 310 is positioned at the upper left end, and the sixth bar pattern 320 is positioned at the lower right end.

[0082] The fifth bar pattern 310 includes a plurality of fifth bars 312a, 312b that are elongated in the X-axis direction. The fifth bars 312a, 312b are spaced apart in the Y-axis direction. The width of the fifth bars 312a, 312b narrows as they move away from the center line of the fifth bar pattern 310.

[0083] The sixth bar pattern 320 also includes a plurality of sixth bars 322a and 322b that are formed elongatedly in the X-axis direction. The sixth bars 322a and 322b are spaced apart along the Y-axis direction. The width of the sixth bars 322a and 322b narrows as they move away from the center of the sixth bar pattern 320.

[0084] The fifth rods 312a and 312b and the sixth rods 322a and 322b are shown as three in the diagram, but there could also be four or more.

[0085] The fourth marking structure 400 includes a seventh bar pattern 410 and an eighth bar pattern 420. The fourth marking structure 400 is rotationally symmetrical about the center of symmetry of the second alignment mark 20. The seventh bar pattern 410 and the eighth bar pattern 420 are positioned on the second diagonal D2, separated from the first marking structure 100. The first diagonal D1 and the second diagonal D2 intersect each other. Figure 4 and Figure 6 In the middle, the seventh bar pattern 410 is positioned at the upper right end, and the eighth bar pattern 420 is positioned at the lower left end.

[0086] In this embodiment, the seventh bar pattern 410 and the eighth bar pattern 420 are used to locate the Y-axis center of the second alignment mark 20. Additionally, the third mark structure 300 and the fourth mark structure 400 are used to measure the Y-axis alignment error between the first semiconductor wafer 1 and the second semiconductor wafer 2.

[0087] The seventh bar pattern 410 includes a plurality of seventh bars 412a, 412b that are elongated in the X-axis direction. The seventh bars 412a, 412b are spaced apart in the Y-axis direction. The width of the seventh bars 412a, 412b narrows as they move away from the center line of the seventh bar pattern 410.

[0088] The eighth bar pattern 420 also includes multiple eighth bars 422a and 422b that are formed relatively long in the X-axis direction. The eighth bars 422a and 422b are spaced apart along the Y-axis direction. The width of the eighth bars 422a and 422b narrows as they move away from the center line of the eighth bar pattern 420.

[0089] The seventh rods 412a and 412b and the eighth rods 422a and 422b are shown as three in the diagram, but there could also be four or more.

[0090] Figure 7 It is used for explanation Figure 4 The diagram shows the effect of reducing the size of the alignment mark. Figure 7 The illustration is based on the following conditions: the minimum spacing between bars is 1.5 μm, the minimum width of bars is 1.5 μm, the spacing of the width that is different from the minimum spacing, and the width of the width that is different from the minimum width are 2.4 μm, all under the constraints of the optical measuring device.

[0091] like Figure 7 As shown in (a), the alignment mark of the present invention can form a left-right symmetrical aperiodic signal with three bars. However, as Figure 7 As shown in (b), at least four bars are required to create a left-right symmetrical aperiodic signal by varying the spacing between bars of equal width. The aperiodic signal on the right can be obtained by projecting an image of the bar pattern. The X-axis of the graph can be the pixel value in the X-axis direction, and the Y-axis can be the average intensity value of the grayscale values ​​of pixels with the same X-axis direction pixel value.

[0092] Therefore, when using bars of the same width, in order to transmit and Figure 4 For information at the same level as the alignment mark 30, an alignment mark that is 3 μm larger in the X-axis direction and 6 μm larger in the Y-axis direction than the alignment mark of the present invention is required. If the size of the alignment mark of the present invention is 20 μm × 20 μm, then when using bars of the same width, an alignment mark of 23 μm × 26 μm with an area approximately 50% larger is required. Thus, when it is necessary to minimize the size of the alignment mark, using the alignment mark of the present invention is very advantageous. The alignment mark of the present invention is an alignment mark identified by an optical measurement device using infrared light as an illumination source, and its area can be less than 20 μm × 20 μm.

[0093] The following is about the use of Figure 4 The method for measuring alignment error in the X-axis direction using the alignment mark image shown is explained.

[0094] Methods for measuring alignment errors may include the following steps.

[0095] First, the difference between the X value of the center of symmetry COS1 of the first alignment mark 10 and the X value of the center COI of the acquired alignment mark image is calculated (S11).

[0096] like Figure 4 As shown, select region A1 at the center of the acquired alignment mark image, and select region A2 that is 180 degrees symmetrical with respect to the center COI of the acquired alignment mark image.

[0097] Next, the two-dimensional images of the selected regions A1 and A2 are projected into one dimension. That is, in the two-dimensional image, the gray values ​​of pixels with the same X value are summed, or the average of the gray values ​​is calculated, or the gray values ​​are normalized. Thus, as shown... Figure 8 As shown in (a) and (b), graphs G representing the changes in grayscale corresponding to the X value can be plotted respectively. X1 G X2 At this point, chart G represents area A2. X2 It can be a chart obtained by projecting a two-dimensional image of area A2 and then flipping it horizontally.

[0098] Because the grayscale of the first bars 112a and 112b differs from the grayscale of the background area between the first bars 112a and 112b, therefore... Figure 8 As shown in (a), a graph G can be obtained showing the peaks at the positions of the first rods 112a and 112b. X1 .

[0099] If the X value of the symmetry center COS1 of the first alignment mark 10 is the same as the X value of the center COI of the acquired alignment mark image, then the two graphs G X1 G X2 They should be almost identical.

[0100] If the X-value of the symmetry center COS1 of the first alignment mark 10 is not the same as the X-value of the center COI of the acquired alignment mark image, then the two graphs G X1 G X2 The position of the peak value shifts. Furthermore, this shift value ΔX represents the difference between the X value of the center of symmetry COS1 of the first alignment mark 10 and the X value of the center COI of the acquired alignment mark image.

[0101] Alternatively, the difference between the X value of the center of symmetry COS1 of the first alignment mark 10 and the X value of the center COI of the acquired alignment mark image can be obtained by comparing the signal obtained by projecting a region that simultaneously includes the first rod pattern 110 and the second rod pattern 120 with the signal obtained by projecting the region after rotating it 180 degrees relative to the center COI of the alignment mark image.

[0102] In addition, using such Figure 9 The chart shown is G X1 ` G X2 ` The offset value ΔX can also be calculated using the same method. Figure 9 The chart shown is G X1 ` G X2` This can be obtained by projecting an alignment mark image that is brighter (greaker grayscale) than the pattern of the first through eighth bars onto the background area. This grayscale-inverted alignment mark image can be obtained by adjusting the wavelength and / or focus position of the illumination used in acquiring the alignment mark image.

[0103] In addition, using Figure 9 The chart shown is G X1 ` G X2 ` When using four bars, it exhibits the same advantage of displaying four peaks as when using four bars. Furthermore, because the dark area formed by the central bar of the bar pattern is wider, the influence from adjacent bright areas is reduced, and the boundary between the central bar and the background area becomes clearer, thus improving the contrast of the bar pattern. Figure 8 As shown, when the width of the bright area in the center is relatively wide while the width of the dark areas is narrow to the minimum width, it is difficult to expect such an effect.

[0104] Next, the difference between the X-value of the center of symmetry COS2 of the second alignment mark 20 and the X-value of the center COI of the acquired alignment mark image is calculated. In this step, region A3, including the third bar pattern 210, is selected in the acquired alignment mark image, and region A4, which is 180 degrees symmetrical about the center COI of the acquired alignment mark image, is selected. Then, after plotting graphs representing the two selected regions A2 and A4, the difference between the X-value of the center of symmetry COS2 of the second alignment mark 20 and the X-value of the center COI of the acquired alignment mark image is calculated using these graphs.

[0105] Next, using the difference between the X value of the center of symmetry COS1 of the first alignment mark 10 and the X value of the center COI of the acquired alignment mark image, and the difference between the X value of the center of symmetry COS2 of the second alignment mark 20 and the X value of the center COI of the acquired alignment mark image, the alignment error value in the X-axis direction is calculated.

[0106] By simply changing the projection direction, the same method can be used to calculate the difference between the Y value of the center of symmetry COS1 of the first alignment mark 10 and the Y value of the center COI of the acquired alignment mark image using signals from the fifth rod pattern 310 and the sixth rod pattern 320. Similarly, the difference between the Y value of the center of symmetry COS1 of the second alignment mark 20 and the Y value of the center COI of the acquired alignment mark image can be calculated using signals from the seventh rod pattern 410 and the eighth rod pattern 420. These values ​​can then be used to calculate the alignment error value in the Y-axis direction.

[0107] The following describes a wafer bonding method for aligning and bonding a first semiconductor wafer 1 and a flipped second semiconductor wafer 2 using the aforementioned alignment marks.

[0108] First, such as Figure 1 and Figure 2 As shown, a first alignment mark 10 and a second alignment mark 20 are formed in predetermined areas of the first semiconductor wafer 1 and the second semiconductor wafer 2, respectively.

[0109] The second alignment mark 20 is formed in a predetermined area of ​​the second semiconductor wafer 2 in a flipped state, overlapping with the first alignment mark 10, when the first semiconductor wafer 1 is combined with the flipped second semiconductor wafer 2.

[0110] Next, as Figure 3 As shown, the first semiconductor wafer 1 and the second semiconductor wafer 2 are temporarily aligned such that the surfaces of the first semiconductor wafer 1 and the second semiconductor wafer 2 with semiconductor elements face each other. In this step, the coordinates of the first alignment mark 10 and the second alignment mark 20 can be measured separately, and these coordinates can be used for temporary alignment.

[0111] Next, using camera 5, an image of the alignment marks where the first alignment mark 10 and the second alignment mark 20 overlap is acquired (e.g., Figure 4 (Image).

[0112] Then, the alignment mark image is analyzed to calculate the alignment error between the first center of symmetry COS1 and the second center of symmetry COS2 of the first alignment mark 10 and the second alignment mark 20.

[0113] Then, using this alignment error, the first alignment mark 10 and the second alignment mark 20 are aligned. When the first center of symmetry COS1 and the second center of symmetry COS2 overlap (when the alignment error is 0), the first alignment mark 10 and the second alignment mark 20 can be considered aligned. When the first alignment mark 10 and the second alignment mark 20 are aligned, the first semiconductor wafer 1 and the second semiconductor wafer 2 are also aligned.

[0114] Next, the aligned first semiconductor wafer 1 and the second semiconductor wafer 2 are bonded together.

[0115] Figure 10 This is a diagram illustrating alignment marks according to another embodiment of the present invention.

[0116] In this embodiment, the alignment mark is only different from the first rod 512a, 512b and the second rod 522a, 522b of the first rod pattern 510 and the second rod pattern 520 constituting the first mark structure 500 in that they are separated vertically. Figure 4 The embodiments shown differ.

[0117] It can be adopted with Figure 4 The alignment error is measured using the same method as the alignment mark shown in this embodiment.

[0118] Figure 11 This is a diagram showing other examples of the first bar pattern.

[0119] like Figure 11 As shown in (a) and (b), the bars 612a, 612b, 712a, 712b constituting the first bar patterns 610, 710 can be composed of multiple segmented fine elements 614a, 614b, 714a, 714b. The fine elements 614a, 614b, 714a, 714b can be parallel lines 614a, 614b or quadrilaterals 714a, 714b.

[0120] Using fine elements 614a, 614b, 714a, and 714b has the advantage of enhancing signal strength through constructive and destructive interference. In particular, when using infrared illumination, it is necessary to enhance signal strength due to potential resolution degradation. Furthermore, it has the advantage of reducing the loading effect that affects the uniformity and accuracy of the etching process. The width and spacing of the fine elements 614a, 614b, 714a, and 714b can be determined by the performance of the optical measuring device. The fine elements 614a, 614b, 714a, and 714b preferably have a narrow width and spacing that the optical measuring device cannot optically resolve. When the first bar pattern 610 and 710 are photographed using the optical measuring device, the fine elements 614a, 614b, 714a, and 714b are not distinguishable, and only three bars 612a, 612b, 712a, and 712b appear.

[0121] In addition, such as Figure 11 As shown in (c), among the bars 812a and 812b that constitute the first bar pattern 810, the wider bar 812a, which is only located in the center, may be composed of fine elements 814a.

[0122] constitute Figure 4 and Figure 10 The bars of the second to eighth bar patterns can also be like... Figure 11 The diagram shows a composition of multiple segmented, fine elements.

[0123] Figure 12 This is a diagram showing the center portion of the alignment mark according to another embodiment of the present invention. Figure 12 The alignment marks shown are only similar in shape to the first bar pattern 910 and the second bar pattern 920 located at the center. Figure 4 The alignment marks shown are different.

[0124] Figure 12 In the alignment marks shown, the first bar pattern 910 and the second bar pattern 920 are asymmetrical both horizontally and vertically. The length of the left bar 912b of the first bar pattern 910 is longer than the length of the right bar 912c, and the length of the left bar 922c of the second bar pattern 920 is shorter than the length of the right bar 922b.

[0125] Such Figure 12 The asymmetry of the alignment marks helps to sense inconsistencies that may occur during the deposition or etching process that forms the alignment marks. Furthermore, since the skew directions causing the asymmetry are exactly opposite, it helps to compensate for minute errors that arise during measurement. Additionally, it can be useful for sensing and correcting mechanical biases in the lithography apparatus.

[0126] The embodiments described above are merely illustrative of preferred embodiments of the present invention. The scope of the present invention is not limited to the described embodiments. Within the scope of the technical concept and claims of the present invention, those skilled in the art will be able to make various changes, modifications or substitutions, and such embodiments should be understood to fall within the scope of the present invention.

[0127] Figure Labels

[0128] 1: First semiconductor wafer, 2: First semiconductor wafer, 5: Camera, 10: First alignment mark, 20: Second alignment mark, 30: Alignment mark, 100: First mark structure, 110: First bar pattern, 120: Second bar pattern, 200: Second mark structure, 210: Third bar pattern, 220: Fourth bar pattern, 300: Third mark structure, 310: Fifth bar pattern, 320: Sixth bar pattern, 400: Fourth mark structure, 410: Seventh bar pattern, 420: Eighth bar pattern.

Claims

1. An alignment mark used in a wafer bonding process, the alignment mark being used in a wafer bonding process for aligning and bonding a first semiconductor wafer with a flipped second semiconductor wafer, the alignment mark being characterized in that it comprises: A first alignment mark is formed in a predetermined first region of the first semiconductor wafer and has a first center of symmetry; as well as A second alignment mark is formed in a predetermined second region of the second semiconductor wafer and has a second center of symmetry. When the first semiconductor wafer is combined with the flipped second semiconductor wafer, the second region overlaps with the first region. When the first semiconductor wafer is aligned with the flipped second semiconductor wafer, the first center of symmetry overlaps with the second center of symmetry. The difference between the first center of symmetry and the second center of symmetry represents the alignment error between the first semiconductor wafer and the flipped second semiconductor wafer. The first alignment mark includes: A first marking structure, disposed at the center of the alignment mark, includes a first bar pattern and a second bar pattern. The first bar pattern includes a plurality of first bars spaced apart along a first direction, and the second bar pattern includes a plurality of second bars spaced apart along the first direction, and is rotationally symmetrical with the first bar pattern by 180 degrees. The third marking structure includes a fifth rod pattern and a sixth rod pattern disposed on a first diagonal, separated from the first marking structure. The fifth rod pattern and the sixth rod pattern are rotationally symmetrical by 180 degrees. The fifth rod pattern includes a plurality of fifth rods spaced apart along a second direction orthogonal to the first direction. The sixth rod pattern includes a plurality of sixth rods spaced apart along the second direction. The flipped second alignment mark includes: A second marking structure includes a third rod pattern and a fourth rod pattern. The third rod pattern is offset from the first rod pattern in a second direction and includes a plurality of third rods spaced apart along the first direction. The fourth rod pattern includes a plurality of fourth rods spaced apart along the first direction and is configured to face the third rod pattern across the first marking structure and to be rotationally symmetrical with the third rod pattern by 180 degrees. The fourth marking structure includes a seventh rod pattern and an eighth rod pattern disposed on a second diagonal intersecting the first diagonal, separated from the first marking structure. The seventh rod pattern and the eighth rod pattern are rotationally symmetrical by 180 degrees. The seventh rod pattern includes a plurality of seventh rods spaced apart along the second direction, and the eighth rod pattern includes a plurality of eighth rods spaced apart along the second direction. Each bar pattern included in the first alignment mark and the second alignment mark includes at least two bars with different widths from each other.

2. The alignment mark used in the wafer bonding process according to claim 1, characterized in that, The spacing between the bars in each bar pattern included in the first alignment mark and the second alignment mark is constant.

3. The alignment mark used in the wafer bonding process according to claim 2, characterized in that, In each bar pattern included in the first alignment mark and the second alignment mark, the bar disposed at the center is wider than the bar disposed on the outer contour.

4. The alignment mark used in the wafer bonding process according to claim 3, characterized in that, Each bar pattern included in the first alignment mark and the second alignment mark includes three bars, with the bar disposed at the center having a first width and the bar disposed at the outer contour having a second width, the first width being wider than the second width.

5. The alignment mark used in the wafer bonding process according to claim 1, characterized in that, The first rod and the second rod are connected to each other along the second direction.

6. The alignment mark used in the wafer bonding process according to claim 1, characterized in that, The alignment mark can be identified by an optical measuring device that uses infrared light as an illumination source, and has an area of ​​less than 20 μm × 20 μm.

7. The alignment mark used in the wafer bonding process according to claim 1, characterized in that, Each bar in each bar pattern included in the first alignment mark and the second alignment mark is composed of multiple segmented micro-elements.

8. The alignment mark used in the wafer bonding process according to claim 7, characterized in that, The fine elements are parallel lines or quadrilaterals.

9. The alignment mark used in the wafer bonding process according to claim 7, characterized in that, The plurality of segmented micro-elements have narrow widths and spacings that cannot be optically resolved by the optical measuring device that photographs the alignment marks.

10. The alignment mark used in the wafer bonding process according to claim 1, characterized in that, In each bar pattern included in the first alignment mark and the second alignment mark, the bar located at the center is composed of multiple segmented micro-elements.

11. The alignment mark used in the wafer bonding process according to claim 1, characterized in that, The first bar pattern and the second bar pattern are asymmetrical with reference to the first and second direction baselines.

12. A wafer bonding method, the method utilizing the alignment mark of claim 1, characterized in that it comprises: The steps of forming the first alignment mark in the first region of the first semiconductor wafer and forming the second alignment mark in the second region of the second semiconductor wafer; The step of adjusting the relative position between the first semiconductor wafer and the second semiconductor wafer in a manner that aligns the first alignment mark with the second alignment mark; as well as The step of bonding the first semiconductor wafer to the second semiconductor wafer.

13. A wafer alignment error measurement method, the method utilizing the alignment mark as described in claim 1, characterized in that it comprises: The steps to obtain the alignment mark image; The step of selecting two regions of the first alignment mark that are symmetrical to each other by 180 degrees with respect to the center of the acquired alignment mark image; The step of projecting the two-dimensional images of the two regions into one dimension to obtain a pair of charts representing each region; as well as The step of comparing the pair of graphs to determine the offset value between the center of the first alignment mark and the center of the alignment mark image.

14. The wafer alignment error measurement method according to claim 13, characterized in that, The step of obtaining the alignment mark image is as follows: The step of adjusting the wavelength or focus of the illumination used in the step of obtaining the alignment mark image to obtain an alignment mark image in which the first to eighth rod patterns are displayed darker than the background area.

Images