Jig for mainboard end signal test

By using differential trace connections with consistent impedance and length in the motherboard end signal test, the impedance sudden change caused by differential trace to single-ended trace in the prior art is solved, and the accuracy of the test results and signal transmission quality are improved.

CN222145054UActive Publication Date: 2024-12-10SHENZHEN JIFANG IND CONTROL CO LTD
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Patent Information

Application Number
CN202420118011.9
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-01-17
Publication Date
2024-12-10
Estimated Expiration
2034-01-17

AI Technical Summary

Technical Problem

In the existing PCIE signal testing methods, impedance mutations when differential traces are turned into single-ended traces affect the accuracy of the test results and cannot effectively ensure the accuracy of the test results.

Method used

A fixture for signal testing on the motherboard is designed. By setting multiple pairs of differential signal terminals on the test board and connecting with one pair of differential traces, the impedance and length of the differential traces are consistent, and the delay difference is less than 2. picoseconds, reduce test errors and improve test accuracy.

Benefits of technology

By ensuring the consistency of the impedance and length of the differential trace, the test error is reduced, the signal transmission quality and detection accuracy are improved, and the reliability of the test results is ensured.

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Abstract

The utility model discloses a jig used for mainboard end signal test, which comprises a test board and a tester, and adopts the technical scheme that an access port of the test board is inserted into a connection port of a mainboard to be tested, and the tester is connected with a plurality of pairs of output ports through a plurality of cables; signals of the to-be-tested mainboard are led into the oscilloscope through the test board to be tested, the routing transmission quality of the to-be-tested mainboard is judged through various signal quality tests, the access port and the output port are connected through the pair of differential routing wires, it is guaranteed that the impedance of the pair of differential routing wires is consistent, and the lengths of the pair of differential routing wires are consistent; the delay difference between the channel differential pairs is smaller than two picoseconds, the test error is reduced, and the test accuracy is improved.
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Description

Technical Field

[0001] The utility model relates to the technical field of testing, in particular to a fixture for testing signals at a mainboard end. Background Art

[0002] With the rapid development of electronic and communication technologies, PCIE high-speed circuits face increasingly prominent challenges in the following important aspects: the integration scale of motherboard circuits is getting larger and larger, the functions are becoming more and more complex, the interconnection density between chips is increasing, the clock data rate is getting higher and higher, and the signal transition edge is getting faster and faster, which leads to more prominent problems in motherboard signal integrity; as the cycle of product launch continues to decrease, it is particularly important to successfully design products in a short time.

[0003] In the related art, when performing a PCIE signal test on the motherboard to be tested, the signal needs to be imported into a PCIE fixture and transmitted to an oscilloscope through a cable for signal waveform acquisition testing. However, the impedance mutation that occurs when the existing differential routing is converted to single-ended routing can easily affect the test results and cannot guarantee the accuracy of the test results. Utility Model Content

[0004] The main purpose of the utility model is to provide a fixture for mainboard end signal testing, aiming at improving the accuracy of the test results.

[0005] To achieve the above-mentioned purpose, the present invention provides a fixture for motherboard signal testing, comprising:

[0006] A test board, wherein the test board is provided with an access port, and the access port is plugged into the connection port of the mainboard to be tested, and the test board is provided with multiple pairs of output ports;

[0007] a tester connected to the multiple pairs of output ports via multiple cables;

[0008] Wherein, the access port includes a plurality of pairs of differential signal terminals, and a pair of the differential signal terminals is connected to a pair of the output ports via a pair of differential traces.

[0009] Optionally, the differential impedance of a pair of the differential traces is eighty-five ohms.

[0010] Optionally, the pair of differential traces have the same length and the same impedance.

[0011] Optionally, the differential trace is arc-shaped.

[0012] Optionally, the differential trace is a microstrip line.

[0013] Optionally, a plurality of ground vias are arranged at intervals on the test board.

[0014] Optionally, the output port is connected with an SMP connector, and the SMP connector is gold-plated.

[0015] Optionally, one end of the cable is connected to some of the SMP connectors, and a cap is connected to some of the SMP connectors.

[0016] Optionally, the access port is a gold finger board, and the differential signal terminal is a gold finger.

[0017] Optionally, the gold fingers are gold-plated, and a plurality of the gold fingers are arranged at intervals.

[0018] The technical solution of the utility model is that the access port of the test board is plugged into the connection port of the mainboard to be tested, and the tester is connected to multiple pairs of output ports through multiple cables, so that the signal of the mainboard to be tested is introduced into the oscilloscope through the test board for testing, and the transmission quality of the wiring of the mainboard to be tested is determined through various signal quality tests. The access port and the output port are connected by a pair of differential wiring to ensure that the impedance of the pair of differential wirings is consistent and the length is consistent, so that the delay difference between the differential pairs of each channel is less than two picoseconds, which is beneficial to reducing test errors and improving test accuracy. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the embodiments of the utility model or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the utility model. For ordinary technicians in this field, other drawings can be obtained based on the structures shown in these drawings without paying creative work.

[0020] Figure 1 This is a structural schematic diagram of an embodiment of a fixture for motherboard-side signal testing of the utility model;

[0021] Figure 2 It is a structural schematic diagram of another embodiment of the fixture for mainboard-side signal testing of the utility model.

[0022] Description of Figure Numbers:

[0023]

[0024]

[0025] The realization of the purpose, functional features and advantages of the utility model will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0026] The following will be combined with the drawings in the embodiments of the utility model to clearly and completely describe the technical solutions in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments of the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0027] It should be noted that all directional indications in the embodiments of the present invention (such as up, down, left, right, front, back...) are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.

[0028] In the present invention, unless otherwise clearly specified and limited, the terms "connection", "fixation", etc. should be understood in a broad sense. For example, "fixation" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0029] In addition, in the present utility model, descriptions such as "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In addition, the meaning of "and / or" appearing in the full text is to include three parallel solutions. Taking "A and / or B as an example", it includes solution A, or solution B, or solutions that satisfy both A and B. In addition, the technical solutions between the various embodiments can be combined with each other, but it must be based on the ability of ordinary technicians in this field to implement. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such combination of technical solutions does not exist and is not within the scope of protection required by the present utility model.

[0030] The utility model provides a fixture for mainboard end signal testing.

[0031] Reference Figure 1 to Figure 2 , Figure 1 This is a structural schematic diagram of an embodiment of a fixture for motherboard-side signal testing of the utility model; Figure 2 It is a structural schematic diagram of another embodiment of the fixture for mainboard-side signal testing of the utility model.

[0032] In the embodiment of the utility model, the fixture 100 for motherboard signal testing; Figure 1 to Figure 2 As shown, including:

[0033] A test board 20, wherein the test board 20 is provided with an access port 80, and the access port 80 is plugged into a connection port 90 of the main board 10 to be tested, and the test board 20 is provided with a plurality of pairs of output ports 60;

[0034] a tester connected to the plurality of pairs of output ports 60 via a plurality of cables 40;

[0035] The access port 80 includes a plurality of pairs of differential signal terminals, and a pair of the differential signal terminals is connected to a pair of the output ports 60 via a pair of differential traces 70 .

[0036] It should be noted that the test board 20 is a circuit board.

[0037] It should be noted that the size of the test board 20 is 22mmX80mm, so as to support data testing from PCIE1.0 to PCIE5.0.

[0038] It should be noted that the tester is an oscilloscope.

[0039] It can be understood that the cable 40 is a high-frequency cable.

[0040] The technical solution of the utility model is that the access port 80 of the test board 20 is plugged into the connection port 90 of the mainboard to be tested 10, and the tester is connected to the multiple pairs of the output ports 60 through multiple cables 40, so that the signal of the mainboard to be tested is introduced into the oscilloscope through the test board 20 for testing, and the transmission quality of the wiring of the mainboard to be tested 10 is determined through various signal quality tests, and the access port 80 is connected to the output port 60 through a pair of differential wiring 70 to ensure that the impedance of the pair of differential wiring 70 is consistent and the length is consistent, so that the delay difference between the differential pairs of each channel is less than two picoseconds, which is beneficial to reduce test errors and improve test accuracy.

[0041] Optionally, the differential impedance of a pair of the differential traces 70 is eighty-five ohms.

[0042] It is understandable that the impedance design of the pair of differential traces 70 controls the differential to 85 ohms to avoid excessive impedance changes in the entire link that affect signal transmission quality.

[0043] It can be understood that the differential impedance is eighty-five ohms, which ensures the continuity of impedance on the link, thereby improving the stability of signal transmission and improving the quality of signal transmission.

[0044] Optionally, the pair of differential traces 70 have the same length and the same impedance.

[0045] It is understandable that the output signal of the mainboard 10 to be tested passes through the connection port 90 and the access port 80 , is transmitted through the differential trace 70 and the output port 60 , and is received and detected by the tester through the cable 40 .

[0046] It can be understood that a pair of the differential traces 70 have the same length and impedance, so that the transmission loss of the differential signal is reduced during the transmission of the differential traces 70, and the delay difference between the differential pairs is less than 2 picoseconds, thereby improving the signal transmission quality and ensuring the accuracy of detection.

[0047] Optionally, the differential trace 70 is arc-shaped.

[0048] It can be understood that when the differential signal is transmitted along the differential routing 70, since the differential routing 70 is arc-shaped, the signal delay and signal reflection caused by the right-angle routing are reduced, the loss is reduced, and the signal transmission is more stable, thereby better improving the signal processing performance and transmission quality.

[0049] Optionally, the differential trace 70 is a microstrip line.

[0050] It can be understood that the differential routing 70 is a microstrip line, so that the impedance of the differential routing 70 can be controlled, so that the impedance of a pair of the differential routings 70 is consistently controllable, and the differential impedance design of a pair of the differential routings 70 is controlled to be eighty-five ohms, thereby ensuring the stability of signal transmission, which is beneficial to ensuring the accuracy of detection.

[0051] Optionally, a plurality of ground vias 50 are arranged at intervals on the test board 20 .

[0052] like Figure 2 As shown, a plurality of ground vias 50 are arrayed on the surface of the test board 20, and the ground wire is shielded to avoid affecting the signal transmission, improve the stability and transmission quality of the signal transmission, and ensure that the accuracy of the detection can be improved when the signal is transmitted to the tester.

[0053] It can be understood that the plurality of ground vias 50 are distributed between the output ports 60 to shield interference from other signals, improve anti-interference capability, and ensure stability of signal transmission.

[0054] Optionally, the output port 60 is connected to an SMP connector 30 , and the SMP connector 30 is gold-plated.

[0055] like Figure 1 As shown, the SMP connector 30 and the output port 60 are welded together.

[0056] It is understandable that the welding points of the SMP connector 30 are subjected to gold immersion treatment and then welded to the SMP connector 30 .

[0057] It is understandable that the PIN points are gold-plated to improve the stability of signal transmission and avoid interference.

[0058] It can be understood that the SMP connector 30 is gold-plated.

[0059] Optionally, one end of the cable 40 is connected to some of the SMP connectors 30 , and a cap is connected to some of the SMP connectors 30 .

[0060] It is understandable that some of the SMP connectors 30 are connected with caps, and the differential signal is decoyed by adding a load to the SMP connector 30, and the differential signal is transmitted to the tester through the cable 40 for detection.

[0061] It should be noted that the resistance of the cap is 50 ohms.

[0062] It is understandable that if Figure 1 As shown, the plurality of cables are respectively connected to the SMP connectors 30 on the two pairs of output ports 60, so that the differential signal transmitted from the motherboard 10 to be tested can be received by the tester through the cable 40 and tested, and the quality of the motherboard 10 to be tested can be proved by testing the signal quality.

[0063] Optionally, the access port 80 is a gold finger board, and the differential signal terminal is a gold finger.

[0064] It should be noted that the test board 20 simulates an M.2 device for testing the signal of the motherboard to be tested, and therefore, the access port 80 is an M.2 interface and the connection port 90 is an M.2 slot.

[0065] It can be understood that the M.2 interface is inserted into the M.2 slot, and the cap is set on part of the SMP connector 30 to induce the differential signal, so that the differential signal is introduced into the test board 20 through the M.2 interface and the M.2 slot, and is transmitted on the differential trace 70. Through the output port, part of the SMP connector 30 and the cable, the differential signal is received by the tester and the signal quality is detected, so as to achieve quality detection of the motherboard 10 to be tested.

[0066] It can be understood that the access port 80 is a gold finger board, and the differential signal terminal is a gold finger, so as to reduce transmission loss and improve signal transmission quality when the signal is transmitted between the mainboard 10 to be tested and the test board 20, so as to ensure the accuracy of subsequent signal quality detection.

[0067] Optionally, the gold fingers are gold-plated, and a plurality of the gold fingers are arranged at intervals.

[0068] The above description is only a preferred embodiment of the present invention, and does not limit the patent scope of the present invention. All equivalent structural changes made by using the contents of the present invention specification and drawings under the inventive concept of the present invention, or directly / indirectly applied in other related technical fields are included in the patent protection scope of the present invention.

Claims

1. A fixture for motherboard signal testing, characterized in that: include: A test board, wherein the test board is provided with an access port, and the access port is plugged into the connection port of the mainboard to be tested, and the test board is provided with multiple pairs of output ports; a tester connected to the multiple pairs of output ports via multiple cables; Wherein, the access port includes a plurality of pairs of differential signal terminals, and a pair of the differential signal terminals is connected to a pair of the output ports via a pair of differential traces.

2. The fixture for motherboard signal testing according to claim 1, characterized in that: The differential impedance of the pair of differential traces is eighty-five ohms.

3. The fixture for motherboard signal testing as claimed in claim 2, characterized in that: The pair of differential traces have the same length and the same impedance.

4. The fixture for motherboard signal testing according to claim 1, characterized in that: The differential trace is in an arc shape.

5. The fixture for motherboard signal testing according to claim 1, characterized in that: The differential trace is a microstrip line.

6. The fixture for motherboard signal testing according to claim 1, characterized in that: The test board is provided with a plurality of ground vias at intervals.

7. The fixture for motherboard signal testing according to claim 1, characterized in that: The output port is connected with an SMP connector, and the SMP connector is gold-plated.

8. The fixture for motherboard signal testing according to claim 7, characterized in that: Some of the SMP connectors are connected to one end of the cable, and some of the SMP connectors are connected to a cap.

9. The fixture for motherboard signal testing according to claim 1, characterized in that: The access port is a gold finger board, and the differential signal terminal is a gold finger.

10. The fixture for motherboard signal testing according to claim 9, characterized in that: The gold fingers are gold-plated, and a plurality of the gold fingers are arranged at intervals.