Detection device and vehicle

Abstract

The utility model discloses a detection device and a vehicle. The detection device comprises a current detection resistor which is used for being connected with the collision sensor so as to detect current flowing through the collision sensor; the collision sensor adopts a pulse current sensor; the voltage amplification circuit is connected with the current detection resistor and is used for amplifying the voltage of the current detection resistor; the fault latch circuit is connected with the voltage amplification circuit and is used for outputting and latching a low-level fault signal when the voltage output by the voltage amplification circuit reaches a first reference voltage; one input end of the logic AND gate circuit is connected with the fault latch circuit, the other input end of the logic AND gate circuit is used for being connected with a first chip in the battery management system, and the output end of the logic AND gate circuit is used for being connected with a power supply enabling circuit of a relay; and the logic AND gate circuit is used for triggering the power supply enabling circuit to cut off power supply to the relay when the fault signal is received or the enabling signal of the first chip is not received. According to the utility model, collision fault detection time and response time can be shortened.

Description

Technical Field

[0001] The present application relates to the field of vehicle safety technology, and in particular to a detection device and a vehicle. Background Art

[0002] In the related technology, new energy vehicles may have "secondary" accidents such as high voltage leakage, electric shock, battery fire, etc. after encountering a collision failure. Therefore, it is necessary to detect the collision failure and disconnect the battery in time after the collision failure is detected.

[0003] Specifically, the vehicle is usually equipped with an airbag sensor, which is connected to the battery management system. Under normal circumstances, the airbag sensor sends a PWM signal of several tens of Hz and a duty cycle of 50%; after a collision fault occurs, the airbag sensor sends a PWM signal of several hundred Hz and a duty cycle of 50%, and the signal is sent in a loop for several cycles. Therefore, the MCU of the battery management system can process the received PWM signal sent by the airbag sensor to identify the collision fault. After identifying the collision fault, the MCU triggers the corresponding IO to disconnect the relay, thereby achieving the purpose of disconnecting the battery.

[0004] However, the PWM signal recognition function is within the 10ms task cycle of the MCU, and it takes dozens of ms to detect multiple task cycles. In addition, it also takes about 10ms for the MCU to set the IO to disconnect the relay after the logic judgment, which will result in a longer collision fault detection time and response time. Utility Model Content

[0005] The utility model aims to solve one of the technical problems in the related art to at least a certain extent. To this end, the utility model provides a detection device and a vehicle, which can shorten the collision fault detection time and response time, cut off the battery in time, achieve the purpose of preventing the accident from spreading, and help ensure the safety of the vehicle and passengers.

[0006] In a first aspect, an embodiment of the utility model provides a detection device for detecting a vehicle collision fault, comprising: a current-sensing resistor, the current-sensing resistor being used to be connected to a collision sensor to detect the current flowing through the collision sensor; wherein the collision sensor is installed on a vehicle and adopts a pulse current sensor; a voltage amplifying circuit, the voltage amplifying circuit being connected to the current-sensing resistor and being used to amplify the voltage of the current-sensing resistor; a fault latching circuit, the fault latching circuit being connected to the voltage amplifying circuit, the fault latching circuit being used to output and latch a low-level fault signal when the voltage output by the voltage amplifying circuit reaches a first reference voltage; a logic AND gate circuit, one of the input ends of the logic AND gate circuit being connected to the fault latching circuit, the other input end of the logic AND gate circuit being used to be connected to a first chip in a battery management system, and the output end of the logic AND gate circuit being used to be connected to a power supply enabling circuit of a relay; the logic AND gate circuit being used to trigger the power supply enabling circuit to cut off the power supply to the relay when the fault signal is received or the enable signal of the first chip is not received.

[0007] In some embodiments, the fault latch circuit includes: a first comparator, wherein the first input terminal of the first comparator is connected to the voltage amplification circuit; the second input terminal of the first comparator is connected to a first power supply, and a first resistor is connected in series between the second input terminal of the first comparator and the first power supply so that the second input terminal of the first comparator receives a first reference voltage; a latch component, wherein the latch component is connected to the output terminal of the first comparator, and the latch component is used to latch the fault signal when the voltage of the first input terminal of the first comparator reaches the first reference voltage.

[0008] In some embodiments, the latch component includes: a first NPN transistor, the base of the first NPN transistor is connected to the output end of the first comparator, and a second resistor is connected in series between the base of the first NPN transistor and the first comparator; the emitter of the first NPN transistor is connected to a grounding device; the collector of the first NPN transistor is also connected to a second power supply, and the collector of the first NPN transistor is also connected to the second power supply through a third resistor in series, and the voltage of the second power supply is higher than the voltage of the first power supply; a PNP transistor, the base of the PNP transistor is connected to the collector of the first NPN transistor, and the PNP transistor The base of the transistor is also connected to the second power supply, and the third resistor is connected in series between the base of the PNP transistor and the second power supply; the emitter of the PNP transistor is connected to the second power supply; the collector of the PNP transistor is connected to the base of the first NPN transistor, and a fourth resistor and a second resistor are connected in series between the collector of the PNP transistor and the base of the first NPN transistor; wherein the fourth resistor is connected to the fifth resistor, and the fifth resistor is connected to the grounding device; the resistance of the second resistor is respectively greater than the resistance of the third resistor, the fourth resistor and the fifth resistor, and the resistance of the fourth resistor is respectively greater than the resistance of the third resistor and the fifth resistor.

[0009] In some embodiments, the fault latch circuit also includes: a second NPN transistor, the collector of the PNP transistor is also connected to the base of the second NPN transistor; the emitter of the second NPN transistor is connected to the grounding device; the collector of the second NPN transistor is connected to the input end of the logic AND gate circuit; the collector of the second NPN transistor is also connected to the first power supply, and a sixth resistor is connected in series between the collector of the second NPN transistor and the first power supply.

[0010] In some embodiments, the fault latch circuit further includes: a first diode, an anode of the first diode is connected to the first comparator, and a cathode of the first diode is respectively connected to anodes of the second resistor and a fifth resistor.

[0011] In some embodiments, the detection device further includes: a self-test circuit, wherein the input end of the self-test circuit is connected to the output end of the voltage amplifier circuit, and the output end of the self-test circuit is connected to the second chip of the battery management system.

[0012] In some embodiments, the self-test circuit includes: a second comparator, a first input terminal of the second comparator is connected to the output terminal of the voltage amplifier circuit; a seventh resistor is connected in series between the first input terminal of the second comparator and the output terminal of the voltage amplifier circuit; wherein the seventh resistor is also connected in series between the output terminal of the voltage amplifier circuit and the input terminal of the fault latch circuit; the second input terminal of the second comparator is connected to the first power supply, and an eighth resistor is connected in series between the second input terminal of the second comparator and the first power supply, so that the second input terminal of the second comparator receives a second reference voltage; the output terminal of the second comparator is connected to the second chip; wherein, when the voltage of the first input terminal of the second comparator reaches the second reference voltage, the second comparator outputs a high level signal.

[0013] In some embodiments, the logic AND gate circuit includes: a second diode, one end of the second diode is connected to the output end of the fault latch circuit and to a first power supply, and a sixth resistor is connected between the second diode and the first power supply; a third diode, one end of the third diode is connected to a battery management system to receive an enable signal of the battery management system; the enable signal of the battery management system is a high-level signal; wherein the other ends of the second diode and the third diode are connected in parallel to the power supply enable circuit of the relay, so that the power supply enable circuit of the relay cuts off power supply to the relay when the second diode receives the fault signal or the second diode does not receive the enable signal of the battery management system.

[0014] In some embodiments, the voltage amplifier circuit is a differential amplifier circuit.

[0015] In a second aspect, an embodiment of the utility model provides a vehicle, comprising: a collision sensor and a detection device as described in any one of the above

[0016] The detection device and vehicle provided by the embodiment of the utility model can detect the current flowing through the collision sensor based on the current detection resistor, amplify the voltage of the current detection resistor through the voltage amplifier processor, and identify the collision fault based on the voltage signal output by the voltage amplifier circuit through the fault latch circuit. After identifying the collision fault, the fault latch circuit can also latch the low-level fault signal so that the logic and gate circuit can cut off the power supply based on the fault signal to achieve the purpose of disconnecting the battery. After the vehicle encounters a collision fault, the embodiment of the utility model does not need to identify the PWM signals of multiple task cycles through the MCU, nor does it need the MCU to set the IO to disconnect the relay after logical judgment. The embodiment of the utility model directly identifies the collision fault and disconnects the power supply of the relay in a relatively short time through the detection device composed of the above hardware, so that the embodiment can cut off the battery in time to achieve the purpose of preventing the accident from spreading, which is conducive to ensuring the safety of the vehicle and passengers.

[0017] Additional aspects and advantages of the present invention will be given in part in the following description and in part will become apparent from the following description or will be learned through the practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 A schematic diagram of the structure of a detection device provided by an exemplary embodiment;

[0019] Figure 2 A schematic diagram of a pulse current signal output by a collision sensor provided by an exemplary embodiment;

[0020] Figure 3 A schematic diagram of the circuit structure of a detection device provided by an exemplary embodiment;

[0021] Figure 4 A schematic diagram of the circuit structure of a collision sensor, a current sensing resistor and a voltage amplifier circuit provided by an exemplary embodiment;

[0022] Figure 5 A schematic diagram of a circuit structure of a fault latch circuit provided by an exemplary embodiment;

[0023] Figure 6 A simulation schematic diagram of a detection device provided by an exemplary embodiment under normal conditions;

[0024] Figure 7 A schematic diagram of a simulation of a detection device provided by an exemplary embodiment in a collision failure situation.

[0025] Description of reference numerals:

[0026] 10-collision sensor; 20-voltage amplifier circuit; 30-fault latch circuit; 40-logic AND gate circuit; 50-power supply enabling circuit of relay; 60-self-test circuit;

[0027] R1-current sensing resistor; R2-first resistor; R3-second resistor; R4-third resistor; R5-fourth resistor; R6-fifth resistor; R7-sixth resistor; R8-seventh resistor; R9-eighth resistor; R10-ninth resistor; R11-tenth resistor; R12-eleventh resistor; R13-twelfth resistor; R14-thirteenth resistor; R15-fourteenth resistor;

[0028] U1-operational amplifier; U2-first comparator; U3-second comparator;

[0029] C1-first capacitor; C2-second capacitor;

[0030] D1-first diode; D2-second diode; D3-third diode;

[0031] Q1-first NPN transistor; Q2-PNP transistor; Q3-first NPN transistor; V1-first power supply; V2-second power supply. DETAILED DESCRIPTION

[0032] The embodiments of the present invention are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present invention, and should not be construed as limiting the present invention.

[0033] In order to overcome the problem of long collision fault detection time and response time in related technologies, an embodiment of the present application provides a detection device, which detects collision faults based on a pulse current sensor, can achieve detection in a shorter time, shorten the collision fault detection time and response time, and can disconnect the battery in time, thereby preventing the accident from spreading, which is beneficial to ensuring the safety of the vehicle and passengers.

[0034] The structure, function and implementation process of the embodiments of the present application are described below with reference to the accompanying drawings for illustration.

[0035] In addition, other structures and functions of the detection device of the embodiment of the present application are known to technicians in this field and will not be described here to reduce redundancy.

[0036] Please refer to Figure 1 The detection device for detecting vehicle collision faults provided in this embodiment includes: a current detection resistor R1, a voltage amplifier circuit 20, a fault latch circuit 30, and a logic AND gate circuit 40.

[0037] The current sensing resistor R1 is used to connect with the collision sensor 10 to detect the current flowing through the collision sensor 10. The collision sensor 10 is installed on the vehicle and adopts a pulse current sensor. Figure 2 Under normal circumstances, the collision sensor 10 sends a small current pulse signal to continuously detect the rationality of the load circuit, with a current range of 10mA-100mA and a frequency of about 100Hz; in the case of a collision failure, the current sent by the collision sensor 10 is in the range of 1.5A-1.75A and lasts for 0.5ms. The collision sensor 10 can be the vehicle's own or external.

[0038] The current sensing resistor R1 is also called a current detection resistor. The current sensing resistor R1 has a relatively low resistance rating. In this example, the current flowing through the collision sensor 10 will also flow through the current sensing resistor R1. Therefore, the current of the collision sensor 10 can be measured by detecting the voltage across the current sensing resistor R1. The resistance value of the current sensing resistor R1 can be set according to actual needs. For example, the resistance value of the current sensing resistor R1 can be 2Ω. In addition, the current sensing resistor R1 is also connected to the grounding device to achieve port protection to protect the port of the voltage amplifier circuit 20 from being damaged.

[0039] The current sensing resistor R1 is also connected to the voltage amplifier circuit 20, which is used to amplify the voltage of the current sensing resistor R1. Since the current of the collision sensor 10 is relatively small under normal circumstances, and in order to prevent the larger pulse current from exceeding the power limit of the current sensing resistor R1 when encountering a collision fault, the current flowing through the current sensing resistor R1 should not be too large. Therefore, it is necessary to adjust and amplify the voltage of the current sensing resistor R1 under small current.

[0040] Please refer to Figure 3 and Figure 4Optionally, the voltage amplifier circuit 20 adopts a differential amplifier circuit, which includes an operational amplifier U1, the two input terminals of the operational amplifier U1 are respectively connected to the two ends of the current detection resistor R1, and the output terminal of the operational amplifier U1 is connected to the fault latch circuit 30. Among them, the output terminal of the operational amplifier U1 is connected to the seventh resistor R8, the ninth resistor R10 and the tenth resistor R11, the seventh resistor R8, the ninth resistor R10 and the tenth resistor R11 are connected in series in sequence, and the tenth resistor R11 is also connected to the grounding device; the resistance values ​​of the seventh resistor R8, the ninth resistor R10 and the tenth resistor R11 gradually increase, for example, the resistance value of the seventh resistor R8 is 100Ω, the resistance value of the ninth resistor R10 is 4.7kΩ, and the resistance value of the tenth resistor R11 is 47kΩ. In addition, the seventh resistor R8 is also connected between the operational amplifier U1 and the fault latch circuit 30. The tenth resistor R11 is also connected in parallel with the first capacitor C1, and the capacitance of the first capacitor C1 can be 0.04μF.

[0041] The output end of the voltage amplifier circuit 20 is connected to the fault latch circuit 30. The fault latch circuit 30 is used to output and latch a fault signal when the voltage output by the voltage amplifier circuit 20 reaches the first reference voltage. When the vehicle encounters a collision fault, only one pulse of high current will be triggered. When the pulse of high current occurs, the fault latch circuit 30 will identify the collision fault and latch the signal to maintain the corresponding level state and ensure that the relay is in the disconnected state.

[0042] Exemplarily, the fault latch circuit 30 may include a comparator and a latch, the comparator being used to compare the voltage output by the voltage amplifier circuit 20 with a preset first reference voltage, and the signal output when the voltage output by the voltage amplifier circuit 20 reaches the first reference voltage can trigger the latch to latch the fault signal in a low-level state to maintain the output of the fault latch circuit 30 in a low-level state.

[0043] One of the input ends of the logic AND gate circuit 40 is connected to the fault latch circuit 30, and the other input end of the logic AND gate circuit 40 is used to connect to the first chip in the battery management system. The first chip may be a SBC (System Basis Chip).

[0044] The output end of the logic AND gate circuit 40 is used to connect to the power supply enable circuit 50 of the relay; the logic AND gate circuit 40 is used to trigger the power supply enable circuit 50 to cut off the power supply to the relay when receiving a fault signal or not receiving the enable signal of the first chip, thereby achieving the purpose of disconnecting the battery. That is, in this example, only when one input end of the logic AND gate circuit 40 receives the enable signal of the first chip and the other input end does not receive a low-level fault signal but receives a high-level signal, the power supply enable circuit 50 is triggered to power on the relay. The relay includes: a main positive relay and a main negative relay in the battery pack.

[0045] The detection device provided in this embodiment can detect the current flowing through the collision sensor 10 based on the current detection resistor R1, amplify the voltage of the current detection resistor R1 through the voltage amplifier processor, and identify the collision fault through the fault latch circuit 30 based on the voltage signal output by the voltage amplifier circuit 20. After identifying the collision fault, the fault latch circuit 30 can also latch the low-level fault signal so that the logic and gate circuit 40 can cut off the power supply based on the fault signal to achieve the purpose of disconnecting the battery. After the vehicle encounters a collision fault, this embodiment does not need to identify the PWM signal of multiple task cycles through the MCU, nor does it need the MCU to set the IO to disconnect the relay after logical judgment. This embodiment directly identifies the collision fault and disconnects the power supply of the relay in a relatively short time through the detection device composed of the above hardware, so that this embodiment can cut off the battery in time to achieve the purpose of preventing the accident from spreading, which is conducive to ensuring the safety of the vehicle and passengers.

[0046] Please refer to Figure 3 and Figure 5 In some embodiments, the fault latch circuit 30 includes: a first comparator U2 and a latch component. The first input terminal of the first comparator U2 is connected to the voltage amplifier circuit 20; the second input terminal of the first comparator U2 is connected to the first power supply V1, and a first resistor R2 is connected in series between the second input terminal of the first comparator U2 and the first power supply V1, so that the second input terminal of the first comparator U2 receives a first reference voltage. Among them, the first power supply V1 can be a 5V power supply. The resistance value of the first resistor R2 can be 10kΩ. The latch component is connected to the output terminal of the first comparator U2, and the latch component is used to latch the fault signal when the voltage at the first input terminal of the first comparator U2 reaches the first reference voltage.

[0047] Optionally, a first diode D1 is connected in series between the latch component and the first comparator U2, the anode of the first diode D1 is connected to the first comparator U2, and the cathode of the first diode D1 is connected to the latch component. In addition, an eleventh resistor R12 may be connected in series between the first comparator U2 and the first diode D1, and the resistance value of the eleventh resistor R12 may be 100Ω.

[0048] In some examples, the latch component includes: a first NPN transistor Q1 and a PNP transistor Q2. The base of the first NPN transistor is connected to the output end of the first comparator U2, and a second resistor R3 is connected between the base of the first NPN transistor and the first comparator U2; the emitter of the first NPN transistor Q1 is connected to the grounding device; the collector of the first NPN transistor Q1 is also connected to a third resistor R4, and the third resistor R4 is connected to a second power supply V2. The second power supply V2 can be a 12V power supply.

[0049] The base of the PNP transistor Q2 is connected to the collector of the first NPN transistor Q1; the base of the PNP transistor Q2 is also connected to the second power supply V2, and three resistors are connected in series between the base of the PNP transistor Q2 and the second power supply V2; the emitter of the PNP transistor Q2 is connected to the second power supply V2; the collector of the PNP transistor Q2 is connected to the base of the first NPN transistor Q1, and a fourth resistor R5 and a second resistor R3 are connected in series between the collector of the PNP transistor Q2 and the base of the first NPN transistor Q1. The collector of the PNP transistor Q2 is also connected to the grounding device, and a fourth resistor R5 and a fifth resistor R6 are connected in series between the collector of the PNP transistor Q2 and the grounding device.

[0050] The resistance of the second resistor R3 is respectively greater than the resistance of the third resistor R4, the fourth resistor R5 and the fifth resistor R6; the resistance of the fourth resistor R5 is respectively greater than the resistance of the third resistor R4 and the fifth resistor R6. For example, the resistance of the second resistor R3 is 10kΩ, the resistance of the third resistor R4 is 20kΩ, the resistance of the fourth resistor R5 is 2.2kΩ, and the resistance of the fifth resistor R6 is 1kΩ. The cathode of the first diode D1 is connected to the anode of the second resistor R3 and the anode of the fifth resistor R6.

[0051] In this example, under normal circumstances, the first NPN transistor Q1 is in the off state, the base of the PNP transistor Q2 is kept in the high level state through the third resistor R4, and the PNP transistor Q2 is in the off state. After encountering a collision fault, the first comparator U2 outputs a high level signal when the voltage received from the voltage amplifier circuit 20 reaches the first reference voltage and transmits it to the base of the first NPN transistor Q1. After the base of the first NPN transistor Q1 receives the high level signal, it is in the on state, and the base of the PNP transistor Q2 is pulled down, so that the PNP transistor Q2 is in the on state. After the PNP transistor Q2 is turned on, the base of the first NPN transistor Q1 obtains a high level, thereby causing the first NPN transistor Q1 to continue to be turned on, thereby realizing fault latching.

[0052] In other examples, a latch may also be used to implement fault latching.

[0053] In some examples, the fault latch circuit 30 also includes: a second NPN transistor Q3, the collector of the PNP transistor Q2 is also connected to the base of the second NPN transistor Q3; the emitter of the second NPN transistor Q3 is connected to the grounding device; the collector of the second NPN transistor Q3 is connected to the input end of the logic AND gate circuit 40; the collector of the second NPN transistor Q3 is connected to the sixth resistor R7, and the sixth resistor R7 is connected to the first power supply V1.

[0054] A twelfth resistor R13 is connected in series between the collector of the PNP transistor Q2 and the base of the second NPN transistor Q3. The resistance of the twelfth resistor R13 may be 10 kΩ. The resistance of the sixth resistor R7 may be 10 kΩ.

[0055] The cathode of the twelfth resistor R13 is also connected to the anode of the thirteenth resistor R14, the cathode of the thirteenth resistor R14 is connected to the grounding device, and the thirteenth resistor R14 is connected in parallel with the second capacitor C2. The resistance of the thirteenth resistor R14 can be less than the resistance of the twelfth resistor R13, for example, the resistance of the thirteenth resistor R14 can be 4.7 kΩ. The capacitance of the second capacitor C2 can be 1 μF.

[0056] In this example, after encountering a collision fault, the PNP transistor Q2 can remain in the on state, so that the base of the second NPN transistor Q3 continues to obtain a high level and outputs a low level fault signal to the logic AND gate circuit 40 .

[0057] Please refer to Figure 2 and Figure 3 In some embodiments, in order to reduce the cost, the logic AND gate circuit 40 includes: a second diode D2 and a third diode D3.

[0058] One end of the second diode D2 is connected to the output end of the fault latch circuit 30; wherein, when a collision fault is detected, the output of the fault latch circuit 30 is a low-level signal; one end of the third diode D3 is connected to the battery management system to receive an enable signal of the battery management system; the enable signal of the battery management system is a high-level signal; the other ends of the second diode D2 and the third diode D3 are connected in parallel to the power supply enable circuit 50 of the relay, so that the power supply enable circuit 50 of the relay cuts off the power supply to the relay when the second diode D2 receives a fault signal or the second diode D2 does not receive the enable signal of the battery management system.

[0059] Among them, the second diode D2 can also be connected to the first power supply V1, and the sixth resistor R7 and the fourteenth resistor R15 are connected between the second diode D2 and the first power supply V1, the sixth resistor R7 and the fourteenth resistor R15 are arranged in parallel, and the resistance of the fourteenth resistor R15 is less than the resistance of the sixth resistor R7, for example, the resistance of the fourteenth resistor R15 is 1kΩ. In this way, when no fault signal is received, the second diode D2 can obtain a high-level signal, so that after the third diode D3 obtains a high-level enable signal, the power supply enable circuit 50 of the relay can be triggered to power the relay.

[0060] In other embodiments, the logic AND gate circuit 40 may also be implemented using a field effect transistor; or, the logic AND gate circuit 40 may also be implemented using a logic AND gate chip. This embodiment does not limit the specific model of the logic AND gate circuit 40, as long as the above-mentioned functions of the logic AND gate circuit 40 can be realized.

[0061] Please refer to Figure 2 and Figure 3 In some embodiments, the detection device further includes: a self-test circuit 60, the input end of the self-test circuit 60 is connected to the output end of the voltage amplifier circuit 20, and the output end of the self-test circuit 60 is connected to the second chip of the battery management system, so that the second chip determines whether the detection device is connected according to the output signal of the self-test circuit 60. The second chip can be a microcontroller unit (MCU).

[0062] Exemplarily, the self-test circuit 60 includes: a second comparator U3, a first input terminal of the second comparator U3 is connected to the output terminal of the voltage amplifier circuit 20; a seventh resistor R8 is connected in series between the first input terminal of the second comparator U3 and the output terminal of the voltage amplifier circuit 20; wherein the seventh resistor R8 is also connected in series between the output terminal of the voltage amplifier circuit 20 and the input terminal of the fault latch circuit 30.

[0063] The second input terminal of the second comparator U3 is connected to the first power supply V1, and an eighth resistor R9 is connected in series between the second input terminal of the second comparator U3 and the first power supply V1, so that the second input terminal of the second comparator U3 receives the second reference voltage; the output terminal of the second comparator U3 is connected to the second chip; the resistance value of the eighth resistor R9 is greater than the resistance value of the seventh resistor R8, for example, the resistance value of the eighth resistor R9 can be 13kΩ.

[0064] When the voltage at the first input terminal of the second comparator U3 reaches the second reference voltage, the second comparator U3 outputs a high level signal, so that the second chip determines that the detection device is connected according to the high level signal output by the second comparator U3, thereby ensuring the working reliability of the detection device.

[0065] In addition, when the second chip determines that the detection device is not connected according to the signal output by the second comparator U3, the second chip can trigger a visual prompt or an audio prompt to allow the occupants in the vehicle to know in time.

[0066] It is understandable that the detection device may include more or fewer components than those in the above-mentioned embodiment, or may combine certain components, or may have different component arrangements, as long as the functions of the above-mentioned circuits can be achieved.

[0067] Based on the simulation of the detection device provided in this embodiment, please refer to Figure 6 When the current of the collision sensor is 100mA, 10Hz, and 40% duty cycle, the output current of the current-sense resistor observed during the simulation is the output current of the collision sensor; wherein, the curve Vmcu-self-io is the PWM input recognition of the MCU, which can detect a voltage waveform with a frequency of 100Hz and an amplitude of 40% of 0-5V, the curve V(n011) is the relay power supply during normal self-test, and the curve I(R1) is the output current of the current-sense resistor.

[0068] Please refer to Figure 7 When the current of the collision sensor is 100mA, 10Hz, 40% duty cycle and lasts for 5 cycles, the collision fault is triggered, that is, the pulse current becomes 1.75A at 5ms. The output current of the current-sensing resistor observed in the simulation process is the output current of the collision sensor. The curve Vmcu-self-io is the PWM input recognition of the MCU. Before the fault occurs, a voltage waveform with a frequency of 100Hz and an amplitude of 40% of 0-5V can be detected, such as the curve V(n011). After the fault occurs, the hardware disconnects the power supply of the relay in 2ms, thereby cutting off the main circuit of the battery. It can be seen that the detection device provided by this embodiment greatly shortens the collision fault detection time and response time.

[0069] In some embodiments, a vehicle is further provided, comprising the detection circuit in any of the above embodiments, wherein the specific hardware structure and function of the detection circuit are the same or similar to those in the above embodiments, and will not be described in detail in this embodiment.

[0070] In addition, the terms "first", "second", etc. used in the embodiments of the present invention are only used for descriptive purposes and should not be understood as indicating or implying relative importance, or implicitly indicating the number of technical features indicated in the embodiments. Therefore, the features defined by the terms "first", "second", etc. in the embodiments of the present invention can explicitly or implicitly indicate that the embodiment includes at least one of the features. In the description of the present invention, the word "multiple" means at least two or two or more, such as two, three, four, etc., unless otherwise clearly and specifically defined in the embodiments.

[0071] In the present utility model, unless otherwise clearly specified or limited in the embodiments, the terms "install", "connect", "connect" and "fix" etc. appearing in the embodiments should be understood in a broad sense. For example, the connection can be a fixed connection, a detachable connection, or an integrated connection. It can be understood that it can also be a mechanical connection, an electrical connection, etc.; of course, it can also be a direct connection, or an indirect connection through an intermediate medium, or it can be the internal connection of two elements, or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present utility model can be understood according to the specific implementation situation.

[0072] In the drawings, the size of the components, the thickness of the layers or the regions may be exaggerated for the sake of clarity. Therefore, any implementation of the present invention is not necessarily limited to the size shown in the drawings, and the shapes and sizes of the components in the drawings do not reflect the true proportions. In addition, the drawings schematically show ideal examples, and any implementation of the present invention is not limited to the shapes or values ​​shown in the drawings.

[0073] Although the embodiments of the present invention have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations of the present invention. Ordinary technicians in the field can change, modify, replace and modify the above embodiments within the scope of the present invention.

Claims

1. A detection device for detecting vehicle collision failure, It is characterized in that include: A current-sensing resistor (R1), the current-sensing resistor (R1) being used to be connected to a collision sensor (10) to detect a current flowing through the collision sensor (10); wherein the collision sensor (10) is installed on a vehicle and the collision sensor (10) is a pulse current sensor; A voltage amplifying circuit (20), the voltage amplifying circuit (20) being connected to the current sensing resistor (R1) and being used to amplify the voltage of the current sensing resistor (R1); a fault latch circuit (30), the fault latch circuit (30) being connected to the voltage amplifier circuit (20), the fault latch circuit (30) being used to output and latch a low-level fault signal when the voltage output by the voltage amplifier circuit (20) reaches a first reference voltage; A logic AND gate circuit (40), one of the input ends of the logic AND gate circuit (40) is connected to the fault latch circuit (30), the other input end of the logic AND gate circuit (40) is used to connect to a first chip in a battery management system, and the output end of the logic AND gate circuit (40) is used to connect to a power supply enable circuit (50) of a relay; the logic AND gate circuit (40) is used to trigger the power supply enable circuit (50) to cut off the power supply to the relay when receiving the fault signal or not receiving the enable signal of the first chip.

2. The detection device according to claim 1, It is characterized in that The fault latch circuit (30) comprises: A first comparator (U2), wherein a first input end of the first comparator (U2) is connected to the voltage amplifier circuit (20); a second input end of the first comparator (U2) is connected to a first power supply (V1); a first resistor (R2) is connected in series between the second input end of the first comparator (U2) and the first power supply (V1), so that the second input end of the first comparator (U2) receives a first reference voltage; A latch component is connected to the output end of the first comparator (U2), and is used to latch the fault signal when the voltage at the first input end of the first comparator (U2) reaches the first reference voltage.

3. The detection device according to claim 2, It is characterized in that The latch assembly comprises: A first NPN-type triode (Q1), wherein the base of the first NPN-type triode (Q1) is connected to the output end of the first comparator (U2), and a second resistor (R3) is connected in series between the base of the first NPN-type triode (Q1) and the first comparator (U2); the emitter of the first NPN-type triode (Q1) is connected to a grounding device; the collector of the first NPN-type triode (Q1) is also connected to a second power supply (V2), and a third resistor (R4) is connected in series between the collector of the first NPN-type triode (Q1) and the second power supply (V2), and the voltage of the second power supply (V2) is higher than the voltage of the first power supply (V1); A PNP transistor (Q2), wherein the base of the PNP transistor (Q2) is connected to the collector of the first NPN transistor (Q1), the base of the PNP transistor (Q2) is also connected to the second power supply (V2), and the third resistor (R4) is connected in series between the base of the PNP transistor (Q2) and the second power supply (V2); the emitter of the PNP transistor (Q2) is connected to the second power supply (V2); the collector of the PNP transistor (Q2) is connected to the base of the first NPN transistor (Q1), and a fourth resistor (R5) and a second resistor (R3) are connected in series between the collector of the PNP transistor (Q2) and the base of the first NPN transistor (Q1); Wherein, the fourth resistor (R5) is connected to the fifth resistor (R6), and the fifth resistor (R6) is connected to the grounding device; The resistance of the second resistor (R3) is respectively greater than the resistance of the third resistor (R4), the fourth resistor (R5) and the fifth resistor (R6); The resistance of the fourth resistor (R5) is greater than the resistance of the third resistor (R4) and the fifth resistor (R6) respectively.

4. The detection device according to claim 3, It is characterized in that The fault latch circuit (30) further comprises: A second NPN transistor (Q3), the collector of the PNP transistor (Q2) is also connected to the base of the second NPN transistor (Q3); the emitter of the second NPN transistor (Q3) is connected to the grounding device; the collector of the second NPN transistor (Q3) is connected to the input end of the logic AND gate circuit (40); the collector of the second NPN transistor (Q3) is also connected to the first power supply (V1), and a sixth resistor (R7) is connected in series between the collector of the second NPN transistor (Q3) and the first power supply (V1).

5. The detection device according to claim 3, It is characterized in that The fault latch circuit (30) further comprises: a first diode (D1), wherein an anode of the first diode (D1) is connected to the first comparator (U2), and a cathode of the first diode (D1) is respectively connected to anodes of the second resistor (R3) and a fifth resistor (R6).

6. The detection device according to claim 1, It is characterized in that Also includes: A self-test circuit (60), wherein the input end of the self-test circuit (60) is connected to the output end of the voltage amplifier circuit (20), and the output end of the self-test circuit (60) is connected to the second chip of the battery management system.

7. The detection device according to claim 6, It is characterized in that The self-test circuit (60) comprises: A second comparator (U3), wherein a first input terminal of the second comparator (U3) is connected to the output terminal of the voltage amplifier circuit (20); a seventh resistor (R8) is connected in series between the first input terminal of the second comparator (U3) and the output terminal of the voltage amplifier circuit (20); wherein the seventh resistor (R8) is also connected in series between the output terminal of the voltage amplifier circuit (20) and the input terminal of the fault latch circuit (30); The second input end of the second comparator (U3) is connected to the first power supply (V1), and an eighth resistor (R9) is connected in series between the second input end of the second comparator (U3) and the first power supply (V1), so that the second input end of the second comparator (U3) receives a second reference voltage; the output end of the second comparator (U3) is connected to the second chip; When the voltage at the first input terminal of the second comparator (U3) reaches the second reference voltage, the second comparator (U3) outputs a high level signal.

8. The detection device according to claim 1, It is characterized in that The logic AND gate circuit (40) comprises: a second diode (D2), one end of the second diode (D2) being connected to the output end of the fault latch circuit (30) and to the first power supply (V1), and a sixth resistor (R7) being connected between the second diode (D2) and the first power supply (V1); a third diode (D3), one end of which is connected to the battery management system to receive an enable signal of the battery management system; the enable signal of the battery management system is a high level signal; The other ends of the second diode (D2) and the third diode (D3) are connected in parallel to the power supply enabling circuit (50) of the relay, so that the power supply enabling circuit (50) of the relay cuts off the power supply to the relay when the second diode (D2) receives the fault signal or the second diode (D2) does not receive the enabling signal of the battery management system.

9. The detection device according to claim 1, It is characterized in that The voltage amplifier circuit (20) is a differential amplifier circuit.

10. A vehicle, It is characterized in that include: A collision sensor and a detection device as claimed in any one of claims 1 to 9.

Images