Display device

By designing an inverted tapered partition and a common layer structure in the display device, crosstalk problem caused by increased integration in the display device is solved, and display performance is improved.

CN222170320UActive Publication Date: 2024-12-13SAMSUNG DISPLAY CO LTD
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Patent Information

Application Number
CN202420048058.2
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Priority Date
2023-01-09
Filing Date
2024-01-09
Publication Date
2024-12-13
Estimated Expiration
2034-01-09

AI Technical Summary

Technical Problem

As the degree of integration of the display device increases, the phenomenon of crosstalk in which the electrical signal is applied from one sub-transmission region to another sub-transmission region becomes a problem, resulting in deterioration of display performance.

Method used

A display device is designed, including a pixel-defining layer, a partition member and a common layer. The partition member forms an inverted conical structure on the pixel-defining layer through a contact portion, a first inclined portion and a second inclined portion to limit the undercut space, and The electrical signal crosstalk is prevented from being disconnected between the first pixel opening and the second pixel opening through the common layer.

Benefits of technology

It effectively prevents crosstalk between adjacent transmission areas and improves display performance.

✦ Generated by Eureka AI based on patent content.

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Abstract

A display device includes: a pixel defining layer defining a first pixel opening exposing a first pixel electrode and a second pixel opening exposing a second pixel electrode and spaced apart from the first pixel opening; a pattern portion disposed on the pixel defining layer between the first pixel opening and the second pixel opening and including a first pattern and a second pattern spaced apart from each other; and a spacer including: a contact portion directly contacting the pixel defining layer between the first pattern and the second pattern; a first inclined portion disposed on the contact portion, spaced apart from the pattern portion to define an undercut space, and having a first average taper angle; and a second inclined portion disposed on the first inclined portion and having a second average taper angle smaller than the first average taper angle of the first inclined portion.
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Description

Technical Field

[0001] The present disclosure relates to a display device. Background Art

[0002] The display device may include a display area that displays an image. The display area may include an emission area defined as an area that emits light, and the emission area may include a sub-emission area defined as a minimum unit area that emits light.

[0003] Recently, as the integration of display devices increases, crosstalk, where electrical signals (e.g., electrons, holes, voltage, etc.) are applied from one sub-emission region to another, has become a problem. When crosstalk occurs, the display performance of the display device may be degraded. Utility Model Content

[0004] The embodiment provides a display device having improved display performance.

[0005] According to an embodiment, a display device may include: a pixel defining layer defining a first pixel opening exposing a first pixel electrode and a second pixel opening exposing a second pixel electrode and spaced apart from the first pixel opening; a pattern portion disposed on the pixel defining layer between the first pixel opening and the second pixel opening and including a first pattern and a second pattern spaced apart from each other; and a separator including: a contact portion directly contacting the pixel defining layer between the first pattern and the second pattern; a first inclined portion disposed on the contact portion, spaced apart from the pattern portion to define an undercut space, and having a first average taper angle; and a second inclined portion disposed on the first inclined portion and having a second average taper angle smaller than the first average taper angle of the first inclined portion.

[0006] In an embodiment, in a cross section, a width of the first inclined portion may gradually increase in a direction away from an upper surface of the pixel defining layer, and in a cross section, a width of the second inclined portion may gradually increase in a direction away from an upper surface of the pixel defining layer.

[0007] In an embodiment, the undercut space defined by the first inclined portion may include a first undercut space defined by the first pattern and the first inclined portion spaced apart from each other, and a second undercut space defined by the second pattern and the first inclined portion spaced apart from each other.

[0008] In an embodiment, the first pattern may be closer to the first pixel opening than the second pattern, and the second pattern may be closer to the second pixel opening than the first pattern.

[0009] In an embodiment, the contact portion may cover the entire upper surface of the pixel defining layer between the first and second patterns spaced apart from each other.

[0010] In an embodiment, the display device may further include: a first emission layer disposed in the first pixel opening; a second emission layer disposed in the second pixel opening; and a common layer electrically connected to each of the first emission layer and the second emission layer.

[0011] In an embodiment, the common layer may include: a first portion extending from within the first pixel opening to a pixel defining layer adjacent to the first pixel opening; a second portion extending from within the second pixel opening to a pixel defining layer adjacent to the second pixel opening; and a third portion disposed on the partition.

[0012] In an embodiment, in a region between the first pixel opening and the second pixel opening, each of the first portion of the common layer and the second portion of the common layer may be spaced apart from the third portion of the common layer.

[0013] In an embodiment, each of the first portion of the common layer and the second portion of the common layer may electrically contact the third portion of the common layer in a connection region adjacent to a region between the first pixel opening and the second pixel opening and spaced apart from the partition.

[0014] According to another embodiment, a display device may include: a pixel defining layer, defining a first pixel opening exposing a first pixel electrode and a second pixel opening exposing a second pixel electrode and spaced apart from the first pixel opening; and a separator, including: a contact portion directly contacting the pixel defining layer; a first inclined portion, disposed on the contact portion, spaced apart from the pixel defining layer to define an undercut space, and having a first average cone angle; and a second inclined portion, disposed on the first inclined portion, and having a second average cone angle smaller than the first average cone angle of the first inclined portion.

[0015] In an embodiment, in a cross section, a width of the first inclined portion may gradually increase in a direction away from an upper surface of the pixel defining layer, and in a cross section, a width of the second inclined portion may gradually increase in a direction away from an upper surface of the pixel defining layer.

[0016] In an embodiment, the undercut space defined by the first inclined portion may include: a first undercut space adjacent to the first pixel opening; and a second undercut space adjacent to the second pixel opening.

[0017] In an embodiment, the display device may further include: a first emission layer disposed in the first pixel opening; a second emission layer disposed in the second pixel opening; and a common layer electrically connected to each of the first emission layer and the second emission layer.

[0018] In an embodiment, the common layer may include: a first portion extending from within the first pixel opening to a pixel defining layer adjacent to the first pixel opening; a second portion extending from within the second pixel opening to a pixel defining layer adjacent to the second pixel opening; and a third portion disposed on the partition.

[0019] In an embodiment, in a region between the first pixel opening and the second pixel opening, each of the first portion of the common layer and the second portion of the common layer may be spaced apart from the third portion of the common layer.

[0020] In an embodiment, each of the first portion of the common layer and the second portion of the common layer may electrically contact the third portion of the common layer in a connection region adjacent to a region between the first pixel opening and the second pixel opening and spaced apart from the partition.

[0021] According to another embodiment, a display device may include: a pixel defining layer, defining a first pixel opening exposing a first pixel electrode and a second pixel opening exposing a second pixel electrode and spaced apart from the first pixel opening; a pattern portion, disposed on the pixel defining layer between the first pixel opening and the second pixel opening; and a separator, including: a first inclined portion, disposed on the pattern portion, spaced apart from the pixel defining layer to define an undercut space, and having a first average cone angle; and a second inclined portion, disposed on the first inclined portion, and having a second average cone angle smaller than the first average cone angle of the first inclined portion.

[0022] In an embodiment, in a cross section, a width of the first inclined portion may gradually increase in a direction away from an upper surface of the pixel defining layer, and in a cross section, a width of the second inclined portion may gradually increase in a direction away from an upper surface of the pixel defining layer.

[0023] In embodiments, the first inclined portion may directly contact the pattern portion.

[0024] In an embodiment, the undercut space defined by the first inclined portion may include: a first undercut space adjacent to the first pixel opening; and a second undercut space adjacent to the second pixel opening.

[0025] In an embodiment, the display device may further include: a first emission layer disposed in the first pixel opening; a second emission layer disposed in the second pixel opening; and a common layer electrically connected to each of the first emission layer and the second emission layer.

[0026] In an embodiment, the common layer may include: a first portion extending from within the first pixel opening to a pixel defining layer adjacent to the first pixel opening; a second portion extending from within the second pixel opening to a pixel defining layer adjacent to the second pixel opening; and a third portion disposed on the partition.

[0027] In an embodiment, in a region between the first pixel opening and the second pixel opening, each of the first portion of the common layer and the second portion of the common layer may be spaced apart from the third portion of the common layer.

[0028] In an embodiment, each of the first portion of the common layer and the second portion of the common layer may electrically contact the third portion of the common layer in a connection region adjacent to a region between the first pixel opening and the second pixel opening and spaced apart from the partition.

[0029] The display device according to the embodiment may include a spacer disposed on the pixel defining layer between the first pixel opening and the second pixel opening adjacent to the first pixel opening. The spacer may disconnect the common layer between the first pixel opening and the second pixel opening, thereby preventing the occurrence of crosstalk.

[0030] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Illustrative, non-limiting embodiments will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings.

[0032] Figure 1 is a schematic plan view illustrating a display area of ​​a display device according to an embodiment.

[0033] Figure 2 is along Figure 1 Schematic cross-sectional view taken along line II'.

[0034] Figure 3 yes Figure 2 Schematic enlarged cross-sectional view of area AA.

[0035] Figure 4 is along Figure 1 Schematic cross-sectional view taken along line II-II'.

[0036] Figures 5 to 11 is a schematic diagram illustrating a method of manufacturing a display device according to an embodiment.

[0037] Fig.12 is a schematic plan view illustrating a display area of ​​a display device according to another embodiment.

[0038] Fig.13 is along Fig.12 Schematic cross-sectional view taken along line VI-VI'.

[0039] Fig.14 yes Fig.13 Schematic enlarged cross-sectional view of region BB.

[0040] Figures 15 to 17 is a schematic diagram illustrating a method of manufacturing a display device according to another embodiment.

[0041] Fig.18 is a schematic plan view illustrating a display area of ​​a display device according to still another embodiment.

[0042] Fig.19 is along Fig.18 Schematic cross-sectional view taken along line VIII-VIII'.

[0043] Fig. 20 yes Fig.19 Schematic enlarged cross-sectional view of region CC.

[0044] Figures 21 to 28 is a schematic diagram illustrating a method of manufacturing a display device according to still another embodiment. DETAILED DESCRIPTION

[0045] The present disclosure will now be described more fully below with reference to the accompanying drawings in which various embodiments are shown. However, the present disclosure may be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. On the contrary, these embodiments are provided to make the present disclosure more thorough and complete and to convey the scope of the present disclosure to those skilled in the art. The same reference numerals and / or reference signs always refer to the same elements.

[0046] The term "and / or" includes all combinations of one or more that the associated configurations may define. For example, "A and / or B" may be understood to mean "A, B, or A and B".

[0047] For the purpose of the present disclosure, the phrase "at least one of A and B" may be interpreted as only A, only B, or any combination of A and B. In addition, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" may be interpreted as only X, only Y, only Z, or any combination of two or more of X, Y, and Z.

[0048] Unless otherwise defined or implied herein, all terms (including technical and scientific terms) used herein have the same meaning as those commonly understood by those skilled in the art to which the present disclosure belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant technology and the present disclosure, and will not be interpreted in an idealized or overly formal sense unless explicitly defined as such in this article.

[0049] Figure 1 is a schematic plan view illustrating a display area of ​​a display device according to an embodiment.

[0050] refer to Figure 1 , the display device according to the embodiment may include a pixel defining layer PDL, a spacer SP, a first pattern PT1, and a second pattern PT2 disposed in the display area DA.

[0051] The pixel defining layer PDL may define first to third pixel openings PO1, PO2, and PO3. The first to third pixel openings PO1, PO2, and PO3 may expose at least a portion of first to third pixel electrodes PXE1, PXE2, and PXE3, respectively, referred to as anode electrodes (or cathode electrodes). In this case, the first to third pixel openings PO1, PO2, and PO3 may define an emission area EA.

[0052] The emission area EA may be an area corresponding to the first to third pixel openings PO1, PO2, and PO3, and may be an area that substantially emits light. For example, light may be emitted from an organic light emitting material disposed in the emission area EA.

[0053] The emission area EA may include sub-emission areas. For example, the emission area EA may include a first sub-emission area EA1, a second sub-emission area EA2, and a third sub-emission area EA3. In this case, in an embodiment, the first sub-emission area EA1, the second sub-emission area EA2, and the third sub-emission area EA3 may be areas that emit light of different colors. As another example, in an alternative embodiment, the first sub-emission area EA1, the second sub-emission area EA2, and the third sub-emission area EA3 may emit light of substantially the same color as each other.

[0054] The first sub-emission region EA1, the second sub-emission region EA2, and the third sub-emission region EA3 may have various arrangements within the display area DA. For example, the second sub-emission region EA2 may be spaced apart from the first sub-emission region EA1 in the first direction DR1, and the third sub-emission region EA3 may be spaced apart from the first sub-emission region EA1 and the second sub-emission region EA2 in the second direction DR2 crossing the first direction DR1.

[0055] The spacer SP may be disposed on the pixel defining layer PDL between two adjacent emission areas EA. In this case, the spacer SP may be positioned to overlap with a line connecting the shortest distances on a plane between the two adjacent emission areas EA. For example, the spacer SP may be disposed to overlap with a first path C1 defined as the shortest path on a plane between the first sub-emission area EA1 and the second sub-emission area EA2.

[0056] The first pattern PT1 and the second pattern PT2 may be disposed on the pixel defining layer PDL and may overlap at least a portion of the spacer SP. Figure 2 and Figure 3 The first pattern PT1 and the second pattern PT2 are described in detail.

[0057] The connection area CA may be a partial area on the pixel defining layer PDL that is separated from the spacer SP. The connection area CA may not overlap with a line connecting the shortest distances on a plane between two adjacent emission areas EA. For example, the connection area CA may not overlap with a first path C1 that is the shortest distance on a plane between the first sub-emission area EA1 and the second sub-emission area EA2. In this case, the length of the second path C2, which is defined as a path starting from the first sub-emission area EA1 and reaching the second sub-emission area EA2 via any point in the connection area CA, may be longer than the length of the first path C1.

[0058] Figure 2 is along Figure 1 Schematic cross-sectional view taken along line II'. Figure 3 yes Figure 2 Schematic enlarged cross-sectional view of area AA.

[0059] refer to Figures 1 to 3 , the display device according to the embodiment may include a circuit layer CIR, a first pixel electrode PXE1, a second pixel electrode PXE2, a pixel defining layer PDL, a first pattern PT1, a second pattern PT2, an organic light emitting material EL, a first functional layer CL1, an intermediate functional layer CLm, a second functional layer CL2, a common electrode layer CE, a partition SP, and an encapsulation layer EN. In this case, the first functional layer CL1, the intermediate functional layer CLm, the second functional layer CL2, and the common electrode layer CE may be referred to as a common layer. The common layer may be a layer integrally formed by a front deposition process or the like.

[0060] The circuit layer CIR may include transistors and capacitors. For example, the circuit layer CIR may include a first driving transistor electrically connected to the first pixel electrode PXE1 and a second driving transistor electrically connected to the second pixel electrode PXE2.

[0061] The first pixel electrode PXE1 and the second pixel electrode PXE2 may be disposed on the circuit layer CIR. The first pixel electrode PXE1 and the second pixel electrode PXE2 may be spaced apart from each other. In an embodiment, each of the first pixel electrode PXE1 and the second pixel electrode PXE2 may be referred to as an anode electrode (or a cathode electrode).

[0062] The pixel defining layer PDL may be disposed on the circuit layer CIR. The pixel defining layer PDL may define a first pixel opening PO1 exposing the first pixel electrode PXE1 and a second pixel opening PO2 exposing the second pixel electrode PXE2 and spaced apart from the first pixel opening PO1.

[0063] The first pattern PT1 and the second pattern PT2 may be disposed on the pixel defining layer PDL between the first pixel opening PO1 and the second pixel opening PO2. The first pattern PT1 may be disposed closer to the first pixel opening PO1 than the second pattern PT2. The second pattern PT2 may be disposed closer to the second pixel opening PO2 than the first pattern PT1. In this case, the first pattern PT1 and the second pattern PT2 may be spaced apart from each other.

[0064] A region where the first pattern PT1 is disposed may be referred to as a first pattern area PTA1 , and a region where the second pattern PT2 is disposed may be referred to as a second pattern area PTA2 .

[0065] The spacer SP may be disposed on the pixel defining layer PDL between the first pixel opening PO1 and the second pixel opening PO2. In this case, a region where the spacer SP is disposed may be referred to as a partition region SPA.

[0066] The spacer SP may include portions sequentially arranged in a thickness direction (e.g., a third direction DR3) of the pixel defining layer PDL that is perpendicular to the first direction DR1 and the second direction DR2. More specifically, the spacer SP may include a contact portion SP_P1 disposed on the pixel defining layer PDL, a first inclined portion SP_P2 disposed on the contact portion SP_P1, and a second inclined portion SP_P3 disposed on the first inclined portion SP_P2. In this case, the contact portion SP_P1, the first inclined portion SP_P2, and the second inclined portion SP_P3 may be integrally formed or may be integral with each other.

[0067] The contact portion SP_P1 may be disposed between the first pattern PT1 and the second pattern PT2 and may directly contact the pixel defining layer PDL. Figure 3 As shown in FIG. 1 , the contact portion SP_P1 may cover the entire upper surface of the pixel defining layer PDL between the first pattern PT1 and the second pattern PT2 .

[0068] The width of the first inclined portion SP_P2 may gradually increase in the third direction DR3. In other words, the first inclined portion SP_P2 may have an inverse tapered shape with respect to the upper surface of the pixel defining layer PDL.

[0069] The first inclined portion SP_P2 may be spaced apart from each of the first pattern PT1 and the second pattern PT2 to define an undercut space. In this case, the undercut space defined by the first pattern PT1 and the first inclined portion SP_P2 spaced apart from each other may be referred to as a first undercut space UC1, and the undercut space defined by the first inclined portion SP_P2 and the second pattern PT2 spaced apart from each other may be referred to as a second undercut space UC2.

[0070] The width of the second inclined portion SP_P3 may gradually increase in the third direction DR3. In other words, the second inclined portion SP_P3 may have an inverse tapered shape with respect to the upper surface of the pixel defining layer PDL.

[0071] The first inclined portion SP_P2 may have a first average taper angle, and the second inclined portion SP_P3 may have a second average taper angle. The first average taper angle may refer to the average inclination of the side surface of the first inclined portion SP_P2 relative to the third direction DR3, and the second average taper angle may refer to the average inclination of the side surface of the second inclined portion SP_P3 relative to the third direction DR3. In an embodiment, the second average taper angle may be less than the first average taper angle. In an alternative embodiment, the second average taper angle may be equal to or greater than the first average taper angle.

[0072] The organic light emitting material EL may include a first organic light emitting material EL1 and a second organic light emitting material EL2. The first organic light emitting material EL1 may be disposed on the first pixel electrode PXE1 within the first pixel opening PO1. The second organic light emitting material EL2 may be disposed on the second pixel electrode PXE2 within the second pixel opening PO2.

[0073] The first organic light emitting material EL1 may include a first lower light emitting material EL1a and a first upper light emitting material EL1b disposed on the first lower light emitting material EL1a. In an embodiment, the first lower light emitting material EL1a and the first upper light emitting material EL1b may emit light of substantially the same color. In an alternative embodiment, the first lower light emitting material EL1a and the first upper light emitting material EL1b may emit light of different colors.

[0074] The second organic light emitting material EL2 may include a second lower light emitting material EL2a and a second upper light emitting material EL2b disposed on the second lower light emitting material EL2a. In an embodiment, the second lower light emitting material EL2a and the second upper light emitting material EL2b may emit light of substantially the same color. In an alternative embodiment, the second lower light emitting material EL2a and the second upper light emitting material EL2b may emit light of different colors.

[0075] The first functional layer CL1 may include at least one layer for improving the light emitting efficiency of the organic light emitting material EL. For example, the first functional layer CL1 may include at least one of a hole injection layer and a hole transport layer.

[0076] The first functional layer CL1 may be disconnected between the first pixel opening PO1 and the second pixel opening PO2 by a spacer SP. More specifically, the first functional layer CL1 may include a first portion CL1_P1, a second portion CL1_P2, and a third portion CL1_P3, and each of the first portion CL1_P1 of the first functional layer CL1 and the second portion CL1_P2 of the first functional layer CL1 may be spaced apart from the third portion CL1_P3 of the first functional layer CL1 by a spacer SP.

[0077] The first portion CL1_P1 of the first functional layer CL1 may be disposed between the first lower light emitting material EL1a in the first pixel opening PO1 and the first pixel electrode PXE1. The first portion CL1_P1 of the first functional layer CL1 may extend from within the first pixel opening PO1 and be disposed on an upper surface of the pixel defining layer PDL adjacent to the first pixel opening PO1.

[0078] The second portion CL1_P2 of the first functional layer CL1 may be disposed between the second lower light emitting material EL2a in the second pixel opening PO2 and the second pixel electrode PXE2. The second portion CL1_P2 of the first functional layer CL1 may extend from within the second pixel opening PO2 and be disposed on an upper surface of the pixel defining layer PDL adjacent to the second pixel opening PO2.

[0079] The third portion CL1_P3 of the first functional layer CL1 may be disposed on the spacer SP. Accordingly, the third portion CL1_P3 of the first functional layer CL1 may be spaced apart from each of the first portion CL1_P1 of the first functional layer CL1 and the second portion CL1_P2 of the first functional layer CL1 by the spacer SP.

[0080] The intermediate functional layer CLm may include at least one layer for improving the light emission efficiency of the organic light emitting material EL. For example, the intermediate functional layer CLm may include an n-type charge generation layer and a p-type charge generation layer disposed on the n-type charge generation layer.

[0081] The intermediate functional layer CLm may be disconnected between the first pixel opening PO1 and the second pixel opening PO2 by a spacer SP. More specifically, the intermediate functional layer CLm may include a first portion CLm_P1, a second portion CLm_P2, and a third portion CLm_P3, and each of the first portion CLm_P1 of the intermediate functional layer CLm and the second portion CLm_P2 of the intermediate functional layer CLm may be spaced apart from the third portion CLm_P3 of the intermediate functional layer CLm by a spacer SP.

[0082] The first portion CLm_P1 of the intermediate functional layer CLm may be disposed between the first lower light emitting material EL1a and the first upper light emitting material EL1b within the first pixel opening PO1. The first portion CLm_P1 of the intermediate functional layer CLm may extend from within the first pixel opening PO1 and be disposed on an upper surface of the pixel defining layer PDL adjacent to the first pixel opening PO1.

[0083] The second portion CLm_P2 of the intermediate functional layer CLm may be disposed between the second lower light emitting material EL2a and the second upper light emitting material EL2b in the second pixel opening PO2. The second portion CLm_P2 of the intermediate functional layer CLm may extend from the second pixel opening PO2 and may be disposed on an upper surface of the pixel defining layer PDL adjacent to the second pixel opening PO2.

[0084] The third portion CLm_P3 of the intermediate functional layer CLm may be disposed on the spacer SP. Accordingly, the third portion CLm_P3 of the intermediate functional layer CLm may be spaced apart from each of the first portion CLm_P1 and the second portion CLm_P2 of the intermediate functional layer CLm by the spacer SP.

[0085] The second functional layer CL2 may include at least one layer for improving the light emission efficiency of the organic light emitting material EL. For example, the second functional layer CL2 may include at least one of an electron injection layer and an electron transport layer.

[0086] The second functional layer CL2 may be disconnected between the first pixel opening PO1 and the second pixel opening PO2 by a spacer SP. More specifically, the second functional layer CL2 may include a first portion CL2_P1, a second portion CL2_P2, and a third portion CL2_P3, and each of the first portion CL2_P1 of the second functional layer CL2 and the second portion CL2_P2 of the second functional layer CL2 may be spaced apart from the third portion CL2_P3 of the second functional layer CL2 by a spacer SP.

[0087] The first portion CL2_P1 of the second functional layer CL2 may be disposed on the first upper light emitting material EL1b within the first pixel opening PO1. The first portion CL2_P1 of the second functional layer CL2 may extend from within the first pixel opening PO1 and may be disposed on an upper surface of the pixel defining layer PDL adjacent to the first pixel opening PO1.

[0088] The second portion CL2_P2 of the second functional layer CL2 may be disposed on the second upper light emitting material EL2b within the second pixel opening PO2. The second portion CL2_P2 of the second functional layer CL2 may extend from within the second pixel opening PO2 and may be disposed on an upper surface of the pixel defining layer PDL adjacent to the second pixel opening PO2.

[0089] The third portion CL2_P3 of the second functional layer CL2 may be disposed on the spacer SP. Accordingly, the third portion CL2_P3 of the second functional layer CL2 may be spaced apart from each of the first portion CL2_P1 of the second functional layer CL2 and the second portion CL2_P2 of the second functional layer CL2 by the spacer SP.

[0090] The common electrode layer CE may be disposed on the organic light emitting material EL. In this case, in an embodiment, the common electrode layer CE may be referred to as a cathode electrode (or an anode electrode).

[0091] The common electrode layer CE may be disconnected between the first pixel opening PO1 and the second pixel opening PO2 by a partition SP. More specifically, the common electrode layer CE may include a first portion CE_P1, a second portion CE_P2, and a third portion CE_P3, and each of the first portion CE_P1 of the common electrode layer CE and the second portion CE_P2 of the common electrode layer CE may be spaced apart from the third portion CE_P3 of the common electrode layer CE by a partition SP.

[0092] The first portion CE_P1 of the common electrode layer CE may be disposed on the first organic light emitting material EL1 within the first pixel opening PO1. The first portion CE_P1 of the common electrode layer CE may extend from within the first pixel opening PO1 and be disposed on an upper surface of the pixel defining layer PDL adjacent to the first pixel opening PO1.

[0093] The second portion CE_P2 of the common electrode layer CE may be disposed on the second organic light emitting material EL2 within the second pixel opening PO2. The second portion CE_P2 of the common electrode layer CE may extend from within the second pixel opening PO2 and be disposed on an upper surface of the pixel defining layer PDL adjacent to the second pixel opening PO2.

[0094] The third portion CE_P3 of the common electrode layer CE may be disposed on the spacer SP. Accordingly, the third portion CE_P3 of the common electrode layer CE may be spaced apart from each of the first portion CE_P1 of the common electrode layer CE and the second portion CE_P2 of the common electrode layer CE by the spacer SP.

[0095] The encapsulation layer EN may be disposed on the common electrode layer CE. The encapsulation layer EN may completely cover the common electrode layer CE, the partition SP, the pixel defining layer PDL, the first pattern PT1 and the second pattern PT2. In an embodiment, the encapsulation layer EN may include a first inorganic encapsulation layer EN1 including an inorganic insulating material, an organic encapsulation layer EN2 disposed on the first inorganic encapsulation layer EN1 and including an organic insulating material, and a second inorganic encapsulation layer EN3 disposed on the organic encapsulation layer EN2 and including an inorganic insulating material.

[0096] In the present disclosure, the spacer SP may include a second inclined portion SP_P3 having an inverted tapered shape. Accordingly, in the case where each of the first functional layer CL1, the intermediate functional layer CLm, the second functional layer CL2, and the common electrode layer CE is integrally formed by a front deposition process or the like, the first functional layer CL1, the intermediate functional layer CLm, the second functional layer CL2, and the common electrode layer CE may not be substantially formed on the side surface of the second inclined portion SP_P3. Therefore, the first functional layer CL1, the intermediate functional layer CLm, the second functional layer CL2, and the common electrode layer CE may be disconnected by the second inclined portion SP_P3.

[0097] In this case, due to process errors, etc., the first functional layer CL1, the intermediate functional layer CLm, the second functional layer CL2, and the common electrode layer CE may be formed on the side surface of the second inclined portion SP_P3, and therefore there may be a problem that the first functional layer CL1, the intermediate functional layer CLm, the second functional layer CL2, and the common electrode layer CE are not disconnected. In order to prevent this, in the present disclosure, the separator SP may include a first inclined portion SP_P2 having a first average cone angle greater than the second average cone angle of the second inclined portion SP_P3. Accordingly, even if the first functional layer CL1, the intermediate functional layer CLm, the second functional layer CL2, and the common electrode layer CE are formed on the side surface of the second inclined portion SP_P3 due to process errors, etc., the first functional layer CL1, the intermediate functional layer CLm, the second functional layer CL2, and the common electrode layer CE may not be formed on the side surface of the first inclined portion SP_P2 (or not formed in the first undercut space UC1 and the second undercut space UC2). For example, even when the first functional layer CL1, the intermediate functional layer CLm, the second functional layer CL2 and the common electrode layer CE are formed on the side surface of the second inclined portion SP_P3, the first functional layer CL1, the intermediate functional layer CLm, the second functional layer CL2 and the common electrode layer CE can also be disconnected by the first inclined portion SP_P2.

[0098] As described above, in the present disclosure, the common layer can be disconnected by the partition member SP formed in the partition area SPA. Accordingly, the electrical signal (e.g., electrons, holes, voltage, etc.) applied to the first path C1 through the common layer can be blocked, and the crosstalk phenomenon between adjacent emission areas EA can be prevented.

[0099] Figure 4 is along Figure 1 Schematic cross-sectional view taken along line II-II'.

[0100] refer to Figure 1 and Figure 4 , the spacer SP may not be disposed in the connection area CA. Accordingly, each of the first functional layer CL1 , the middle functional layer CLm, the second functional layer CL2 , and the common electrode layer CE may not be disconnected in the common area CA.

[0101] For example, referring to the common electrode layer CE, the third portion CE_P3 of the common electrode layer CE may electrically contact each of the first portion CE_P1 of the common electrode layer CE and the second portion CE_P2 of the common electrode layer CE in the connection area CA.

[0102] Accordingly, the first portion CE_P1 of the common electrode layer CE and the second portion CE_P2 of the common electrode layer CE may be applied with the same electrical signal through the third portion CE_P3 of the common electrode layer CE disposed in the connection area CA. Figure 1 As described, since the length of the second path C2 passing through any point in the connection area CA is greater than the length of the first path C1, the electrical signal applied to the second path C2 through the common electrode layer CE may substantially not cause crosstalk between the first sub-emission area EA1 and the second sub-emission area EA2.

[0103] Similarly, each of the first portion CL1_P1 of the first functional layer CL1 and the second portion CL1_P2 of the first functional layer CL1 can be electrically contacted with the third portion CL1_P3 of the first functional layer CL1 in the connection area CA, each of the first portion CLm_P1 of the intermediate functional layer CLm and the second portion CLm_P2 of the intermediate functional layer CLm can be electrically contacted with the third portion CLm_P3 of the intermediate functional layer CLm in the connection area CA, and each of the first portion CL2_P1 of the second functional layer CL2 and the second portion CL2_P2 of the second functional layer CL2 can be electrically contacted with the third portion CL2_P3 of the second functional layer CL2 in the connection area CA.

[0104] Figures 5 to 11 is a schematic diagram illustrating a method of manufacturing a display device according to an embodiment. Figure 6 is along Figure 5 Schematic cross-sectional view taken along line III-III'. Figure 8 is along Figure 7 Schematic cross-sectional view taken along line IV-IV'. Fig.10 is along Fig. 9 Schematic cross-sectional view of the intermediate structure taken along line V-V'. Fig.11 is along Fig. 9 Schematic cross-sectional view taken along line V-V'.

[0105] refer to Figure 5 and Figure 6 , pixel electrodes spaced apart from each other may be formed on the circuit layer CIR. For example, a first pixel electrode PXE1 and a second pixel electrode PXE2 may be formed on the circuit layer CIR.

[0106] The pixel defining layer PDL may be formed on the circuit layer CIR to expose the pixel electrodes and define pixel openings spaced apart from each other. For example, the pixel defining layer PDL may define a first pixel opening PO1 exposing the first pixel electrode PXE1, a second pixel opening PO2 exposing the second pixel electrode PXE2, and a third pixel opening PO3 exposing the third pixel electrode PXE3.

[0107] refer to Figure 7 and Figure 8 , a pattern portion including a first pattern PT1 and a second pattern PT2 may be formed on the pixel defining layer PDL. The pattern portion may be formed between two adjacent pixel openings. For example, the first pattern PT1 and the second pattern PT2 may be positioned between the first pixel opening PO1 and the second pixel opening PO2. In addition, the first pattern PT1 may be closer to the first pixel opening PO1 than the second pattern PT2, and the second pattern PT2 may be closer to the second pixel opening PO2 than the first pattern PT1.

[0108] refer to Figures 9 to 11 , the spacer SP may be formed on the pixel defining layer PDL.

[0109] The spacer SP may be formed by completely coating a photoresist layer PR on the display area DA and exposing and developing the photoresist layer PR.

[0110] More specifically, the photoresist layer PR may be completely coated on the display area DA. Fig.10 As shown in , the photoresist layer PR may completely cover the pixel defining layer PDL, the first pixel electrode PXE1 , the second pixel electrode PXE2 , the first pattern PT1 , and the second pattern PT2 .

[0111] After the photoresist layer PR is coated, a portion of the photoresist layer PR may be exposed to form a removal portion PR_E and a remaining portion PR_R. In the case where the photoresist layer PR is a positive type, the removal portion PR_E may be exposed, and thus the removal portion PR_E may be removed in a development process described below. As another example, in the case where the photoresist layer PR is a negative type, the remaining portion PR_R may be exposed, and thus the removal portion PR_E other than the remaining portion PR_R may be removed in a development process described below.

[0112] After the photoresist layer PR is exposed, the removal portion PR_E may be removed by developing the photoresist layer PR with a developer. In this case, the developer may penetrate into the interface between the remaining portion PR_R and the first pattern PT1 and the interface between the remaining portion PR_R and the second pattern PT2. Accordingly, the spacer SP may be formed to define the above reference Figure 3 The first undercut space UC1 and the second undercut space UC2 are described and may be provided in the partition area SPA.

[0113] As described above, the first undercut space UC1 and the second undercut space UC2 may be formed by the interfacial penetration of the developer. To this end, each of the first pattern PT1 and the second pattern PT2 may include a material having a relatively weak adhesive strength relative to the material included in the partition SP (e.g., the material included in the photoresist layer PR). For example, the partition SP may include a photosensitive organic material, and the photosensitive organic material may be hydrophobic. In this case, the first pattern PT1 and the second pattern PT2 may include a hydrophilic material (e.g., a metal, a metal oxide, an inorganic insulating material, etc.), and thus the interfacial penetration of the developer may be promoted.

[0114] In this case, by adjusting the width of the first pattern PT1 in the first direction DR1 and the width of the second pattern PT2 in the first direction DR1, the width of the first undercut space UC1 in the first direction DR1 and the width of the second undercut space UC2 in the first direction DR1 can be adjusted. Similarly, the first average taper angle of the first inclined portion SP_P2 of the separator SP can be adjusted by changing the formation conditions of each of the first pattern PT1 and the second pattern PT2.

[0115] Fig.12 is a schematic plan view illustrating a display area of ​​a display device according to another embodiment.

[0116] refer to Fig.12 , a display device according to another embodiment may include a pixel defining layer PDL and a spacer SP' disposed in a display area DA'.

[0117] The pixel definition layer PDL can be compared with the reference Figure 1 The pixel defining layer PDL described is substantially the same. For example, the pixel defining layer PDL may define first to third pixel openings PO1, PO2, and PO3 that expose at least a portion of the first to third pixel electrodes PXE1, PXE2, and PXE3, respectively, and the first to third pixel openings PO1, PO2, and PO3 may define the emission area EA.

[0118] The spacer SP' may be disposed on the pixel defining layer PDL between two adjacent emission areas EA. In this case, the spacer SP' may be disposed to overlap a line connecting the shortest distance on a plane between the two adjacent emission areas EA.

[0119] The connection area CA may be a partial area of ​​the pixel defining layer PDL that is spaced apart from the spacer SP'. The connection area CA may be spaced apart from the reference Figure 1 and Figure 4 The described connection areas CA are substantially the same (or similar).

[0120] Fig.13 is along Fig.12 Schematic cross-sectional view taken along line VI-VI'. Fig.14 yes Fig.13 Schematic enlarged cross-sectional view of region BB.

[0121] refer to Figure 12 to Figure 14 According to another embodiment, a display device may include a circuit layer CIR, a first pixel electrode PXE1, a second pixel electrode PXE2, a pixel defining layer PDL, an organic light emitting material EL, a first functional layer CL1, an intermediate functional layer CLm, a second functional layer CL2, a common electrode layer CE, a spacer SP' and an encapsulation layer EN.

[0122] In this case, the circuit layer CIR, the first pixel electrode PXE1, the second pixel electrode PXE2, the pixel defining layer PDL, the organic light emitting material EL, the first functional layer CL1, the intermediate functional layer CLm, the second functional layer CL2, the common electrode layer CE and the encapsulation layer EN according to another embodiment may be the same as the reference Figures 1 to 4 The described circuit layer CIR, the first pixel electrode PXE1, the second pixel electrode PXE2, the pixel defining layer PDL, the organic light emitting material EL, the first functional layer CL1, the middle functional layer CLm, the second functional layer CL2, the common electrode layer CE and the encapsulation layer EN are substantially the same (or similar). Therefore, the description of the repeated contents is omitted.

[0123] With reference Figures 1 to 4 Compared with the display device according to the described embodiment, a display device according to another embodiment may not include the first pattern PT1 and the second pattern PT2.

[0124] Accordingly, in a partition member SP' including a contact portion SP'_P1, a first inclined portion SP'_P2 disposed on the contact portion SP'_P1, and a second inclined portion SP'_P3 disposed on the first inclined portion SP'_P2, a first undercut space UC1' may be defined as a separation space between the first inclined portion SP'_P2 and the pixel defining layer PDL, and a second undercut space UC2' may be defined as a separation space between the first inclined portion SP'_P2 and the pixel defining layer PDL. In this case, except for the first undercut space UC1' and the second undercut space UC2', the shape and function of each of the contact portion SP'_P1, the first inclined portion SP'_P2, and the second inclined portion SP'_P3 may be the same as those of the reference numeral 1. Figures 1 to 4 The shape and function of each of the described contact portion SP_P1 , the first inclined portion SP_P2 , and the second inclined portion SP_P3 are substantially the same (or similar). Therefore, the description of the repeated contents is omitted.

[0125] Figures 15 to 17is a schematic diagram illustrating a method of manufacturing a display device according to another embodiment. Fig.16 is along Fig.15 Schematic cross-sectional view of the intermediate structure taken along line VII-VII'. Fig.17 is along Fig.15 Schematic cross-sectional view taken along line VII-VII'.

[0126] refer to Figures 15 to 17 After the circuit layer CIR, the first pixel electrode PXE1, the second pixel electrode PXE2, the pixel defining layer PDL, the first pattern PT1, the second pattern PT2, and the spacer SP′ are formed, the first pattern PT1 and the second pattern PT2 may be removed.

[0127] In this case, the method of forming the circuit layer CIR, the first pixel electrode PXE1, the second pixel electrode PXE2, the pixel defining layer PDL, the first pattern PT1, the second pattern PT2, and the spacer SP' may be the same as that of the reference Figures 5 to 11 The described methods of forming the circuit layer CIR, the first pixel electrode PXE1, the second pixel electrode PXE2, the pixel defining layer PDL, the first pattern PT1, the second pattern PT2, and the spacer SP are substantially the same (or similar). Therefore, the description of the repeated contents is omitted.

[0128] Fig.18 is a schematic plan view illustrating a display area of ​​a display device according to still another embodiment.

[0129] refer to Fig.18 , a display device according to still another embodiment may include a pixel defining layer PDL, a pattern part PT", and a spacer SP" disposed in a display area DA".

[0130] The pixel definition layer PDL can be compared with the reference Figure 1 The pixel defining layers PDL described are basically the same.

[0131] The spacer SP" may be disposed on the pixel defining layer PDL between two adjacent emission areas EA. In this case, the spacer SP" may be disposed to overlap a line connecting the shortest distance between the two adjacent emission areas EA on a plane.

[0132] The pattern portion PT" may be disposed between the spacer SP" and the pixel defining layer PDL. Fig.19 and Fig. 20 Describe the pattern portion PT in detail.

[0133] The connection area CA may be a partial area on the pixel defining layer PDL that is spaced apart from the spacer SP″. The connection area CA may be spaced apart from the reference Figure 1 and Figure 4 The described connection areas CA are substantially the same (or similar).

[0134] Fig.19 is along Fig.18 Schematic cross-sectional view taken along line VIII-VIII'. Fig. 20 yes Fig.19 Schematic enlarged cross-sectional view of region CC.

[0135] refer to Figures 18 to 20 According to another embodiment, the display device may include a circuit layer CIR, a first pixel electrode PXE1, a second pixel electrode PXE2, a pixel defining layer PDL, an organic light-emitting material EL, a first functional layer CL1, an intermediate functional layer CLm, a second functional layer CL2, a common electrode layer CE, a pattern portion PT", a separator SP" and an encapsulation layer EN.

[0136] In this case, the circuit layer CIR, the first pixel electrode PXE1, the second pixel electrode PXE2, the pixel defining layer PDL, the organic light emitting material EL, the first functional layer CL1, the intermediate functional layer CLm, the second functional layer CL2, the common electrode layer CE and the encapsulation layer EN according to the further embodiment may be the same as the reference Figures 1 to 4 The described circuit layer CIR, the first pixel electrode PXE1, the second pixel electrode PXE2, the pixel defining layer PDL, the organic light emitting material EL, the first functional layer CL1, the middle functional layer CLm, the second functional layer CL2, the common electrode layer CE and the encapsulation layer EN are substantially the same (or similar). Therefore, the description of the repeated contents is omitted.

[0137] The pattern portion PT" may be disposed on the pixel defining layer PDL between the first pixel opening PO1 and the second pixel opening PO2. In addition, a spacer SP" may be disposed on the pattern portion PT". In this case, a region where the spacer SP" is disposed may be referred to as a partition region SPA.

[0138] The spacer SP" may include portions sequentially arranged in the third direction DR3. More specifically, the spacer SP" may include a first inclined portion SP"_P2 disposed on the pattern portion PT" and a second inclined portion SP"_P3 disposed on the first inclined portion SP"_P2.

[0139] The first inclined portion SP"_P2 may directly contact the pattern portion PT". In this case, the entire lower surface of the first inclined portion SP"_P2 may cover the entire upper surface of the pattern portion PT".

[0140] The width of the first inclined portion SP"_P2 may gradually increase in the third direction DR3. In other words, the first inclined portion SP"_P2 may have an inverse tapered shape with respect to the upper surface of the pixel defining layer PDL.

[0141] The first inclined portion SP"_P2 may define an undercut space by being spaced apart from the pixel defining layer PDL. In this case, the undercut space may include a first undercut space UC1" adjacent to the first pixel opening PO1 and a second undercut space UC2" adjacent to the second pixel opening PO2.

[0142] The width of the second inclined portion SP"_P3 may gradually increase in the third direction DR3. In other words, the second inclined portion SP"_P3 may have an inverse tapered shape with respect to the upper surface of the pixel defining layer PDL.

[0143] The first inclined portion SP"_P2 may have a first average taper angle, and the second inclined portion SP"_P3 may have a second average taper angle. The first average taper angle may refer to an average inclination of the side surface of the first inclined portion SP"_P2 relative to the third direction DR3, and the second average taper angle may refer to an average inclination of the side surface of the second inclined portion SP"_P3 relative to the third direction DR3. In this case, the second average taper angle may be smaller than the first average taper angle.

[0144] The separator SP" can be connected with the reference Figures 1 to 4 The described spacers SP have substantially the same (or similar) functions.

[0145] More specifically, the separator SP" may include a second inclined portion SP"_P3 having an inverted cone shape. Accordingly, in the case where each of the first functional layer CL1, the intermediate functional layer CLm, the second functional layer CL2 and the common electrode layer CE is formed as a whole by a front deposition process or the like, the first functional layer CL1, the intermediate functional layer CLm, the second functional layer CL2 and the common electrode layer CE may basically not be formed on the side surface of the second inclined portion SP"_P3. Therefore, the first functional layer CL1, the intermediate functional layer CLm, the second functional layer CL2 and the common electrode layer CE may be disconnected by the second inclined portion SP"_P3.

[0146] In this case, due to process errors, etc., the first functional layer CL1, the intermediate functional layer CLm, the second functional layer CL2 and the common electrode layer CE may be formed on the side surface of the second inclined portion SP"_P3, and therefore there may be a problem that the first functional layer CL1, the intermediate functional layer CLm, the second functional layer CL2 and the common electrode layer CE are not disconnected. In order to prevent this situation, in the present disclosure, the separator SP" may include a first inclined portion SP"_P2 having a first average cone angle larger than the second average cone angle of the second inclined portion SP"_P3. Accordingly, even if the first functional layer CL1, the intermediate functional layer CLm, the second functional layer CL2 and the common electrode layer CE are formed on the side surface of the second inclined portion SP"_P3 due to process errors, etc., the first functional layer CL1, the intermediate functional layer CLm, the second functional layer CL2 and the common electrode layer CE may not be formed on the side surface of the first inclined portion SP"_P2 (or not formed in the first undercut space UC1" and the second undercut space UC2").

[0147] Figures 21 to 28 is a schematic diagram illustrating a method of manufacturing a display device according to still another embodiment. Fig. 22 is along Fig.21 Schematic cross-sectional view taken along line IX-IX'. Fig.24 is along Fig.23 A schematic cross-sectional view taken along line XX'. Fig.26 and Fig. 27 is along Fig.25 Schematic cross-sectional view of the intermediate structure taken along line XI-XI'. Fig.28 is along Fig.25 Schematic cross-sectional view taken along line XI-XI'.

[0148] refer to Fig.21 and Fig. 22 , pixel electrodes spaced apart from each other may be formed on the circuit layer CIR. For example, a first pixel electrode PXE1 and a second pixel electrode PXE2 may be formed on the circuit layer CIR.

[0149] The pixel defining layer PDL may be formed on the circuit layer CIR to expose the pixel electrodes and define pixel openings spaced apart from each other. For example, the pixel defining layer PDL may define a first pixel opening PO1 exposing the first pixel electrode PXE1, a second pixel opening PO2 exposing the second pixel electrode PXE2, and a third pixel opening PO3 exposing the third pixel electrode PXE3.

[0150] refer to Fig.23 and Fig.24 , the pattern forming layer PTL may be formed entirely in the display area DA". In this case, Fig.24As shown in FIG. 1 , the pattern forming layer PTL may completely cover the pixel defining layer PDL, the first pixel electrode PXE1 exposed through the first pixel opening PO1 , and the second pixel electrode PXE2 exposed through the second pixel opening PO2 .

[0151] refer to Figure 25 to Figure 28 , after forming the spacer SP", the pattern forming layer PTL may be patterned to form a pattern portion PT".

[0152] More specifically, if Fig.26 As shown in , the photoresist layer PR may be completely coated on the display area DA″. In this case, the photoresist layer PR may completely cover the pattern forming layer PTL.

[0153] After the photoresist layer PR is coated, a portion of the photoresist layer PR may be exposed to form a removal portion PR_E and a remaining portion PR_R. In the case where the photoresist layer PR is a positive type, the removal portion PR_E may be exposed, and thus the removal portion PR_E may be removed in a development process described below. As another example, in the case where the photoresist layer PR is a negative type, the remaining portion PR_R may be exposed, and thus the removal portion PR_E other than the remaining portion PR_R may be removed in a development process described below.

[0154] After the photoresist layer PR is exposed, the removal portion PR_E may be removed by developing the photoresist layer PR with a developer. In this case, the developer may penetrate into the interface between the remaining portion PR_R and the pattern forming layer PTL, and thus may form the above reference Fig. 20 The separator SP described.

[0155] As described above, the separator SP" may be formed by the interfacial penetration of the developer. To this end, the pattern forming layer PTL (or the pattern portion PT") may include a material having a relatively weak adhesive strength relative to the material included in the separator SP" (for example, the material included in the photoresist layer PR). For example, the separator SP" may include a photosensitive organic material, and the photosensitive organic material may be hydrophobic. In this case, the pattern forming layer PTL may include a hydrophilic material (for example, a metal, a metal oxide, an inorganic insulating material, etc.), and thus the interfacial penetration of the developer may be promoted.

[0156] After the spacer SP" is formed, the pattern part PT" may be formed by patterning the pattern forming layer PTL using the spacer SP" as a mask.

[0157] The above description is an example of the technical features of the present disclosure, and those skilled in the art to which the present disclosure belongs will be able to make various modifications and changes.Therefore, the embodiments of the present disclosure described above can be implemented separately or in combination with each other.

[0158] Therefore, the embodiments disclosed in the present disclosure are not intended to limit the technical spirit of the present disclosure, but are used to describe the technical spirit of the present disclosure, and the scope of the technical spirit of the present disclosure is not limited by these embodiments. The protection scope of the present disclosure should be interpreted by the claims, and it should be understood that all technical spirits within the equivalent scope are included in the scope of the present disclosure.

Claims

1. A display device, include: a pixel defining layer defining a first pixel opening exposing the first pixel electrode and a second pixel opening exposing the second pixel electrode and spaced apart from the first pixel opening; a pattern portion disposed on the pixel defining layer between the first pixel opening and the second pixel opening and including a first pattern and a second pattern spaced apart from each other; as well as Separator, comprising: a contact portion, directly contacting the pixel defining layer between the first pattern and the second pattern; a first inclined portion disposed on the contact portion, spaced apart from the pattern portion to define an undercut space, and having a first average taper angle; and The second inclined portion is disposed on the first inclined portion and has a second average taper angle smaller than the first average taper angle of the first inclined portion.

2. The display device according to claim 1, in, The undercut space defined by the first inclined portion includes: a first undercut space defined by the first pattern and the first inclined portion spaced apart from each other; and A second undercut space is defined by the second pattern and the first inclined portion which are spaced apart from each other.

3. The display device according to claim 1, in, The first pattern is closer to the first pixel opening than the second pattern, and The second pattern is closer to the second pixel opening than the first pattern.

4. The display device according to claim 3, in, The contact portion covers an entire upper surface of the pixel defining layer between the first pattern and the second pattern that are spaced apart from each other.

5. A display device, include: a pixel defining layer defining a first pixel opening exposing the first pixel electrode and a second pixel opening exposing the second pixel electrode and spaced apart from the first pixel opening; as well as Separator, comprising: A contact portion directly contacts the pixel defining layer; a first inclined portion disposed on the contact portion, spaced apart from the pixel defining layer to define an undercut space, and having a first average taper angle; and The second inclined portion is disposed on the first inclined portion and has a second average taper angle smaller than the first average taper angle of the first inclined portion.

6. A display device, include: a pixel defining layer defining a first pixel opening exposing the first pixel electrode and a second pixel opening exposing the second pixel electrode and spaced apart from the first pixel opening; a pattern portion, disposed on the pixel defining layer between the first pixel opening and the second pixel opening; as well as Separator, comprising: a first inclined portion, disposed on the pattern portion, spaced apart from the pixel defining layer to define an undercut space, and having a first average taper angle; and The second inclined portion is disposed on the first inclined portion and has a second average taper angle smaller than the first average taper angle of the first inclined portion.

7. The display device according to claim 6, in, The first inclined portion directly contacts the pattern portion.

8. The display device according to any one of claims 1 to 7, in, In the cross section, the width of the first inclined portion gradually increases in a direction away from the upper surface of the pixel defining layer, and In the cross section, a width of the second inclined portion gradually increases in the direction away from the upper surface of the pixel defining layer.

9. The display device according to any one of claims 1 and 3 to 7, in, The undercut space defined by the first inclined portion includes: a first undercut space adjacent to the first pixel opening; and The second undercut space is adjacent to the second pixel opening.

10. The display device according to any one of claims 1 to 7, further comprising: include: A first emission layer is disposed in the first pixel opening; A second emission layer is disposed in the second pixel opening; as well as a common layer electrically connected to each of the first emission layer and the second emission layer, Wherein, the common layer includes: a first portion extending from within the first pixel opening to the pixel defining layer adjacent to the first pixel opening; a second portion extending from within the second pixel opening to the pixel defining layer adjacent to the second pixel opening; and The third part is arranged on the separator, wherein, in a region between the first pixel opening and the second pixel opening, each of the first portion of the common layer and the second portion of the common layer is spaced apart from the third portion of the common layer, and Wherein, in a connection area adjacent to the area between the first pixel opening and the second pixel opening and spaced apart from the partition, each of the first portion of the common layer and the second portion of the common layer is electrically contacted with the third portion of the common layer.