Ultrahigh-precision frequency and pulse number measuring device based on FPGA (Field Programmable Gate Array)

The FPGA-based device addresses measurement inaccuracies by synchronizing signals and calculating frequencies using a combinational logic gate array, achieving high precision across high and low frequencies.

CN222232580UActive Publication Date: 2024-12-24WODI NETWORK (SHANGHAI) TECH CO LTD
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Patent Information

Application Number
CN202420455026.4
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-03-11
Publication Date
2024-12-24
Estimated Expiration
2034-03-11

AI Technical Summary

Technical Problem

Existing frequency and pulse measurement methods suffer from inaccuracies of ±1 clock cycle, limiting their applicability to either high or low frequencies, and fail to achieve high precision across both domains.

Method used

An ultra-high precision frequency and pulse number measurement device based on FPGA, utilizing a hardware platform with a combinational logic gate array, including a signal synchronization module, unit time gating module, and frequency measurement module, which synchronizes signals, generates unit time gating signals, and calculates frequencies using a specific formula to eliminate measurement errors.

Benefits of technology

The device achieves theoretical accuracy of 0.25*10^-8 by eliminating measurement errors through synchronized counting of clock periods, ensuring high precision across varying frequencies.

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Abstract

The utility model provides an ultra-high precision frequency and pulse count measuring device based on FPGA, belonging to the metering test technical field, including: a hardware platform and a combinational logic gate array realized by related software programming, the hardware platform includes FPGA, Flash, memory and power module, the scheme is that through the cooperation of the hardware platform and combinational logic gate array, the FPGA can be used for measuring the frequency and pulse count of the FPGA. The rising edge of a measured pulse can be automatically tracked, the rising moment of the measured pulse serves as the starting point of unit measurement time, meanwhile, measured actual gating time is integer multiples of the period of a measured clock signal, and under the actual gating signal, clock periods of a standard clock and the measured clock signal are counted at the same time; the actual gating signal is the integral multiple of the period of the measured clock, so that the error generated by the measured signal is eliminated, the error of the period of the standard clock signal is reduced, and the theoretical precision of the device is improved.
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Description

Technical Field

[0001] The utility model belongs to the technical field of measurement and testing, and in particular relates to an ultra-high precision frequency and pulse number measuring device based on FPGA. Background Art

[0002] Frequency and pulse measurement are widely used in the field of electronic measurement. There are two commonly used frequency measurement methods, namely frequency measurement method and period measurement method.

[0003] Frequency measurement method: Count the clock cycles N of the measured signal within the time t, and then calculate the number of clock cycles per unit time, which is the frequency of the measured signal.

[0004] Period measurement method: first measure the clock period T of the clock signal to be measured, and then calculate the frequency of the signal to be measured based on the frequency f=1 / T.

[0005] However, both of the above methods will produce an error of ±1 measured clock cycle, which has certain limitations in practical applications. Moreover, according to the measurement principles of the two methods, it is found that the frequency measurement method is suitable for measuring high-frequency clock signals, while the period measurement method is suitable for measuring low-frequency clock signals. However, neither of them can take into account the measurement requirements of high and low frequencies with the same accuracy. Utility Model Content

[0006] The purpose of the utility model is to provide an ultra-high precision frequency and pulse number measuring device based on FPGA, aiming to solve the problems raised in the above background technology.

[0007] In order to achieve the above purpose, the utility model provides the following technical solutions:

[0008] An ultra-high precision frequency and pulse number measurement device based on FPGA, comprising:

[0009] A hardware platform and a combinational logic gate array implemented therein, wherein the hardware platform includes an FPGA, a Flash, a memory and a power module;

[0010] The combinational logic gate array is used to achieve ultra-high precision pulse frequency and pulse number measurement. The combinational logic gate array includes a signal synchronization module, a unit time gating module, a frequency measurement and calculation module and a top-level module. The signal synchronization module is used to achieve synchronization between the measured signal and the system clock. The unit time gating module is used to generate a unit time gating signal. The frequency measurement and calculation module is used to calculate the input signal to be detected using an equal precision measurement method to obtain the clock frequency of the measured clock signal and output it. The top-level module is used to instantiate the synchronization module, the unit time gating module and the frequency measurement and calculation module to connect their respective corresponding signals, externally input the clock, reset and the signal to be detected, and output the segment selection, bit selection and data to be detected.

[0011] As a preferred solution of the utility model, the signal synchronization module is used to adopt a one-beat processing method to synchronize the signal to be tested with the system clock.

[0012] As a preferred solution of the utility model, the unit time gating module is used to achieve unit time gating ultra-high precision measurement.

[0013] As a preferred solution of the utility model, the frequency measurement calculation module is used to start counting the signal to be measured at the rising edge of the unit time gate signal, and at the same time count the standard 400MHz clock signal. When the unit time gate signal falls, the counting of the signal to be measured ends. The count value N of the signal to be measured during this period is saved when the rising edge of the next unit time gate signal arrives. The count value M of the standard clock signal during this period is saved.

[0014] As a preferred solution of the utility model, the formula for calculating the frequency value of the pulse to be measured is Fre=[0.25*108(N+1)] / M.

[0015] Compared with the prior art, the beneficial effects of the utility model are:

[0016] This solution can automatically track the rising edge of the measured pulse through the coordinated use of the hardware platform and the combinational logic gate array, and use the rising moment of the measured pulse as the starting point of the unit measurement time. At the same time, the actual gate time measured is an integer multiple of the period of the measured clock signal. Under the actual gate signal, the clock periods of the standard clock and the measured clock signal are counted at the same time, and then the clock frequency of the measured signal is calculated. Since the actual gate signal is an integer multiple of the measured clock period, the error generated by the measured signal is eliminated, and the error to the standard clock signal period is reduced, thereby improving the theoretical accuracy of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The accompanying drawings are used to provide a further understanding of the present invention and constitute a part of the specification. They are used together with the embodiments of the present invention to explain the present invention and do not constitute a limitation to the present invention.

[0018] In the attached picture:

[0019] Figure 1 It is a module schematic diagram of the overall structure of the utility model;

[0020] Figure 2 The figure is a schematic diagram of the precision measurement principle of the structure of the utility model. DETAILED DESCRIPTION

[0021] The following will be combined with the drawings in the embodiments of the utility model to clearly and completely describe the technical solutions in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0022] Example

[0023] See also Figure 1-2 , the technical solution provided by this embodiment is as follows:

[0024] An ultra-high precision frequency and pulse number measurement device based on FPGA, comprising:

[0025] Hardware platform and implemented combinational logic gate array, the hardware platform includes FPGA, Flash, memory and power module;

[0026] The combinational logic gate array is used to realize ultra-high precision pulse frequency and pulse number measurement. The combinational logic gate array includes a signal synchronization module, a unit time gating module, a frequency measurement calculation module and a top-level module;

[0027] The signal synchronization module is used to synchronize the measured signal with the system clock;

[0028] The unit time gating module is used to generate a unit time gating signal;

[0029] The frequency measurement and calculation module is used to calculate the input signal to be detected using an equal-precision measurement method to obtain the clock frequency of the clock signal to be detected and output it;

[0030] The top-level module is used to instantiate the synchronization module, unit time gating module and frequency measurement calculation module to connect their corresponding signals, external input clock, reset and signals to be detected, and output segment selection, bit selection and data to be detected.

[0031] In a specific embodiment of the utility model, through the coordinated use of a hardware platform and a combinational logic gate array, the rising edge of the measured pulse can be automatically tracked, and the rising moment of the measured pulse is used as the starting point of the unit measurement time. At the same time, the actual gate time measured is not a fixed value, but is related to the measured clock signal, and is an integer multiple of the period of the measured clock signal. Under the actual gate signal, the clock periods of the standard clock and the measured clock signal are counted at the same time, and then the clock frequency of the measured signal is calculated by a formula. Since the actual gate signal is an integer multiple of the measured clock period, the error of ±1 clock period generated by the measured signal is eliminated, and an error of ±1 clock period of the standard clock signal is generated. Since an FPGA device is used, its operating clock frequency can reach 400MH, so its theoretical accuracy can reach: 0.25*10-8.

[0032] Specifically, the signal synchronization module is used to adopt a 1-beat processing method to synchronize the signal to be measured with the system clock. Since the input signal to be measured and the system clock belong to different clock domains, the signal is easily metastable when it is transmitted between different clock domains, resulting in fluctuations in the measured value. Here, a 1-beat processing method is adopted to synchronize the signal to be measured with the system clock to make the measured value more stable.

[0033] Specifically, the unit time gating module is used to realize unit time gating ultra-high precision measurement. From the measurement principle, it can be known that unit time gating is indispensable for realizing ultra-high precision measurement. The start of the gating time is the rising edge of the measured signal. From this moment, the counter starts counting, and the gating signal also jumps to a high level from this moment. The initial value of the counter is 0, and the counting clock is the 400MHz system clock. When the counter counts to 4*108, the gating signal jumps to a low level, and the counter returns to zero. When the next rising edge of the measured signal arrives, the counter starts counting again, and the gating signal jumps to a high level from this moment, and so on.

[0034] Specifically, the frequency measurement calculation module is used to start counting the signal to be measured at the rising edge of the unit time gate signal, and also start counting the standard 400MHz clock signal. When the unit time gate signal falls, the counting of the signal to be measured ends, and the count value N of the signal to be measured during this period is saved. When the rising edge of the next unit time gate signal arrives, the count value M of the standard clock signal during this period is saved.

[0035] Specifically, the formula for calculating the frequency value of the pulse to be measured is Fre=[0.25*108(N+1)] / M. The setting of the formula facilitates the calculation of the frequency value controlled by the device.

[0036] Finally, it should be noted that the above description is only a preferred embodiment of the utility model and is not intended to limit the utility model. Although the utility model is described in detail with reference to the above embodiments, those skilled in the art can still modify the technical solutions recorded in the above embodiments or replace some of the technical features therein by equivalents. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the utility model shall be included in the protection scope of the utility model.

Claims

1. An ultra-high precision frequency and pulse number measurement device based on FPGA, characterized in that: include: A hardware platform and a combinational logic gate array implemented therein, wherein the hardware platform includes an FPGA, a Flash, a memory and a power module; The combinational logic gate array is used to achieve ultra-high precision pulse frequency and pulse number measurement. The combinational logic gate array includes a signal synchronization module, a unit time gating module, a frequency measurement and calculation module and a top-level module. The signal synchronization module is used to achieve synchronization between the measured signal and the system clock. The unit time gating module is used to generate a unit time gating signal. The frequency measurement and calculation module is used to calculate the input signal to be detected using an equal precision measurement method to obtain the clock frequency of the measured clock signal and output it. The top-level module is used to instantiate the synchronization module, the unit time gating module and the frequency measurement and calculation module to connect their respective corresponding signals, externally input the clock, reset and the signal to be detected, and output the segment selection, bit selection and data to be detected.

2. The ultra-high precision frequency and pulse number measuring device based on FPGA according to claim 1, characterized in that: The unit time gating module is used to realize unit time gating ultra-high precision measurement.

3. The ultra-high precision frequency and pulse number measuring device based on FPGA according to claim 1, characterized in that: The frequency measurement calculation module is used to count the signal to be measured starting from the rising edge of the unit time gate signal, and count the standard 400MHz clock signal at the same time. When the unit time gate signal falls, the counting of the signal to be measured ends, and the count value N of the signal to be measured during this period is saved when the rising edge of the next unit time gate signal arrives. The count value M of the standard clock signal during this period is saved.