Plasma cutting machine pilot arc overshoot suppression circuit

Abstract

The utility model discloses a pilot arc overshoot suppression circuit of a plasma cutting machine. The pilot arc overshoot suppression circuit comprises an integrated circuit chip, an input circuit and a suppression circuit, the input circuit is connected with the integrated circuit chip and an external pilot arc switch signal interface; and the suppression circuit is connected with the integrated circuit chip and is used for carrying out overshoot suppression. The cutting torch can restrain overshoot, protect a power semiconductor and prolong the service life of the cutting torch.

Description

Technical Field

[0001] The utility model relates to the technical field of plasma cutting machines, in particular to an arc maintenance overshoot suppression circuit for plasma cutting machines. Background Art

[0002] The most common control method for inverter plasma cutting machines on the market is to use the current-type PWM controller represented by UC3846 as the control core, and control high-power semiconductor components such as MOSFET and IGBT to invert and transform the rectified grid power, and then rectify it to obtain a power supply suitable for the plasma cutting process. Taking UC3846 as an example, among the control pins of UC3846, the voltage of pin 5 directly determines the duty cycle of the output PWM drive signal, while the voltage of pin 1 determines the maximum duty cycle of the output.

[0003] In plasma cutting machines with mesh cutting, the switch from cutting mode to arc-maintaining mode is generally based on detecting the current on the positive output cable. If it is lower than the preset value, it is judged that the arc has left the workpiece, and it is necessary to reduce the output current and turn on the arc-maintaining switch to transfer the arc to the arc-maintaining circuit in time to maintain the arc. However, this control method is accompanied by a problem:

[0004] As mentioned above, pin 5 of UC3846 directly determines the duty cycle of the output PWM, and the voltage of pin 5 is controlled by the PI controller (proportional-integral controller) in the control circuit. The input of the PI controller is provided by the current setting and current feedback. In the process of switching from cutting mode to arc-maintaining mode, it is equivalent to the load becoming smaller, the output voltage increasing, and the output current decreasing. At this time, the feedback is less than the setting, and the PI controller will increase the voltage of pin 5 of UC3846, resulting in an increase in the output duty cycle. At this time, if you switch to the arc-maintaining mode, due to the characteristics of the PI controller, the voltage of pin 5 will not decrease immediately, resulting in a current overshoot. The instantaneous overshoot current is not only harmful to the power semiconductor, but may also affect the life of the cutting torch, such as Figure 1 (CH1 is the negative output cable current, CH2 is the arc-pilot output cable current, 20A / V). Summary of the invention

[0005] According to an embodiment of the utility model, a plasma cutting machine arc maintenance overshoot suppression circuit is provided, comprising: an integrated circuit chip, an input circuit and a suppression circuit;

[0006] The input circuit is connected to the integrated circuit chip and the external arc-maintaining switch signal interface;

[0007] The suppression circuit is connected to the integrated circuit chip and is used for overshoot suppression.

[0008] Further, the input circuit includes: a first diode, a first resistor, a first transistor, a first capacitor and a second resistor;

[0009] The cathode of the first diode is connected to the external arc pilot switch signal interface;

[0010] One end of the first resistor is connected to the anode of the first diode;

[0011] The base of the first triode is connected to the other end of the second resistor, and the emitter of the first triode is grounded;

[0012] One end of the first capacitor is connected to the collector of the first transistor, and the other end of the first capacitor is connected to the pin 2 of the integrated circuit chip;

[0013] One end of the second resistor is connected to the collector of the first transistor, and the other end of the second resistor is connected to an external 15V voltage.

[0014] Furthermore, the input circuit further comprises: a third resistor and a second capacitor;

[0015] One end of the third resistor is connected between the other end of the first resistor and the base of the first transistor, and the other end is grounded;

[0016] One end of the second capacitor is connected between one end of the third resistor and the base of the first transistor, and the other end of the second capacitor is connected between the other end of the third resistor and the collector of the first transistor.

[0017] Furthermore, the input circuit further comprises: a second diode and a fourth resistor;

[0018] The anode of the second diode is connected between the other end of the first capacitor and the pin 2 of the integrated circuit chip, and the cathode is connected to the external 15V voltage;

[0019] One end of the fourth resistor is connected between the anode of the second diode and the pin 2 of the integrated circuit chip, and the other end is connected to an external 15V voltage.

[0020] Further, the suppression circuit includes: a fifth resistor, a second triode, a third triode, a sixth resistor, a seventh resistor, a PWM controller, an eighth resistor, a ninth resistor, a third capacitor, a tenth resistor and a fourth capacitor;

[0021] One end of the fifth resistor is connected to pin 3 of the integrated circuit chip;

[0022] The base of the second transistor is connected to the other end of the fifth resistor, the emitter of the second transistor is connected to the emitter of the third transistor, and the collector of the second transistor is connected to pin 1 of the PWM controller;

[0023] The collector of the third transistor is grounded, and the third transistor is connected between one end of the sixth resistor and one end of the seventh resistor;

[0024] The other end of the sixth resistor is connected to an external 15V voltage;

[0025] The other end of the seventh resistor is grounded;

[0026] One end of the eighth resistor is connected to pin 2 of the PWM controller;

[0027] One end of the ninth resistor is connected to the other end of the eighth resistor, and the other end of the ninth resistor is grounded;

[0028] The third capacitor is connected in parallel to both ends of the ninth resistor, one end of the third capacitor is connected to pin 1 of the PWM controller and is connected to the collector of the second transistor;

[0029] The tenth resistor is connected in series with the fourth capacitor and then connected in parallel to both ends of the third capacitor.

[0030] Furthermore, it also includes: a clock circuit, which is connected to the integrated circuit chip.

[0031] Further, the clock circuit comprises: an eleventh resistor and a fifth capacitor;

[0032] One end of the eleventh resistor is connected to the pin 7 of the integrated circuit chip, and the other end of the eleventh resistor is connected to the external 15V voltage;

[0033] One end of the fifth capacitor is connected to the pins 6 and 7 of the integrated circuit chip, and the other end is grounded.

[0034] The plasma cutting machine arc maintenance overshoot suppression circuit according to the embodiment of the utility model can achieve overshoot suppression, protect power semiconductors, and extend the life of the cutting torch.

[0035] It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the technology as claimed. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 This is a detection diagram when current overshoot occurs in the existing current.

[0037] Figure 2 The present invention is a circuit diagram of a plasma cutting machine arc maintenance overshoot suppression circuit according to an embodiment of the present invention.

[0038] Figure 3 The present invention is a detection diagram of an arc maintenance overshoot suppression circuit of a plasma cutting machine after overshoot suppression according to an embodiment of the present invention. DETAILED DESCRIPTION

[0039] The preferred embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings to further illustrate the present invention.

[0040] First, combine Figure 2~3 A plasma cutting machine arc maintenance overshoot suppression circuit according to an embodiment of the utility model is described, which is used for overshoot suppression and has a wide range of application scenarios.

[0041] like Figure 2~3 As shown, a plasma cutting machine arc maintenance overshoot suppression circuit according to an embodiment of the utility model comprises an integrated circuit chip U2, an input circuit and a suppression circuit.

[0042] Specifically, Figure 2 As shown, the integrated circuit chip U2 is a NE555 chip.

[0043] Specifically, Figure 2 As shown, the input circuit is connected to the integrated circuit chip U2 and the external arc-maintaining switch signal interface. The input circuit includes: a first diode Z1, a first resistor R6, a first transistor Q2, a first capacitor C2 and a second resistor R3; the cathode of the first diode Z1 is connected to the external arc-maintaining switch signal interface; one end of the first resistor R6 is connected to the anode of the first diode Z1; the base of the first transistor Q2 is connected to the other end of the second resistor R3, and the emitter of the first transistor Q2 is grounded; one end of the first capacitor C2 is connected to the collector of the first transistor Q2, and the other end of the first capacitor C2 is connected to the pin 2 of the integrated circuit chip U2; one end of the second resistor R3 is connected to the collector of the first transistor Q2, and the other end of the second resistor R3 is connected to the external 15V voltage.

[0044] Further, if Figure 2 As shown, the input circuit also includes: a third resistor R9 and a second capacitor C6; one end of the third resistor R9 is connected between the other end of the first resistor R6 and the base of the first transistor Q2, and the other end is grounded; one end of the second capacitor C6 is connected between one end of the third resistor R9 and the base of the first transistor Q2, and the other end is connected between the other end of the third resistor R9 and the collector of the first transistor Q2.

[0045] Further, if Figure 2 As shown, the input circuit also includes: a second diode D2 and a fourth resistor R4; the anode of the second diode D2 is connected between the other end of the first capacitor C2 and the pin 2 of the integrated circuit chip U2, and the cathode is connected to the external 15V voltage; one end of the fourth resistor R4 is connected between the anode of the second diode D2 and the pin 2 of the integrated circuit chip U2, and the other end is connected to the external 15V voltage.

[0046] Specifically, Figure 2As shown, the suppression circuit is connected to the integrated circuit chip U2 for overshoot suppression. The suppression circuit includes: a fifth resistor R5, a second triode Q3, a third triode Q4, a sixth resistor R11, a seventh resistor R10, a PWM controller U3, an eighth resistor R12, a ninth resistor R13, a third capacitor C7, a tenth resistor R14 and a fourth capacitor C8; one end of the fifth resistor R5 is connected to pin 3 of the integrated circuit chip U2; the base of the second triode Q3 is connected to the other end of the fifth resistor R5, the emitter of the second triode Q3 is connected to the emitter of the third triode Q4, the collector of the second triode Q3 is connected to pin 1 of the PWM controller U3, and the second triode Q3 is an NPN transistor; the collector of the third triode Q4 is grounded, and the third triode Q4 is connected to the sixth resistor R1 1 and one end of the seventh resistor R10, the third transistor Q4 is a PNP transistor; the other end of the sixth resistor R11 is connected to the external 15V voltage; the other end of the seventh resistor R10 is grounded; the model of the PWM controller U3 is UC3846; one end of the eighth resistor R12 is connected to pin 2 of the PWM controller U3; one end of the ninth resistor R13 is connected to the other end of the eighth resistor R12, and the other end of the ninth resistor R13 is grounded; the third capacitor C7 is connected in parallel to both ends of the ninth resistor R13, one end of the third capacitor C7 is connected to pin 1 of the PWM controller U3 and to the collector of the second transistor Q3; the tenth resistor R14 is connected in series with the fourth capacitor C8 and then connected in parallel to both ends of the third capacitor C7.

[0047] Further, if Figure 2 As shown, a plasma cutting machine arc maintenance overshoot suppression circuit also includes: a clock circuit, and the clock circuit is connected to the integrated circuit chip U2.

[0048] Furthermore, the clock circuit includes: an eleventh resistor R7 and a fifth capacitor C5; one end of the eleventh resistor R7 is connected to pin 7 of the integrated circuit chip U2, and the other end of the eleventh resistor R7 is connected to an external 15V voltage; one end of the fifth capacitor C5 is connected to pins 6 and 7 of the integrated circuit chip U2, and the other end is grounded.

[0049] Pilot_Signal is the pilot arc switch signal. When the machine is in the cutting state, the pilot arc is closed and Pilot_Signal is at a low level. When the arc needs to be opened, pin 2 of the integrated circuit chip U2 will generate a falling edge signal. Since the external circuit adopts a monostable mode, the integrated circuit chip U2 outputs a positive pulse. The pulse time is determined by the eleventh resistor R7 and the fifth capacitor C5. The second transistor Q3 and the third transistor Q4 work together to pull the voltage of pin 1 of the PWM controller U3 down to the reference voltage of the base of the third transistor Q4 to achieve overshoot suppression, such as Figure 3As shown (CH1 is the negative cable current, CH2 is the arc pilot cable output current, CH3 is the arc pilot switch signal, 20A / V).

[0050] Above, refer to Figure 2~3 The invention describes a plasma cutting machine arc maintenance overshoot suppression circuit according to an embodiment of the utility model, which can achieve overshoot suppression, protect power semiconductors, and extend the life of the cutting torch.

[0051] It should be noted that, in this specification, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprises..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0052] Although the content of the utility model has been described in detail through the above preferred embodiments, it should be appreciated that the above description should not be considered as a limitation of the utility model. After reading the above content, various modifications and substitutions of the utility model will be obvious to those skilled in the art. Therefore, the protection scope of the utility model should be limited by the attached claims.

Claims

1. A plasma cutting machine arc maintenance overshoot suppression circuit, characterized in that: Including: integrated circuit chip, input circuit and suppression circuit; The input circuit is connected to the integrated circuit chip and an external arc-maintaining switch signal interface; The suppression circuit is connected to the integrated circuit chip and is used for overshoot suppression.

2. The plasma cutting machine arc maintenance overshoot suppression circuit as claimed in claim 1, characterized in that: The input circuit comprises: a first diode, a first resistor, a first transistor, a first capacitor and a second resistor; The cathode of the first diode is connected to an external arc-maintaining switch signal interface; One end of the first resistor is connected to the anode of the first diode; The base of the first transistor is connected to the other end of the second resistor, and the emitter of the first transistor is grounded; One end of the first capacitor is connected to the collector of the first transistor, and the other end of the first capacitor is connected to the pin (2) of the integrated circuit chip; One end of the second resistor is connected to the collector of the first transistor, and the other end of the second resistor is connected to an external 15V voltage.

3. The plasma cutting machine arc maintenance overshoot suppression circuit as claimed in claim 2, characterized in that: The input circuit further comprises: a third resistor and a second capacitor; One end of the third resistor is connected between the other end of the first resistor and the base of the first transistor, and the other end is grounded; One end of the second capacitor is connected between one end of the third resistor and the base of the first transistor, and the other end of the second capacitor is connected between the other end of the third resistor and the collector of the first transistor.

4. The plasma cutting machine arc maintenance overshoot suppression circuit as claimed in claim 2, characterized in that: The input circuit further comprises: a second diode and a fourth resistor; The anode of the second diode is connected between the other end of the first capacitor and the pin (2) of the integrated circuit chip, and the cathode is connected to an external 15V voltage; One end of the fourth resistor is connected between the anode of the second diode and the pin (2) of the integrated circuit chip, and the other end is connected to an external 15V voltage.

5. The plasma cutting machine arc maintenance overshoot suppression circuit as claimed in claim 1, characterized in that: The suppression circuit comprises: a fifth resistor, a second triode, a third triode, a sixth resistor, a seventh resistor, a PWM controller, an eighth resistor, a ninth resistor, a third capacitor, a tenth resistor and a fourth capacitor; One end of the fifth resistor is connected to a pin (3) of the integrated circuit chip; The base of the second transistor is connected to the other end of the fifth resistor, the emitter of the second transistor is connected to the emitter of the third transistor, and the collector of the second transistor is connected to the pin (1) of the PWM controller; The collector of the third transistor is grounded, and the third transistor is connected between one end of the sixth resistor and the seventh resistor; The other end of the sixth resistor is connected to an external 15V voltage; The other end of the seventh resistor is grounded; One end of the eighth resistor is connected to the pin (2) of the PWM controller; One end of the ninth resistor is connected to the other end of the eighth resistor, and the other end of the ninth resistor is grounded; The third capacitor is connected in parallel to both ends of the ninth resistor, one end of the third capacitor is connected to the pin (1) of the PWM controller and is connected to the collector of the second transistor; The tenth resistor is connected in series with the fourth capacitor and then connected in parallel at both ends of the third capacitor.

6. The plasma cutting machine arc maintenance overshoot suppression circuit as claimed in claim 1, characterized in that: It also includes: a clock circuit, which is connected to the integrated circuit chip.

7. The plasma cutting machine arc maintenance overshoot suppression circuit as claimed in claim 6, characterized in that: The clock circuit comprises: an eleventh resistor and a fifth capacitor; One end of the eleventh resistor is connected to the pin (7) of the integrated circuit chip, and the other end of the eleventh resistor is connected to an external 15V voltage; One end of the fifth capacitor is connected to the pins (6) and (7) of the integrated circuit chip, and the other end is grounded.

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