Semiconductor process device and semiconductor coating equipment

Abstract

The utility model belongs to the technical field of semiconductors, and provides a semiconductor process device, which is arranged in front of a process chamber of semiconductor coating equipment, and comprises a shell in which a cavity for accommodating a wafer is formed; the heating part is arranged in the cavity and is used for heating the wafer; the inert gas inlet and the gas outlet are formed in the shell and are communicated with the cavity. The utility model also provides semiconductor coating equipment. In the semiconductor process device, the heating part is arranged in the cavity for accommodating the wafer to heat the wafer, so that titanium tetrachloride, other residues and other impurities on the surface of the wafer are effectively evaporated into the cavity, and then inert gas is introduced and pumped away to take away the impurities evaporated into the cavity; according to the technical scheme, impurities remaining on the surface of the wafer are removed in advance, generation of by-products when the wafer enters the process chamber is reduced, performance superiority of the environment in the process chamber is improved, and the influence of tiny dust particles on products is reduced so as to increase the yield of the products.

Description

Technical Field

[0001] The utility model belongs to the technical field of semiconductors, and in particular relates to a semiconductor process device and semiconductor coating equipment. Background Art

[0002] TiCl4 (titanium tetrachloride) is an important raw material for generating TiN (titanium nitride) by CVD / ALD method. However, after the reaction, a small amount of TiCl4 and other by-products will remain on the surface of the wafer (such as the incompletely reacted product TiCl x ).

[0003] When the TiCl4 residue on the wafer surface enters the next step of W CVD process, it will volatilize at high temperature and generate a white crystalline TiF with other by-products (such as F ions). x This substance will adhere to the surface of the shower head and cannot be removed by conventional cleaning methods such as NF3 plasma cleaning. x After a long period of accumulation, dust particles will fall on the surface of the wafer or heater, causing abnormal wafer chuck, thus shortening the equipment maintenance cycle, increasing the number of preventive maintenance, shortening the equipment operation time, and affecting production efficiency. x The substance will oxidize and turn blue in the atmosphere. When using liquid cleaning to clean the equipment, it is very easy to block the holes of the sprinkler head, causing abnormal subsequent spraying treatment and further affecting product production.

[0004] If the above by-products such as TiCl4 still remain on the surface of the wafer and cannot be effectively removed, other by-products will be generated when the wafer enters the process chamber of the equipment for processing, causing the internal environment of the chamber to be destroyed, and the product will be more susceptible to the impact of dust particles, resulting in a decrease in product yield.

[0005] With the increase in production capacity in the later stage, there are strict considerations for many performances of the equipment, such as the operating time, preventive maintenance cycle, and dust particles. In order to improve the performance of the equipment in all aspects, the source of dust particles should be avoided or thoroughly resolved in time to improve the efficiency of the equipment, reduce unnecessary downtime, and ensure high-quality and efficient production of products. Utility Model Content

[0006] The embodiment of the utility model provides a semiconductor process device, which aims to solve the technical problem that the product yield and product production efficiency of semiconductor products are affected by TiCl4 and other by-products remaining on the wafer surface in semiconductor coating equipment.

[0007] The embodiment of the utility model is implemented as follows: a semiconductor process device is installed before the process chamber of a semiconductor coating device, comprising:

[0008] A housing having a cavity for accommodating the wafer formed therein;

[0009] a heating part disposed in the cavity, the heating part being used to heat the wafer; and

[0010] An inert gas inlet and a gas outlet are arranged on the shell and communicated with the cavity.

[0011] Furthermore, the semiconductor process device further comprises:

[0012] a gas heating assembly in communication with the inert gas inlet; and

[0013] A gas extraction assembly is in communication with the gas outlet.

[0014] Furthermore, the semiconductor process device also includes a base which is liftably arranged on the shell and located in the cavity, the heating part is arranged in the base, and the wafer is carried on the base.

[0015] Furthermore, the base comprises:

[0016] A base body, wherein the heating part is arranged in the base body, and the wafer is carried on the base body;

[0017] a first driving element disposed on the housing;

[0018] a driving rod disposed between the first driving element and the seat body, one end of the driving rod being drivingly connected to the first driving element and the other end of the driving rod supporting the seat body; and

[0019] A plurality of support rods pass through the base body, wherein one end of the support rod abuts against the wafer carried on the base body, and the other end of the support rod abuts against the shell.

[0020] Furthermore, the inert gas inlet is arranged at the top of the shell, and the gas outlet is arranged at the bottom of the shell.

[0021] Furthermore, the semiconductor process device further comprises:

[0022] A nozzle is arranged on the top of the cavity and communicated with the inert gas inlet, and a plurality of nozzle holes communicated with the cavity are arranged on the nozzle.

[0023] Furthermore, the gas outlet directions of the plurality of nozzles are toward the base.

[0024] Furthermore, the projection of the gas outlet surface surrounded by the plurality of nozzle holes at the outermost periphery of the nozzle toward the base covers the base.

[0025] Furthermore, the semiconductor coating equipment includes a wafer transfer chamber for transferring the wafer to a coating process, and the semiconductor process device is arranged on one side of the wafer transfer chamber.

[0026] Furthermore, the inert gas inlet includes a first gas inlet arranged at the top of the shell and a second gas inlet arranged at the side of the shell, and the gas outlet is arranged at the bottom of the shell.

[0027] Furthermore, the semiconductor process device further comprises:

[0028] A first nozzle disposed at the top of the cavity and connected to the first gas inlet, wherein the first nozzle is provided with a plurality of first spray holes connected to the cavity; and

[0029] A second nozzle is arranged at the side of the cavity and communicated with the second gas inlet, and a plurality of second nozzle holes communicated with the cavity are arranged on the second nozzle.

[0030] Furthermore, the gas outlet directions of the plurality of first spray holes and the gas outlet directions of the plurality of second spray holes are both toward the base.

[0031] Furthermore, the projection of the gas outlet surface surrounded by the plurality of the first nozzle holes at the outermost periphery of the first nozzle toward the base covers the base;

[0032] The height of the highest point of the wafer rising and falling in the chamber is not greater than the height of the second nozzle hole at the highest point on the second nozzle head, and the lowest point is not less than the height of the second nozzle hole at the lowest point on the second nozzle head.

[0033] Furthermore, the semiconductor coating equipment includes a wafer loading chamber for transferring the wafer to a vacuum environment, and the semiconductor process device is arranged in the wafer loading chamber.

[0034] Furthermore, the semiconductor process device also includes a base arranged on the shell and located in the cavity, the heating part is arranged in the base, and the wafer is carried on the base.

[0035] Furthermore, a lifting assembly for lifting the wafer from the base is provided on the top of the shell.

[0036] Furthermore, the lifting assembly comprises:

[0037] a second driving element disposed on the top of the housing; and

[0038] A lifting claw is drivingly connected to the second driving element, and the lifting claw can be lifted and lowered in the cavity under the drive of the second driving element.

[0039] Furthermore, the lifting claw comprises:

[0040] A connecting portion drivingly connected to the second driving element; and

[0041] A plurality of lifting parts are formed by extending downward and inward from the connecting part, and a plurality of notches are arranged at the edge of the base. Each of the lifting parts corresponds to each of the notches, and the lifting parts can be lifted and lowered relative to the notches.

[0042] Furthermore, the inert gas inlet includes a third gas inlet and a fourth gas inlet respectively arranged on both sides of the shell, and the inert gas outlet is arranged below the third gas inlet or the fourth gas inlet.

[0043] Furthermore, the semiconductor process device further comprises:

[0044] a third nozzle disposed at one side of the cavity and connected to the third gas inlet, wherein the third nozzle is provided with a plurality of third nozzle holes connected to the cavity; and

[0045] A fourth nozzle is disposed at the other side of the cavity and communicated with the fourth gas inlet, wherein the fourth nozzle is provided with a plurality of fourth nozzle holes communicated with the cavity.

[0046] Furthermore, the gas outlet directions of the plurality of third spray holes and the gas outlet directions of the plurality of fourth spray holes are both toward the base.

[0047] Furthermore, the height of the highest point of the wafer rising and falling in the chamber is not greater than the height of the third nozzle hole at the highest point on the third nozzle, and the lowest point is not less than the height of the third nozzle hole at the lowest point on the third nozzle; or

[0048] Alternatively, the height of the highest point of the wafer rising and falling in the chamber is not greater than the height of the fourth nozzle at the highest point on the fourth nozzle, and the lowest point is not less than the height of the fourth nozzle at the lowest point on the fourth nozzle.

[0049] Furthermore, there are two semiconductor process devices, and the semiconductor coating equipment includes two wafer loading chambers for transferring wafers to a vacuum environment, and the two semiconductor process devices are respectively arranged in the two wafer loading chambers.

[0050] Furthermore, a plurality of bearing parts are provided on the inner side wall of the shell along the height direction of the inner side wall, and the wafers are carried on the bearing parts.

[0051] Furthermore, the plurality of bearing portions are evenly distributed on two opposite inner side walls of the shell.

[0052] Furthermore, the semiconductor process device further comprises:

[0053] A mounting device is located in the cavity, the shape of the mounting device is adapted to the shape of the cavity, and the heating part is arranged on the mounting device.

[0054] Furthermore, the inert gas inlet includes a fifth gas inlet and a sixth gas inlet respectively arranged at opposite sides of the shell, and the gas outlet is arranged at the bottom of the shell.

[0055] Furthermore, the mounting device is further provided with an air flow channel connected with the fifth gas inlet and the sixth gas inlet, and the air flow channel is provided with a plurality of air flow openings facing the bearing portion.

[0056] Furthermore, the semiconductor coating equipment includes an equipment front-end module for transferring wafers, and the semiconductor process device is arranged in the equipment front-end module.

[0057] The utility model also provides a semiconductor coating device, which comprises the semiconductor process device according to any one of the above items.

[0058] In the semiconductor process device of the utility model, a heating part is arranged in a cavity accommodating the wafer to heat the wafer, so that titanium tetrachloride and other residual impurities on the surface of the wafer are effectively evaporated into the cavity, and then an inert gas is introduced and then pumped away to take away the impurities evaporated into the cavity, thereby effectively realizing the pre-removal of impurities remaining on the surface of the wafer, reducing the generation of by-products when the wafer enters the process chamber, ensuring the performance superiority of the environment inside the process chamber, reducing the influence of dust particles on the product to increase the product yield, and can also extend the interval time of preventive treatment of equipment, reduce the number of preventive treatments to increase the effective utilization rate of the equipment. BRIEF DESCRIPTION OF THE DRAWINGS

[0059] Figure 1 It is a structural schematic diagram of a semiconductor coating device according to an embodiment of the utility model;

[0060] Figure 2 It is a structural schematic diagram of a semiconductor process device according to an embodiment of the utility model;

[0061] Figure 3 It is a structural schematic diagram of a semiconductor coating device according to another embodiment of the utility model;

[0062] Figure 4 It is a structural schematic diagram of a semiconductor process device according to another embodiment of the utility model;

[0063] Figure 5 It is a structural schematic diagram of a semiconductor coating device according to another embodiment of the utility model;

[0064] Figure 6 yes Figure 5 A schematic structural diagram of a wafer loading chamber of the illustrated embodiment;

[0065] Figure 7 It is a structural schematic diagram of a semiconductor process device according to another embodiment of the utility model;

[0066] Figure 8 yes Figure 7 A schematic structural diagram of a base of the illustrated embodiment;

[0067] Fig. 9 yes Figure 7 Another structural schematic diagram of the base of the illustrated embodiment;

[0068] Fig.10 It is a structural schematic diagram of a semiconductor coating device according to another embodiment of the utility model;

[0069] Fig.11 yes Fig.10 A schematic structural diagram of a wafer loading chamber of the illustrated embodiment;

[0070] Fig.12 It is a structural schematic diagram of a semiconductor process device according to yet another embodiment of the utility model;

[0071] Fig.13 It is a structural schematic diagram of a semiconductor coating device according to yet another embodiment of the utility model. DETAILED DESCRIPTION

[0072] In order to make the purpose, technical solution and advantages of the utility model clearer, the utility model is further described in detail below in conjunction with the accompanying drawings and embodiments. Examples of the embodiments are shown in the accompanying drawings, in which the same or similar reference numerals throughout represent the same or similar elements or elements with the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the utility model, and cannot be understood as limiting the utility model. In addition, it should be understood that the specific embodiments described herein are only used to explain the utility model and are not used to limit the utility model.

[0073] In the description of the present invention, it is necessary to understand that the orientation or positional relationship indicated in the description of the direction and positional relationship is based on the orientation or positional relationship shown in the accompanying drawings, which is only for the convenience of describing the present invention and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.

[0074] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present utility model, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0075] The disclosure below provides many different embodiments or examples for realizing different structures of the utility model. In order to simplify the disclosure of the utility model, the components and settings of specific examples are described below. Of course, they are only examples, and the purpose is not to limit the utility model. In addition, the utility model can repeat reference numbers and / or reference letters in different examples, and this repetition is for the purpose of simplification and clarity, and does not indicate the relationship between the various embodiments and / or settings discussed in itself. In addition, the utility model provides various specific examples of processes and materials, but those of ordinary skill in the art can be aware of the application of other processes and / or the use of other materials.

[0076] See also Figure 1 The semiconductor coating equipment 1000 of the embodiment of the utility model includes a wafer transport platform 100, a front-end module 200 (Front-End-of-Line, FI), a wafer loading chamber 300 (Load Lock), a wafer transfer chamber 400 and a process chamber 500 (Process Chamber) which are connected in sequence. Specifically:

[0077] 1. The wafer 600 (in a box-like form) can be placed on the wafer transport platform 100, which is used to load the wafer 600 into or out of the equipment front-end module 200;

[0078] 2. The equipment front-end module 200 is disposed between the wafer transport platform 100 and the wafer loading chamber 300 and is used to transfer the wafer 600 from the wafer transport platform 100 to the wafer loading chamber 300;

[0079] 3. The wafer loading chamber 300 is used to connect the wafer transfer chamber 400 and the equipment front-end module 200. Since the equipment front-end module 200 is connected to the atmosphere, and then the wafer transfer chamber 400 is connected to the process chamber 500, the wafer transfer chamber 400 and the process chamber 500 need to maintain a vacuum and pollution-free state to ensure normal processing of the wafer. Therefore, the wafer loading chamber 300 can be used as a transition chamber to connect the atmosphere side and the vacuum side. After the wafer 600 is transferred from the equipment front-end module 200 to the wafer loading chamber 300, the door connecting the wafer loading chamber 300 and the equipment front-end module 200 is closed, and then the wafer loading chamber 300 is evacuated to a vacuum environment. Only then does the wafer transfer chamber 400 take out the wafer 600 from the wafer loading chamber 300 and transfer it to the subsequent process chamber 500, thereby realizing the loading and transfer of the wafer 600 in two environments;

[0080] 4. The wafer transfer chamber 400 is disposed between the process chamber 500 and the wafer loading chamber 300 and is used to transfer the wafer 600 from the wafer loading chamber 300 to the process chamber 500;

[0081] 5. The process chamber 500 is used to perform coating and other treatments on the wafer 600. After the treatment is completed, the wafer 600 is transferred to the wafer loading chamber 300 by the wafer transfer chamber 400.

[0082] In this embodiment, there may be at least two process chambers 500 to simultaneously perform coating and other treatments on the wafers 600 , thereby improving the production efficiency of the coating equipment 1000 .

[0083] Furthermore, a transfer mechanism 410 is provided in the wafer transfer chamber 400, and the transfer mechanism 410 is used to sequentially transfer the wafer 600 to a plurality of process chambers 500 for processing. When the wafer 600 completes the processing process in the process chamber 500, the transfer mechanism 410 takes out the wafer 600 from the process chamber 500, and the process chamber 500 is immediately closed to prevent the internal environment of the process chamber 500 from being affected and damaged by the flow of gas. After the wafer loading chamber 300 is connected with the wafer transfer chamber 400, the transfer mechanism 410 transfers the wafer 600 to the wafer loading chamber 300 for transfer, and then the equipment front-end module 200 is connected with the wafer loading chamber 300 to move the wafer 600 out.

[0084] In this embodiment, a clamping device such as a robot arm 210 is provided in the equipment front-end module 200 for transferring the processed wafer 600 from the wafer loading chamber 300 to the wafer box on the wafer transport platform 100 to achieve processing and transfer of the wafer 600.

[0085] The above descriptions of the functions and positions of the semiconductor coating equipment 1000 and each chamber / module such as the wafer transport platform 100, the equipment front-end module 200, the wafer loading chamber 300, the wafer transfer chamber 400 and the process chamber 500 are only exemplary and should not be construed as limiting the present invention. For other functions and features that can be achieved by the semiconductor coating equipment 1000 and each of the above chambers / modules, reference can be made to other functions and features of the semiconductor coating equipment 1000 commonly used in the art and each of the functional chambers / modules contained therein, and no detailed description is given here.

[0086] In order to avoid the presence of TiCl4 and other residues on the surface of the wafer, which may produce other by-products when the wafer enters the process chamber 500 for processing and affect the product yield, in an embodiment of the utility model, a semiconductor process device 10 is installed before the process chamber 500 of the semiconductor coating equipment 1000. The semiconductor process device 10 can be installed in or outside the above-mentioned equipment front-end module 200 (FI), wafer loading chamber 300 (Load Lock) and wafer transfer chamber 400 to achieve effective pre-treatment before the wafer enters the process chamber 500 for coating and other treatments.

[0087] See also Figure 2 The semiconductor process device 10 of the embodiment of the utility model includes a shell 11, a heating part 12, an inert gas inlet 111 and a gas outlet 112. A cavity 113 for accommodating wafers is formed in the shell 11. The heating part 12 is arranged in the cavity 113 for heating the wafers. The inert gas inlet 111 and the gas outlet 112 are arranged on the shell 11 and connected to the cavity 113.

[0088] In the semiconductor process device 10 of the utility model, a heating unit 12 is arranged in the cavity 113 for accommodating the wafer to heat the wafer, so that the titanium tetrachloride and other residual impurities on the surface of the wafer are effectively evaporated into the cavity 113, and then an inert gas is introduced to mix with the gasified by-product residue to form a mixed gas, which is then pumped away to take away the impurities evaporated into the cavity 113, thereby effectively pre-removing the impurities remaining on the surface of the wafer, reducing the generation of by-products when the wafer enters the process chamber, ensuring the performance superiority of the internal environment of the process chamber, reducing the influence of dust particles on the product to increase the product yield, and can also extend the interval time of preventive treatment of the equipment, reduce the number of preventive treatments to increase the effective utilization rate of the equipment.

[0089] The semiconductor process device 10 of this embodiment can be arranged outside the semiconductor coating equipment 1000 as an independent device, or can be arranged inside the semiconductor coating equipment 1000 as a part thereof. It is specifically designed according to the different functions and different volume sizes of different chambers in the semiconductor coating equipment 1000, so that the semiconductor process device 10 can be well adapted to the semiconductor coating equipment 1000.

[0090] After the wafer is processed, it can be transferred to the next chamber in the semiconductor coating equipment 1000 for other processing, or it can be moved out of the semiconductor coating equipment 1000 and stored separately, and then moved into the semiconductor coating equipment 1000 when coating is needed.

[0091] Specifically, the housing 11 of the semiconductor process device 10 can be a relatively regular metal housing 11, such as a cube, a cuboid or a cylinder, etc., which not only has sufficient structural strength to ensure structural stability, but also has a regular appearance that is easier to adapt to each regular cavity 113 in the semiconductor coating device 1000. There is no specific limitation on the shape of the housing 11, and it can be designed according to actual needs.

[0092] The shell 11 is a hollow structure, in which the empty space is a cavity 113 for accommodating wafers and other structures such as the heating unit 12. The shape of the cavity 113 is not limited and can be designed to fully accommodate the wafers and other structures such as the heating unit 12.

[0093] Preferably, the shape of the cavity 113 is substantially the same as that of the housing 11 , which is easier to manufacture and implement in terms of technology.

[0094] Among them, the heating part 12 is used to heat the wafer. The heating part 12 can directly heat the wafer, such as the wafer is placed on the heating part 12 or on a structure provided with the heating part 12 for heating, or the heating part 12 directly releases heat radiation to the wafer for heating, etc., or the heating part 12 heats the cavity 113 to heat the wafer in the cavity 113.

[0095] The heating part 12 can be arranged at any position in the cavity 113, such as the top, bottom, side, etc., or the heating part 12 can be arranged at multiple positions in the cavity 113 at the same time, and any number of heating parts 12 can be arranged at each position for simultaneous heating.

[0096] The heating methods include but are not limited to direct contact heat conduction and indirect heating heat radiation, such as using heating elements such as irradiation lamps, resistance heaters, heating wires and carbon silicon rods as the heating part 12 for heating. Heating can also be performed by liquid heating, heating gas purging and other methods. The heating methods and devices are mature technologies in this field, so they are not listed here one by one.

[0097] Preferably, in one embodiment, the wafer is placed on the heating portion 12 for direct heating to quickly increase the temperature of the wafer, thereby enhancing the evaporation effect of residual byproducts such as TiCl 4 on the surface of the wafer and improving processing efficiency.

[0098] It can be understood that the inert gas inlet 111 in this embodiment is used to introduce inert gas into the chamber 113. For example, the inert gas inlet 111 can be connected to an inert gas source through a pipeline to introduce inert gas into the chamber 113 and purge the wafer in the chamber 113. In addition, the inert gas can be continuously introduced through the inert gas inlet 111, and the mixed gas can be continuously discharged through the gas outlet 112 to improve the cleaning effect of residual by-products.

[0099] In this way, after the heating unit 12 heats the wafer to a certain temperature so that the by-product residues such as TiCl4 on the wafer surface are fully evaporated into the cavity 113, the inert gas can be mixed with these vaporized by-product residues in the cavity 113 to prevent these residues from adhering to the wafer surface again, and then the mixed gas flows out of the cavity 113 through the gas outlet 112 to achieve purification of the wafer.

[0100] The mixed gas can flow out of the gas outlet 112 naturally or by extraction. Preferably, the gas outlet 112 can be connected to the extraction device at the rear end through a pipeline, and the mixed gas can be extracted from the cavity 113 by the extraction device to speed up the processing process. The inert gas inlet 111 and the gas outlet 112 can be set at any suitable position on the shell 11, as long as the inert gas can be introduced and exported.

[0101] In one embodiment, the position of the inert gas inlet 111 on the shell 11 is not lower than the position of the gas outlet 112 on the shell 11, so that the inert gas can be input into the cavity 113 from a relatively high place, flow downward more smoothly, and then flow out through the relatively lower gas outlet 112 to more effectively remove the residual by-products.

[0102] Furthermore, the inert gas introduced by the inert gas inlet 111 is also heated, such as being heated to a temperature close to that of the wafer, so that the inert gas and the residual by-products such as volatilized TiCl4 can be mixed together more quickly at a similar temperature without the problem of mutual repulsion. It can also avoid the problem of pre-cooling and re-attachment of the residual by-products due to pre-cooling of the wafer, thereby improving the processing efficiency.

[0103] See also Figure 2In order to improve the comprehensiveness of the functions of the semiconductor process device 10 , in an embodiment of the present utility model, the semiconductor process device 10 further includes a gas heating component 13 connected to the inert gas inlet 111 and a gas extraction component 14 connected to the gas outlet 112 .

[0104] The heating of the inert gas is a mature technology in the art, and its specific form and the specific structure of the heating component are not described in detail here, and it is sufficient to be able to input and heat the inert gas. The gas extraction component 14 can be a device with extraction capability such as an air pump, and the mixed gas can be centrally stored after being extracted from the cavity 113, and then subjected to harmless treatment or recycling.

[0105] It is worth mentioning that the cavity 113 must be maintained in a vacuum state. The purpose of maintaining a vacuum environment in the cavity 113 is to reduce the residual gas in the cavity 113 and prevent the wafer from being contaminated again. The vacuum environment can be formed by evacuating the cavity 113 through a vacuum pumping device.

[0106] Furthermore, in order to prevent other gases from flowing into the cavity 113 from the inert gas inlet 111 and / or the gas outlet 112, the inert gas inlet 111 and the gas outlet 112 can be a one-way inlet / one-way outlet. In this way, the inert gas inlet 111 can only flow in one direction into the inert gas, and the gas outlet 112 can only flow out one direction of the mixed gas, thereby ensuring the vacuum environment of the cavity 113.

[0107] In one embodiment, one side of the wafer, such as only the front side or the back side, may be heated to achieve effective removal of residual byproducts while controlling the structural complexity and energy consumption output of the semiconductor process device 10 .

[0108] In another embodiment, the front and back sides of the wafer may be heated simultaneously to speed up and increase the evaporation rate of residual by-products and improve processing efficiency.

[0109] In this embodiment, the evaporation of the residual byproducts on the surface of the wafer is mainly achieved by heating the back side of the wafer.

[0110] Since the boiling point of TiCl4 is 136°, in this embodiment, the wafer is heated to about 150°, while avoiding the possibility that the wafer may be damaged due to excessively high temperature and the possibility that the residual by-products cannot be effectively evaporated due to excessively low temperature, so that TiCl4 and other residual by-products can be fully evaporated into the cavity 113, and then an inert gas heated to about 150° is introduced to remove TiCl4 and other residues to ensure the cleanliness of the wafer.

[0111] It is worth mentioning that the above-mentioned heating method can also be designed to be modular, and can be selected and assembled according to different needs. Different temperatures can be set and adapted to different temperatures to remove residual byproducts with different boiling points and heat the wafer to meet different usage requirements.

[0112] Please continue reading Figure 2 Furthermore, in this embodiment, the semiconductor process device 10 also includes a base 15 which is liftably disposed on the shell 11 and located in the cavity 113 , the heating unit 12 is disposed in the base 15 , and the wafer is carried on the base 15 .

[0113] That is, the base 15 can be raised and lowered in the cavity 113. The base 15 is disposed on the shell 11 for support. It can be used to carry the wafer and install the heating part 12, so that the wafer can be heated more directly and the heating speed can be accelerated.

[0114] In this embodiment, the base 15 can be a heat-conductive and heat-resistant base 15, such as it can be made of materials such as alumina and ceramics, so that the base 15 can receive the heat radiation from the heating part 12 and heat up without being easily damaged by heat. In this way, when the wafer is placed on the base 15, the wafer can be heated by the base 15 and heated up.

[0115] Since the wafer is carried on the susceptor 15, the heating unit 12 first heats the susceptor 15, and then the susceptor 15 is heated to heat the wafer by heat conduction. The wafer can be directly driven by the susceptor 15 to rise and fall in the chamber 113 to adjust the position of the wafer in the chamber 113, such as the distance relative to the inert gas inlet 111.

[0116] In addition, the base 15 can be a heating base 15, that is, the heating part 12 and the base 15 are an integrated structure, and the base 15 itself is the heating part 12. The wafer can be directly heated comprehensively when it is carried on the base 15, which not only has a better heating effect, but also makes the lifting and lowering of the wafer more stable.

[0117] In the embodiment of the present invention, the base 15 is preferably a heating base 15 .

[0118] Please continue reading Figure 2 Furthermore, in the present embodiment, the base 15 includes a base body 151, a first driving element 152 arranged on the shell 11, a driving rod 153 arranged between the first driving element 152 and the base body 151, and a plurality of supporting rods 154 passing through the base body 151. The heating part 12 is arranged in the base body 151, one end of the driving rod 153 is transmission-connected to the first driving element 152, and the other end supports the base body 151, one end of the supporting rod 154 abuts against the wafer supported on the base body 151, and the other end abuts against the shell 11.

[0119] Specifically, the seat body 151 is located in the cavity 113, and its surface area may be slightly larger than the surface area of ​​the wafer, and its shape is adapted to the shape of the wafer, such as a disc shape, and the surface of the seat body 151 is a smooth plane, and the edge of the seat body 151 may be provided with at least three protrusions to limit the position of the wafer, so as to clamp the contact plane between the wafer and the seat body 151 to prevent the wafer from slipping out of the seat body, so that the wafer can be fully and stably supported on the seat body 151, and friction can be reduced to reduce damage during lifting and placement.

[0120] For details about the heating unit 12 being disposed in the seat body 151 and the materials used to make the seat body 151 , reference can be made to the above description of the heating unit 12 being disposed in the base 15 and the base 15 .

[0121] It is worth noting that, in this embodiment, the base 151 is used as the heating part 12 as a preferred implementation.

[0122] The first driving element 152 can be a driving motor or a push rod motor, etc., which is used to drive the driving rod 153 to move in a telescopic manner, thereby driving the seat body 151 to move up and down. The first driving element 152 can be fixed to the outer wall of the shell 11 by means of screws, welding, etc., so that it is located outside the cavity 113, which can prevent the first driving element 152 from generating pollution and damaging the environment of the cavity 113 when it is working. In addition, since the driving rod 153 passes through the shell 11 and extends into the cavity 113, it is necessary to perform a sealing treatment on the penetration of the driving rod 153 to the shell 11 to avoid damaging the vacuum environment in the cavity 113.

[0123] It can be understood that since the wafer is relatively thin, it is not easy to remove the wafer from the seat 151 when the wafer is supported on the seat 151. Therefore, this embodiment also includes a plurality of support rods 154 on the base 15, and the bottom end of the support rod 154 is arranged on the shell 11, and the top end penetrates into the seat 151 to abut against the wafer.

[0124] In this way, when the base body 151 is lowered to a certain height in the cavity 113, the multiple support rods 154 can support the wafer, so that the wafer can still remain stable when it is separated from the base body 151 and subsequently clamped and transferred, avoiding damage due to insufficient stability, and the support rods 154 can be made of relatively flexible material or the end faces of the support rods 154 are flat, avoiding scratches and other damages to the wafer.

[0125] The number of support rods 154 can be 3, 4, 5, etc., and they are evenly distributed at the positions of equally divided circles. For example, if there are 3 support rods 154, they can be surrounded by an equilateral triangle, with adjacent support rods 154 distributed at an angle of 120°. If there are 4 support rods 154, they can be surrounded by a square, with adjacent support rods 154 distributed at an angle of 90°, and so on. In this way, the support rods 154 support the wafer more stably, improving safety.

[0126] Preferably, in this embodiment, there are three support rods 154, which can control the complexity of the structure and reduce the use of materials while ensuring stable support for the wafer.

[0127] In one embodiment, the height to which the seat body 151 is raised is designed to be no lower than the height of the support rod 154, and the seat body 151 is not separated from the support rod 154 during the lifting process, so as to avoid the situation where the height of the seat body 151 is raised higher than the height of the support rod 154 or the two are separated and misaligned, resulting in the seat body 151 being unable to accurately re-combine with the support rod 154.

[0128] Please continue reading Figure 2 Furthermore, in this embodiment, the inert gas inlet 111 is disposed at the top of the shell 11 , and the gas outlet 112 is disposed at the bottom of the shell 11 .

[0129] The inert gas inlet 111 is arranged at the top of the shell 11, and the gas outlet 112 is arranged at the bottom of the shell 11. After the residual by-products are evaporated into the cavity 113, they are mixed with the inert gas flowing in from the top of the cavity 113 and flow out to the gas outlet 112 at the bottom of the cavity 113, so that the gas flow is smoother and faster, thereby accelerating the processing process of the wafer and improving the processing efficiency.

[0130] In this embodiment, there is at least one inert gas inlet 111. Figure 2 The figure shows one as an example. In other embodiments, more gas inlets may be provided to introduce a larger amount of inert gas into the cavity 113 . The configuration may be performed according to actual needs.

[0131] Please continue reading Figure 2 Furthermore, in this embodiment, the semiconductor process device 10 also includes a nozzle 16 disposed at the top of the cavity 113 and connected to the inert gas inlet 111, and the nozzle 16 is provided with a plurality of nozzles (not shown) connected to the cavity 113, and the gas outlet direction of the plurality of nozzles is toward the base 15.

[0132] Specifically, in order to enable the inert gas introduced by the inert gas inlet 111 to evenly purge the wafer surface, a nozzle 16 is arranged on the inner wall of the shell 11 and connected to the inert gas inlet 111, wherein the nozzle 16 is provided with a plurality of evenly distributed spray holes, and the evenly distributed structure is like the circular or divergent spray holes on the common nozzle 16, and the gas outlet directions of the plurality of spray holes are all toward the base 15, that is, toward the wafer carried on the base 15.

[0133] In this way, after the inert gas is introduced from the inert gas inlet 111 , it flows into the cavity 113 through the multiple nozzles evenly distributed on the nozzle head 16 to evenly purge the wafer surface, thereby increasing the processing speed of the wafer and promoting the cleanliness of the wafer surface.

[0134] Furthermore, the nozzle 16 is located directly above the wafer / susceptor 15, so that the inert gas can be directly blown downward to the surface of the wafer within a short time after being introduced into the cavity 113, thereby ensuring the cleaning effect and efficiency of the wafer.

[0135] Spraying gas or liquid through the nozzle 16 is a mature technology in the art, and the specific structure and setting method of the nozzle 16 are not described in detail here.

[0136] Please continue reading Figure 2 Furthermore, in this embodiment, the projection of the gas outlet surface surrounded by the plurality of nozzle holes at the outermost periphery of the nozzle 16 toward the base 15 covers the base 15 .

[0137] In this way, after the inert gas introduced by the nozzle 16 is sprayed out through the nozzle hole, it can completely cover the wafer, that is, it can completely purge the surface of the wafer while heating it, avoiding the situation where incomplete purge leaves residue, thereby improving the cleaning effect and efficiency of the wafer.

[0138] Please combine Figure 1 and Figure 3 Furthermore, in an embodiment, the semiconductor process device 10 is disposed at one side of the wafer transfer chamber 400 .

[0139] In this embodiment, the semiconductor process device 10 can be an independent device, that is, independent of the semiconductor coating equipment 1000. When the wafer needs to be processed, the semiconductor process device 10 can be placed on one side of the wafer transfer chamber 400 of the semiconductor coating equipment 1000 and connected to the wafer transfer chamber 400. After the wafer 600 is sent into the wafer transfer chamber 400, the connection between the two is immediately closed and sealed to prevent contaminants such as contaminated particles in the processing process from entering the wafer transfer chamber 400 and affecting the product yield.

[0140] When there is no need to process the wafer, the semiconductor process device 10 can be disconnected from the wafer transfer chamber 400 and removed without making too many modifications to the semiconductor coating equipment 1000, thereby controlling the structural complexity of the semiconductor coating equipment 1000.

[0141] Furthermore, in one embodiment, the internal air pressure of the semiconductor process device 10 can be set lower than the internal air pressure of the wafer transfer chamber 400. In this way, if a leak occurs at the connection between the wafer transfer chamber 400 and the semiconductor process device 10, the pressure difference will cause the gas to flow from the wafer transfer chamber 400 to the semiconductor process device 10, thereby preventing contamination particles from flowing from the outside into the wafer transfer chamber 400 or even into the process chamber 500, thereby ensuring product yield.

[0142] See also Figure 4 Furthermore, in an embodiment, the inert gas inlet 111 includes a first gas inlet 1111 disposed at the top of the shell 11 and a second gas inlet 1112 disposed at the side of the shell 11 , and the gas outlet 112 is disposed at the bottom of the shell 11 .

[0143] The first gas inlet 1111 is disposed at the top of the shell 11 , the second gas inlet 1112 is disposed at the side of the shell 11 , and the gas outlet 112 is disposed at the bottom of the shell 11 , so that the first gas inlet 1111 and the second gas inlet 1112 are both higher than the gas outlet 112 .

[0144] In this way, after the residual by-products are evaporated into the cavity 113, they are mixed with the inert gas flowing in from the top and sides of the cavity 113 and flow out to the gas outlet 112 at the bottom of the cavity 113. The setting of the two gas inlets makes the gas flow smoother and faster, and the mixing with the gasified by-product residues is more complete, which can speed up the processing process of the wafer and improve the processing efficiency.

[0145] In one embodiment, only the first gas inlet 1111 or the second gas inlet 1112 may be provided to control the structural complexity of the semiconductor process device 10 .

[0146] In yet another embodiment, more gas inlets may be provided to introduce a larger amount of inert gas into the cavity 113 , and the configuration may be performed according to actual needs.

[0147] In another embodiment, the first gas inlet 1111 and the second gas inlet 1112 can be selectively opened and closed. They can be opened simultaneously when necessary to increase the introduction of inert gas and thus improve the removal rate of residual by-products. They can also be selectively opened when it is not necessary to open them simultaneously to achieve effective removal of residual by-products.

[0148] Please continue reading Figure 4Furthermore, in the present embodiment, the semiconductor process device 10 also includes a first nozzle 16a disposed at the top of the cavity 113 and connected to the first gas inlet 1111, and a second nozzle 16b disposed at the side of the cavity 113 and connected to the second gas inlet 1112. The first nozzle 16a is provided with a plurality of first nozzle holes (not shown) connected to the cavity 113, and the second nozzle 16b is provided with a plurality of second nozzle holes (not shown) connected to the cavity 113. The gas outlet directions of the plurality of first nozzle holes and the gas outlet directions of the plurality of second nozzle holes are both toward the base 15.

[0149] Specifically, in order to enable the inert gas introduced by the first gas inlet 1111 and the second gas inlet 1112 to evenly purge the wafer surface, a first nozzle 16a is arranged on the inner top wall of the shell 11 and connected to the first gas inlet 1111, and the first nozzle 16a is provided with a plurality of evenly distributed first spray holes. A second nozzle 16b is arranged on the inner side wall of the shell 11 and connected to the second gas inlet 1112, and the second nozzle 16b is provided with a plurality of evenly distributed second spray holes, such as the circular or divergent spray holes on the common nozzle 16, and the gas outlet directions of the plurality of first spray holes and the plurality of second spray holes are all toward the base 15, that is, toward the wafer carried on the base 15.

[0150] In this way, after the inert gas is introduced from the first gas inlet 1111 and the second gas inlet 1112, it flows into the cavity 113 from two directions through the multiple first nozzle holes evenly distributed on the first nozzle 16a and the multiple second nozzle holes evenly distributed on the second nozzle 16b to evenly and comprehensively purge the wafer surface, thereby increasing the processing speed of the wafer and promoting the cleanliness of the wafer surface.

[0151] Furthermore, the first nozzle 16a is located directly above the wafer / base 15, and the second nozzle 16b is located on the direct side (such as the direct left / direct right) of the wafer / base 15. In this way, when the inert gas is introduced into the cavity 113 through the first nozzle 16a and the second nozzle 16b, the wafer surface can be purged downward and to the left / right, thereby ensuring the cleaning effect and efficiency of the wafer.

[0152] Furthermore, since the surface of the wafer is the main part that needs to be purged, in this embodiment, the coverage area of ​​the first nozzle 16a is greater than the coverage area of ​​the second nozzle 16b, or it can be understood that the gas output of the first nozzle 16a is greater than the gas output of the second nozzle 16b, so that the first nozzle 16a located directly above the wafer can effectively purge the wafer.

[0153] In addition, when only the first gas inlet 1111 or the second gas inlet 1112 is provided to control the structural complexity of the semiconductor process device 10, only the first nozzle 16a or the second nozzle 16b may be provided accordingly. When more gas inlets are provided to introduce inert gas into the chamber 113, more nozzles 16 may be provided to connect with the newly added gas inlets, and the configuration may be performed according to actual needs.

[0154] In another embodiment, when the first gas inlet 1111 and the second gas inlet 1112 can be selectively opened and closed, the first nozzle 16a and the second nozzle 16b can also be selectively opened and closed. The beneficial effects thereof can be found in the above description of the first gas inlet 1111 and the second gas inlet 1112 and will not be elaborated here.

[0155] For further information, please refer to Figure 4 In this embodiment, the projection of the gas outlet surface surrounded by the multiple first nozzle holes at the outermost periphery of the first nozzle 16a toward the base 15 covers the base 15, and the height of the highest point of the wafer rising and falling in the cavity 113 is not greater than the height of the second nozzle hole at the highest point on the second nozzle head 16b, and the lowest point is not less than the height of the second nozzle hole at the lowest point on the second nozzle head 16b.

[0156] In this way, the inert gas introduced by the first nozzle 16a can completely cover the upper surface of the wafer after being sprayed out through the multiple first nozzle holes, that is, the surface of the wafer can be completely purged, and the inert gas introduced by the second nozzle 16b can also completely cover the side space of the wafer after being sprayed out through the multiple second nozzle holes. Even when the wafer moves with the base 15, the inert gas filling the top and sides of the cavity 113 can still be covered by combining the simultaneous heating of the wafer to avoid incomplete purging of the wafer and the presence of residues, thereby improving the cleaning effect and efficiency of the wafer.

[0157] It is worth noting that the height of the second spray hole mentioned here can be taken as a reference by the shell 11. If there are multiple second spray holes at the same highest point or lowest point, only one of them can be taken as a reference.

[0158] See also Figure 5 Furthermore, in the present embodiment, the semiconductor coating equipment 1000 includes a wafer loading chamber 300 for transferring the wafer to the vacuum environment, and the semiconductor process device 10 is disposed in the wafer loading chamber 300 .

[0159] In order to achieve adaptation to the semiconductor coating equipment 1000 , in addition to disposing the semiconductor process device 10 on one side of the wafer transfer chamber 400 in the above embodiment, the semiconductor process device 10 may also be disposed in the wafer loading chamber 300 in this embodiment.

[0160] Here, the semiconductor process device 10 is disposed in the wafer loading chamber 300. To modify the wafer loading chamber 300, please refer to Figure 6 Generally, the wafer loading chamber 300 includes a heating space and a cooling space separated from the heating space by an insulation layer. The semiconductor process device 10 in this embodiment is integrated in the heating space. After the wafer is heated and the residue is removed by the semiconductor process device 10 in the heating space, it is transferred by the wafer transfer chamber 400 to the process chamber 500 for coating. After the wafer is coated in the process chamber 500, it is transferred to the cooling space of the wafer loading chamber 300 through the wafer transfer chamber 400 to be cooled to normal temperature, and then taken out from the wafer loading chamber 300 and transferred to other chambers.

[0161] The above description of the heating space and the cooling space of the wafer loading chamber 300 is only exemplary and should not be construed as a limitation of the present invention. Those skilled in the art may learn other functions of the heating space and the cooling space based on the common semiconductor coating equipment 1000 in the field, which will not be described in detail here.

[0162] See also Figure 7 Furthermore, in this embodiment, the semiconductor process device 10 also includes a base 15 disposed on the shell 11 and located in the cavity 113 , the heating part 12 is disposed in the base 15 , and the wafer is carried on the base 15 .

[0163] Specifically, the base 15 is provided on the housing 11 to obtain support and ensure structural stability. It can be used to carry the wafer and install the heating unit 12, so that the wafer can be heated more directly and the heating speed can be accelerated. The base 15 can be a heat-conducting and heat-resistant base 15, such as alumina, ceramics and other materials, so that the base 15 can receive the heat radiation of the heating unit 12 and heat up and is not easily damaged by heat. In this way, when the wafer is carried on the base 15, the wafer can be heated by the base 15 and the temperature can be increased.

[0164] Since the wafer is carried on the susceptor 15, the heating unit 12 first heats the susceptor 15, and then the susceptor 15 is heated to heat the wafer by heat conduction. The wafer can be directly driven by the susceptor 15 to rise and fall in the chamber 113 to adjust the position of the wafer in the chamber 113, such as the distance relative to the inert gas inlet 111.

[0165] In addition, the base 15 can be a heating base 15, that is, the heating part 12 and the base 15 are an integrated structure, and the base 15 is the heating part 12. The wafer can be directly heated comprehensively when it is carried on the base 15, which not only has a better heating effect, but also makes the lifting and lowering of the wafer more stable.

[0166] In the embodiment of the present invention, the base 15 is preferably a heating base 15 .

[0167] Please continue reading Figure 7 Furthermore, in this embodiment, a lifting assembly 17 for lifting the wafer from the base 15 is provided on the top of the housing 11 .

[0168] Compared with the previous embodiment, this embodiment does not drive the base 15 to rise and fall from below the base 15, but sets a lifting assembly 17 on the top of the shell 11 to achieve the lifting of the wafer and realize the utilization of the top space of the shell 11.

[0169] Please continue reading Figure 7 Furthermore, in this embodiment, the lifting assembly 17 includes a second driving element 171 arranged on the top of the shell 11 and a lifting claw 172 transmission-connected to the second driving element 171 , and the lifting claw 172 can be lifted and lowered in the cavity 113 under the drive of the second driving element 171 .

[0170] The second driving element 171 may be a driving motor, a push rod motor, etc., which may be fixed to the outer wall of the housing 11 by means of screws, welding, etc., so as to be located outside the cavity 113, so as to avoid the pollution caused by the second driving element 171 when working and damage the environment of the cavity 113. The second driving element 171 is used to drive the lifting claw 172 to move up and down, thereby driving the wafer surrounded by the lifting claw 172 to move up and down. Since the second driving element 171 is arranged in the cavity 113, the lifting claw 172 needs to pass through the housing 11 and extend into the cavity 113, so the penetration of the lifting claw 172 needs to be sealed to avoid damage to the vacuum environment in the cavity 113.

[0171] See also Figure 7 and Figure 8 Furthermore, in this embodiment, the lifting claw 172 includes a connecting portion 1721 that is transmission-connected to the second driving element 171 and a plurality of lifting portions 1722 that extend downward and inward from the connecting portion 1721. A plurality of notches 155 are provided at the edge of the base 15. Each lifting portion 1722 corresponds to each notch 155, and the lifting portion 1722 can be raised and lowered relative to the notch 155.

[0172] It can be understood that since the wafer is relatively thin, it is not easy to remove the wafer from the base 15 when the wafer is supported on the base 15. Therefore, the lifting claw 172 of this embodiment includes a plurality of lifting parts 1722. The lifting part 1722 is roughly hook-shaped, and its top end is transmission-connected to the second driving element 171 through the connecting part 1721, and the bottom end faces the wafer and is located around the wafer to surround and restrict the wafer.

[0173] In the initial state, the lifting claw 172 is at a certain height in the cavity 113, so that the extension of the lifting part 1722 is located below the wafer, and then the lifting claw 172 rises a certain distance. After the multiple lifting parts 1722 pass through each corresponding notch 155, the corresponding extension part lifts the wafer, so that when the wafer is separated from the base 15 and the subsequent wafer transfer is carried out, it can still remain stable to avoid damage due to insufficient stability, and the lifting part 1722 can be made of a relatively flexible material to avoid scratches and other damage to the wafer. When the wafer needs to be moved in, the lifting part 1722 continues to descend and passes through the notch 155, so that the wafer is carried by the base 15.

[0174] like Figure 8 As shown, in this embodiment, there are four notches 155, and the shape formed by the four notches is roughly rectangular, and the length of the long side of the rectangle is greater than the diameter of the wafer. Figure 8 The distance between the two upper or lower notches 155 is equal to the long side of the rectangle, so that the wafer can pass through between two adjacent lifting claws 172 and be placed on the lifting claws 172 .

[0175] In this embodiment, there are four lifting portions 1722 corresponding to the notches, and the shape surrounded by the four lifting portions 1722 is also roughly rectangular, which can control the structural complexity and reduce material usage while ensuring stable support for the wafer.

[0176] See also Fig. 9 , which can be the structure of the base 15 / seat body 151 mentioned above for the support rod 154 to pass through, and Figure 8 The difference is that the base 15 is provided with a through hole 156 so that the support rod 154 can pass through and abut against the wafer. In addition, the base 15 mentioned in the embodiment of the utility model can be roughly disc-shaped to match the shape of the wafer.

[0177] Please continue reading Figure 7 Furthermore, in this embodiment, the inert gas inlet 111 includes a third gas inlet 1113 and a fourth gas inlet 1114 respectively disposed on both sides of the shell 11 , and the inert gas outlet 112 is disposed below the third gas inlet 1113 or the fourth gas inlet 1114 .

[0178] The third gas inlet 1113 and the fourth gas inlet 1114 are respectively arranged on both sides of the shell 11, and the two can be arranged at the same height or symmetrically, and the gas outlet 112 is arranged below the third gas inlet 1113 or the fourth gas inlet 1114, so that the third gas inlet 1113 and the fourth gas inlet 1114 are both higher than the gas outlet 112.

[0179] In this way, after the residual by-products are evaporated into the cavity 113, they are mixed with the inert gas flowing in from both sides and flow out to the gas outlet 112 at the bottom of the cavity 113. The setting of the two gas inlets makes the gas flow smoother and faster, and the mixing with the gasified by-product residues is more complete, which speeds up the processing process of the wafer and improves the processing efficiency.

[0180] In one embodiment, only the third gas inlet 1113 or the fourth gas inlet 1114 may be provided to control the structural complexity of the semiconductor process device 10 .

[0181] In yet another embodiment, more gas inlets may be provided to introduce a larger amount of inert gas into the cavity 113 , and the configuration may be performed according to actual needs.

[0182] In another embodiment, the third gas inlet 1113 and the fourth gas inlet 1114 can be selectively opened and closed. They can be opened simultaneously when necessary to increase the introduction of inert gas and thus improve the removal rate of residual by-products. They can also be selectively opened when it is not necessary to open them simultaneously to achieve effective removal of residual by-products.

[0183] Please continue reading Figure 7 Furthermore, in the present embodiment, the semiconductor process device 10 also includes a third nozzle 16c disposed on one side of the cavity 113 and connected to the third gas inlet 1113, and a fourth nozzle 16d disposed on the other side of the cavity 113 and connected to the fourth gas inlet 1114. The third nozzle 16c is provided with a plurality of third nozzle holes (not shown) connected to the cavity 113, and the fourth nozzle 16d is provided with a plurality of fourth nozzle holes (not shown) connected to the cavity 113. The gas outlet directions of the plurality of third nozzle holes and the gas outlet directions of the plurality of fourth nozzle holes are both toward the base 15.

[0184] Specifically, in order to enable the inert gas introduced by the third gas inlet 1113 and the fourth gas inlet 1114 to evenly purge the wafer surface, a third nozzle 16c is arranged on the inner top wall of the shell 11 and connected to the third gas inlet 1113, and the third nozzle 16c is provided with a plurality of evenly distributed third nozzle holes. A fourth nozzle 16d is arranged on the inner side wall of the shell 11 and connected to the fourth gas inlet 1114, and the fourth nozzle 16d is provided with a plurality of evenly distributed fourth nozzle holes. The third nozzle 16c and the fourth nozzle 16d can be arranged at the same height or symmetrically.

[0185] The plurality of third nozzles are evenly distributed on the third nozzle 16c and the plurality of fourth nozzles are evenly distributed on the fourth nozzle 16d, and reference can be made to the circular or divergently distributed nozzles on the common nozzle 16, so that the gas outlet is more uniform. Moreover, the gas outlet directions of the plurality of third nozzles and the plurality of fourth nozzles are all toward the base 15, that is, toward the wafer carried on the base 15.

[0186] In this way, after the inert gas is introduced from the third gas inlet 1113 and the fourth gas inlet 1114, it flows into the cavity 113 from two directions through the multiple third nozzle holes evenly distributed on the third nozzle 16c and the multiple fourth nozzle holes evenly distributed on the fourth nozzle 16d to evenly and comprehensively purge the wafer surface, thereby increasing the processing speed of the wafer and promoting the cleanliness of the wafer surface.

[0187] Furthermore, the third nozzle 16c can be located on the front side of the wafer / base 15, such as the left side, and the fourth nozzle 16d can be located on the front side of the wafer / base 15, such as the right side. In this way, the inert gas can be blown directly to the left / right on the wafer surface at the moment it is introduced into the cavity 113 through the third nozzle 16c and the fourth nozzle 16d, thereby ensuring the cleaning effect and efficiency of the wafer.

[0188] In addition, when only the third gas inlet 1113 or the fourth gas inlet 1114 is provided to control the structural complexity of the semiconductor process device 10, only the third nozzle 16c or the fourth nozzle 16d may be provided accordingly. When more gas inlets are provided to introduce a larger amount of inert gas into the chamber 113, more nozzles 16 may be provided to connect with the newly added gas inlets, and the configuration may be performed according to actual needs.

[0189] In another embodiment, when the third gas inlet 1113 and the fourth gas inlet 1114 can be selectively opened and closed, the third nozzle 16c and the fourth nozzle 16d can also be selectively opened and closed. The beneficial effects thereof can be found in the above description of the first gas inlet 1111 and the second gas inlet 1112 and are not elaborated here.

[0190] Please continue reading Figure 7 Furthermore, in the present embodiment, the height of the highest point when the wafer is lifted or lowered in the cavity 113 is not greater than the height of the third nozzle hole at the highest point on the third nozzle head 16c, and the lowest point is not less than the height of the third nozzle hole at the lowest point on the third nozzle head 16c; or, the height of the highest point when the wafer is lifted or lowered in the cavity 113 is not greater than the height of the fourth nozzle hole at the highest point on the fourth nozzle head 16d, and the lowest point is not less than the height of the fourth nozzle hole at the lowest point on the fourth nozzle head 16d.

[0191] In this way, after the inert gas introduced by the third nozzle 16c / fourth nozzle 16d is sprayed out through multiple third nozzles 16c / fourth nozzles 16d, it can completely cover the side space of the wafer and then diffuse to the entire cavity 113. Even when the wafer moves with the base 15, it can still be combined with simultaneous heating of the wafer by covering the inert gas filling the side of the cavity 113, thereby avoiding incomplete cleaning of the wafer and the presence of residues, thereby improving the cleaning effect and efficiency of the wafer.

[0192] It is worth noting that the heights of the third and fourth spray holes mentioned here can be referenced to the shell 11 . If there are multiple third and fourth spray holes at the same highest point or lowest point, only one of them can be used as a reference.

[0193] See also Fig.10 Furthermore, in the present embodiment, there are two semiconductor process devices 10 , and the semiconductor coating equipment 1000 includes two wafer loading chambers 300 arranged in parallel, and the two semiconductor process devices 10 are respectively arranged in the two wafer loading chambers 300 .

[0194] In order to achieve the adaptation of the semiconductor coating equipment 1000, in addition to the above embodiment in which the semiconductor process device 10 is arranged in the heating space of the wafer loading chamber 300, as shown in FIG. Fig.11 As shown, the wafer loading chamber 300 can also be converted into a double-layer chamber structure, one layer is a heating space, and the other layer is a cooling space, and the two are separated by an insulating layer, for example, the upper layer is a heating space, and the lower layer is a cooling space.

[0195] There are two semiconductor process devices 10 in this embodiment, such as the left / right semiconductor process device 10, and the two semiconductor process devices 10 are integrated side by side in two heating spaces (left / right heating spaces). The bottom of the semiconductor process device 10 is provided with a cooling structure for the wafer, including a liftable cooling base 15. The specific structure of the cooling base 15 can be specifically referred to the structure of the liftable heating base 15 mentioned above, and no detailed description is given here.

[0196] After the wafer is heated and the residue is removed by any semiconductor process device 10 in the heating space, it is transferred by the wafer transfer chamber 400 to the process chamber 500 for coating. After the wafer is coated in the process chamber 500, it is transferred to the cooling space of the wafer loading chamber 300 through the wafer transfer chamber 400, that is, transferred to the cooling structure at the bottom of the semiconductor process device 10 to cool to normal temperature, and then taken out from the wafer loading chamber 300 and transferred to other chambers. In this way, dual-channel heating and cooling can be achieved, and any semiconductor process device 10 and the cooling structure at its bottom can be used for processing, thereby improving the processing speed of the wafer and accelerating the processing process.

[0197] The above description of the heating space and the cooling space of the wafer loading chamber 300 is only exemplary and should not be construed as a limitation of the present invention. Those skilled in the art may learn other functions of the heating space and the cooling space based on the common semiconductor coating equipment 1000 in the field, which will not be described in detail here.

[0198] See also Fig.12 Furthermore, in the present embodiment, a plurality of carrying portions 18 are provided on the inner side wall of the housing 11 along the height direction of the inner side wall, and the wafers are carried on the carrying portions 18 .

[0199] Specifically, the bearing part 18 is in the form of a thin sheet or a block, which is arranged on the inner side wall of the shell 11 and is located in the cavity 113. When the wafer is carried on the bearing part 18, it is located in the cavity 113. The heating part 12 can be arranged in the cavity 113, or on an idle side wall, or on the top wall or the bottom wall, so as to heat the wafer located in the cavity 113. The bearing part 18 is arranged on the inner side wall of the shell 11, and can be arranged on one inner side wall of the shell 11, or on multiple inner side walls, and can be designed according to actual needs. If the bearing part 18 is arranged along the height direction of the inner side wall, a larger number of bearing parts can be arranged to accommodate more wafers and improve processing efficiency.

[0200] Generally, a box of wafers contains 25 pieces. To accommodate the loading of the wafers, the number of the multiple carriers 18 here can be at least 25, thus achieving large-scale docking processing and greatly improving the wafer processing speed.

[0201] Compared with the first three solutions, this structural design can greatly increase the number of wafers processed, thereby greatly improving wafer processing efficiency and promoting product production.

[0202] In one embodiment, the shell 11 and the multiple bearing parts 18 can be a split structure, that is, after the shell 11 is manufactured, the bearing parts 18 are arranged on the inner wall of the shell 11, such as by welding, snapping, etc. In this way, if the bearing parts 18 are damaged, they can be easily replaced and repaired.

[0203] In another embodiment, the housing 11 and the plurality of supporting parts 18 may be an integral structure, such as being formed in one piece, which can simplify the manufacturing process of the semiconductor process device 10 and increase the production speed of the semiconductor process device 10 .

[0204] Please continue reading Fig.12 Furthermore, in this embodiment, a plurality of bearing portions 18 are evenly distributed on two opposite inner side walls of the housing 11 .

[0205] In this way, the spacing between the relative wafers carried on the carrying part 18 can be made large enough. On the one hand, it is convenient to remove the wafers carried on the carrying part 18. On the other hand, the distances between adjacent carrying parts 18 are equal, which is more regular and beautiful, and also convenient for the setting of the carrying part 18 and the production of the semiconductor process device 10.

[0206] Since this embodiment can process 25 wafers at a time, 25 supporting parts 18 can be symmetrically arranged on an inner wall of the shell 11, and both sides of the 25 wafers can be respectively supported on two opposite supporting parts 18, so that all 25 wafers can be stably supported.

[0207] Please continue reading Fig.12 Furthermore, in the present embodiment, the semiconductor process device 10 further includes a mounting device 19 located in the cavity 113 , the shape of the mounting device 19 is adapted to the shape of the cavity 113 , and the heating part 12 is disposed on the mounting device 19 .

[0208] Specifically, the mounting device 19 can be roughly rectangular, cylindrical or prism-shaped, etc., which is a shape that matches the shape of the cavity 113. The mounting device 19 can be a hollow structure to facilitate heat dissipation. There is at least one heating part 12, and the heating part 12 faces the supporting part 18 located on the inner wall of the shell 11 to effectively heat the wafer on the supporting part 18.

[0209] In this embodiment, the heating part 12 is a light heating device arranged along the height direction of the mounting device 19 to cover the entire height direction of the cavity 113, that is, to cover the range of multiple supporting parts 18 on the inner wall, so that the wafer supported on the supporting part 18 can be sufficiently heated by thermal radiation.

[0210] Please continue reading Fig.12 Furthermore, in this embodiment, the inert gas inlet 111 includes a fifth gas inlet 1115 and a sixth gas inlet 1116 respectively disposed on opposite sides of the shell 11 , and the gas outlet 112 is disposed at the bottom of the shell 11 .

[0211] It can be understood that since the cavity 113 is initially a vacuum environment, and after the inert gas is introduced and the by-product residues on the wafer surface are evaporated into the cavity 113, the fifth gas inlet 1115 and the sixth gas inlet 1116 are respectively arranged on opposite sides of the shell 11, and the two can be arranged at the same height or symmetrically, and the gas outlet 112 is arranged at the bottom of the shell 11, so that the fifth gas inlet 1115 and the sixth gas inlet 1116 are both higher than the gas outlet 112.

[0212] In this way, after the residual by-products are evaporated into the cavity 113, they are mixed with the inert gas flowing in from both sides and flow out to the gas outlet 112 at the bottom of the cavity 113. The setting of the two gas inlets makes the gas flow smoother and faster, and the mixing with the gasified by-product residues is more complete, which speeds up the processing process of the wafer and improves the processing efficiency.

[0213] In one embodiment, only the fifth gas inlet 1115 or the sixth gas inlet 1116 may be provided to control the structural complexity of the semiconductor process device 10 .

[0214] In yet another embodiment, more gas inlets may be provided to introduce a larger amount of inert gas into the cavity 113 , and the configuration may be performed according to actual needs.

[0215] In another embodiment, the fifth gas inlet 1115 and the sixth gas inlet 1116 can be selectively opened and closed. They can be opened simultaneously when necessary to increase the introduction of inert gas and thus improve the removal rate of residual by-products. They can also be selectively opened when it is not necessary to open them simultaneously to achieve effective removal of residual by-products.

[0216] See also Fig.12 Furthermore, in the present embodiment, the mounting device 19 is further provided with a gas flow channel 191 connected with the fifth gas inlet 1115 and the sixth gas inlet 1116 , and the gas flow channel 191 is provided with a plurality of gas flow openings 1911 toward the bearing portion 18 .

[0217] Different from the previous embodiment, the nozzle 16 is not used as the ejection structure of the inert gas in this embodiment. Instead, a gas flow channel 191 is provided on the mounting device 19 along the height direction of the mounting device 19. The gas flow channel 191 can be a pipe provided in the mounting device 19, or a channel formed in the mounting device 19. The channel opening is connected to the fifth gas inlet 1115 and the sixth gas inlet 1116, such as through a pipe. The gas flow channel 191 is densely provided with a plurality of gas flow openings 1911 toward the carrier portion 18, which can guide the inert gas to the carrier portion 18 in a dense form, so as to purge the wafers on the carrier portion 18 relatively densely, thereby improving the processing effect.

[0218] In this embodiment, the heating unit 12 is arranged in parallel with the gas flow channel 191 , so that the heating unit 12 can also perform secondary heating on the inert gas flowing out of the gas flow port 1911 of the gas flow channel 191 , thereby improving the mixing effect of the inert gas and the residual gasified byproducts.

[0219] exist Fig.12In the illustrated embodiment, three heating portions 12 are provided, and two gas flow channels 191 are provided between two adjacent heating portions 12, so that the inert gas flowing out of any gas flow outlet 1911 can be fully heated, further improving the heating effect of the inert gas.

[0220] See also Fig.13 Furthermore, in this embodiment, the semiconductor coating equipment 1000 includes an equipment front-end module 200 for transferring wafers, and the semiconductor process device 10 is disposed in any suitable area within the equipment front-end module 200 .

[0221] It can be understood that when semiconductor process equipment is equipped with multiple carriers 18 to meet the processing requirements of large quantities of wafers, its volume will also increase accordingly. In the semiconductor coating equipment 1000, the volume of the equipment front-end module 200 is large enough to meet the needs of setting up large-volume semiconductor process equipment.

[0222] Therefore, by modifying the equipment front-end module 200, the semiconductor process device 10 is integrated therein. Since the equipment front-end module 200 is connected to the wafer transport platform 100, it can not only receive large quantities of wafer input from the wafer transport platform 100, but also output large quantities of wafers to the wafer transport platform 100 for separate storage after being processed to remove residual by-products. Therefore, large-scale and batch processing of wafers can be achieved in the semiconductor coating equipment 1000.

[0223] It is worth mentioning that the temperature of the inert gas and the heating temperature of the heating part 12 mentioned above can be set and adjusted according to actual needs to adapt to the actual processing process of the wafer.

[0224] In the description of this specification, the description with reference to the terms "Example 1", "Example 2", etc. means that the specific features, structures, materials or characteristics described in conjunction with the implementation or example are included in at least one implementation or example of the utility model. In this specification, the schematic representation of the above terms does not necessarily refer to the same implementation or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more implementations or examples in a suitable manner.

[0225] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A semiconductor process device installed before a process chamber of a semiconductor coating equipment, characterized in that: include: A housing having a cavity for accommodating the wafer formed therein; A heating part disposed in the cavity, the heating part being used to heat the wafer; as well as An inert gas inlet and a gas outlet are arranged on the shell and communicated with the cavity.

2. The semiconductor process device according to claim 1, characterized in that: The semiconductor process device further comprises: a gas heating assembly in communication with the inert gas inlet; and A gas extraction assembly is in communication with the gas outlet.

3. The semiconductor process device according to claim 1, characterized in that: The semiconductor process device further comprises a pedestal which is liftably arranged on the shell and located in the cavity, the heating part is arranged in the pedestal, and the wafer is carried on the pedestal.

4. The semiconductor process device according to claim 3, characterized in that: The base comprises: A base body, wherein the heating unit is disposed in the base body, and the wafer is carried on the base body; a first driving element disposed on the housing; a driving rod disposed between the first driving element and the seat body, one end of the driving rod being drivingly connected to the first driving element and the other end of the driving rod supporting the seat body; and A plurality of support rods pass through the base body, wherein one end of the support rod abuts against the wafer carried on the base body, and the other end of the support rod abuts against the shell.

5. The semiconductor process device according to claim 3, characterized in that: The inert gas inlet is arranged at the top of the shell, and the gas outlet is arranged at the bottom of the shell.

6. The semiconductor process device according to claim 5, characterized in that: The semiconductor process device further comprises: A nozzle is arranged on the top of the cavity and communicated with the inert gas inlet, and a plurality of nozzle holes communicated with the cavity are arranged on the nozzle.

7. The semiconductor process device according to claim 6, characterized in that: The gas outlet directions of the plurality of nozzles are toward the base.

8. The semiconductor process device according to claim 7, characterized in that: The projection of the gas outlet surface surrounded by the plurality of nozzle holes at the outermost periphery of the nozzle toward the base covers the base.

9. The semiconductor process device according to any one of claims 5 to 8, characterized in that: The semiconductor coating equipment comprises a wafer transfer chamber for transferring wafers to a coating process, and the semiconductor process device is arranged at one side of the wafer transfer chamber.

10. The semiconductor process device according to claim 3, characterized in that: The inert gas inlet comprises a first gas inlet arranged at the top of the shell and a second gas inlet arranged at the side of the shell, and the gas outlet is arranged at the bottom of the shell.

11. The semiconductor process device according to claim 10, characterized in that: The semiconductor process device further comprises: A first nozzle disposed at the top of the cavity and connected to the first gas inlet, wherein the first nozzle is provided with a plurality of first spray holes connected to the cavity; and A second nozzle is arranged at the side of the cavity and communicated with the second gas inlet, and a plurality of second nozzle holes communicated with the cavity are arranged on the second nozzle.

12. The semiconductor process device according to claim 11, characterized in that: The gas outlet directions of the first spray holes and the gas outlet directions of the second spray holes are both toward the base.

13. The semiconductor process device according to claim 12, characterized in that: The projection of the gas outlet surface formed by the plurality of the first nozzle holes at the outermost periphery of the first nozzle toward the base covers the base; The height of the highest point of the wafer rising and falling in the chamber is not greater than the height of the second nozzle hole at the highest point on the second nozzle head, and the lowest point is not less than the height of the second nozzle hole at the lowest point on the second nozzle head.

14. The semiconductor process device according to any one of claims 10 to 13, characterized in that: The semiconductor coating equipment comprises a wafer loading chamber for transferring wafers to a vacuum environment, and the semiconductor process device is arranged in the wafer loading chamber.

15. The semiconductor process device according to claim 1, characterized in that: The semiconductor process device further comprises a base which is arranged on the shell and located in the cavity, the heating part is arranged in the base, and the wafer is carried on the base.

16. The semiconductor process device according to claim 15, characterized in that: A lifting assembly for lifting the wafer from the base is provided on the top of the shell.

17. The semiconductor process device according to claim 16, characterized in that: The lifting assembly comprises: a second driving element disposed on the top of the housing; and A lifting claw is drivingly connected to the second driving element, and the lifting claw can be lifted and lowered in the cavity under the drive of the second driving element.

18. The semiconductor process device according to claim 17, characterized in that: The lifting claw comprises: A connecting portion drivingly connected to the second driving element; and A plurality of lifting parts are formed by extending downward and inward from the connecting part, and a plurality of notches are arranged at the edge of the base. Each of the lifting parts corresponds to each of the notches, and the lifting parts can be lifted and lowered relative to the notches.

19. The semiconductor process device according to claim 15, characterized in that: The inert gas inlet comprises a third gas inlet and a fourth gas inlet respectively arranged at two sides of the shell, and the inert gas outlet is arranged below the third gas inlet or the fourth gas inlet.

20. The semiconductor process device according to claim 19, characterized in that: The semiconductor process device further comprises: a third nozzle disposed at one side of the cavity and connected to the third gas inlet, wherein the third nozzle is provided with a plurality of third nozzle holes connected to the cavity; and A fourth nozzle is disposed at the other side of the cavity and communicated with the fourth gas inlet, wherein the fourth nozzle is provided with a plurality of fourth nozzle holes communicated with the cavity.

21. The semiconductor process device according to claim 20, characterized in that: The gas outlet directions of the plurality of third spray holes and the gas outlet directions of the plurality of fourth spray holes are both toward the base.

22. The semiconductor process device according to claim 20, characterized in that: The height of the highest point of the wafer rising and falling in the chamber is not greater than the height of the third nozzle hole at the highest point on the third nozzle head, and the lowest point is not less than the height of the third nozzle hole at the lowest point on the third nozzle head; or The height of the highest point of the wafer rising and falling in the cavity is not greater than the height of the fourth nozzle at the highest point on the fourth nozzle, and the lowest point is not less than the height of the fourth nozzle at the lowest point on the fourth nozzle.

23. The semiconductor process device according to any one of claims 15 to 22, characterized in that: There are two semiconductor process devices, and the semiconductor coating equipment includes two wafer loading chambers for transferring wafers to a vacuum environment. The two semiconductor process devices are respectively arranged in the two wafer loading chambers.

24. The semiconductor process device according to claim 1, characterized in that: A plurality of bearing parts are arranged on the inner side wall of the shell along the height direction of the inner side wall, and the wafers are carried on the bearing parts.

25. The semiconductor process device according to claim 24, characterized in that: The plurality of bearing portions are evenly distributed on two opposite inner side walls of the housing.

26. The semiconductor process device according to claim 24, characterized in that: The semiconductor process device further comprises: A mounting device is located in the cavity, the shape of the mounting device is adapted to the shape of the cavity, and the heating part is arranged on the mounting device.

27. The semiconductor process device according to claim 26, characterized in that: The inert gas inlet comprises a fifth gas inlet and a sixth gas inlet respectively arranged at two opposite sides of the shell, and the gas outlet is arranged at the bottom of the shell.

28. The semiconductor process device according to claim 27, characterized in that: The mounting device is further provided with an air flow channel communicating with the fifth gas inlet and the sixth gas inlet, and the air flow channel is provided with a plurality of air flow openings facing the bearing portion.

29. The semiconductor process device according to any one of claims 24 to 28, characterized in that: The semiconductor coating equipment comprises an equipment front-end module for conveying wafers, and the semiconductor process device is arranged in the equipment front-end module.

30. A semiconductor coating device, characterized in that: include: A semiconductor process apparatus according to any one of claims 1 to 29.

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