Slope control circuit suitable for LIN bus, LIN interface chip and micro-processing chip

By designing the slope control module and high-frequency noise suppression circuit on the LIN bus, the problem of signal slope control under high-frequency noise interference is solved, and the effect of obtaining an ideal signal in a high-frequency noise environment is achieved.

CN222260051UActive Publication Date: 2024-12-27CHENGDU GEEHY TECH CO LTD
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202420931681.2
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-04-30
Publication Date
2024-12-27
Estimated Expiration
2034-04-30

AI Technical Summary

Technical Problem

In the prior art, when high-frequency noise exists on the LIN bus, the ideal signal cannot be obtained by directly controlling the slope of the LIN signal by ordinary current mirror, resulting in overcurrent problems.

Method used

A slope control circuit including a slope control module and a high-frequency noise suppression circuit is designed. The slope current is amplified through the ramp current source and the current mirror unit group, the slope of the LIN signal is adjusted, and the high-frequency noise is filtered through the high-frequency noise suppression circuit. Some current is discharged to ground.

Benefits of technology

Under high-frequency noise interference, a relatively ideal LIN signal can still be obtained, avoiding overcurrent problems, and improving signal quality through precise slope control and noise filtering.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN222260051U_ABST
    Figure CN222260051U_ABST
Patent Text Reader

Abstract

The embodiment of the utility model provides a slope control circuit suitable for an LIN bus, an LIN interface chip and a micro-processing chip. The slope control circuit comprises a slope control module and a high-frequency noise suppression circuit. Wherein the output end of the slope control module is electrically connected with the LIN bus; the input end of the high-frequency noise suppression circuit is electrically connected with the LIN bus; the output end of the high-frequency noise suppression circuit is grounded. In the embodiment of the invention, the slope corresponding to the LIN signal can be adjusted to the preset slope by utilizing the slope control circuit; by means of the high-frequency noise suppression circuit, when high-frequency noise exists on the LIN bus, the high-frequency noise can be filtered, and part of current on the LIN bus is discharged to the ground. It can be understood that through suppression of the high-frequency noise by the high-frequency noise suppression circuit and control of the slope of the LIN bus by the slope control circuit, an ideal LIN signal can still be obtained even if the LIN signal is interfered by the high-frequency noise.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present application relates to the technical field of analog circuits, and in particular to a slope control circuit, a LIN interface chip and a microprocessor chip suitable for a LIN bus. Background Art

[0002] LIN bus is a simple, low-cost serial communication, which is widely used in our daily life, such as cars, washing machines, refrigerators, and printers. Usually, LIN bus transmits information between devices through LIN signal (trapezoidal wave signal). Therefore, before applying LIN bus to transmit information between devices, it is necessary to obtain an ideal LIN signal.

[0003] In the prior art, a common current mirror is usually used to directly control the slope corresponding to the LIN signal on the LIN bus, thereby obtaining an ideal LIN signal.

[0004] However, when high-frequency noise exists on the LIN bus, overcurrent problems may occur on the LIN bus due to the influence of the high-frequency noise. Using an ordinary current mirror to directly control the slope corresponding to the LIN signal on the LIN bus cannot obtain an ideal LIN signal.

[0005] It should be pointed out that the information disclosed in the background technology section of this application is only intended to deepen the understanding of the general background technology of this application, and should not be regarded as an admission or suggestion in any form that the information constitutes prior art already known to those skilled in the art. Utility Model Content

[0006] In view of this, the present application provides a slope control circuit, a LIN interface chip and a microprocessor chip suitable for a LIN bus, so as to solve the problem in the prior art that when there is high-frequency noise on the LIN bus, an ordinary current mirror is used to directly control the slope corresponding to the LIN signal on the LIN bus, and the ideal LIN signal cannot be obtained due to the interference of the high-frequency noise.

[0007] In a first aspect, an embodiment of the present application provides a slope control circuit applicable to a LIN bus, comprising:

[0008] A slope control module, wherein an output end of the slope control module is electrically connected to a LIN bus, and the slope control module is used to adjust a slope corresponding to a LIN signal on the LIN bus to a preset slope;

[0009] A high-frequency noise suppression circuit, wherein the input end of the high-frequency noise suppression circuit is electrically connected to the LIN bus, the output end of the high-frequency noise suppression circuit is grounded, and the high-frequency noise suppression circuit is used to filter the high-frequency noise when there is high-frequency noise on the LIN bus, and to turn on a current discharge path, so as to discharge part of the current on the LIN bus to the ground through the current discharge path.

[0010] In the embodiment of the present application, the slope control circuit applicable to the LIN bus includes a slope control circuit and a high-frequency noise suppression circuit. The slope control circuit can be used to adjust the slope corresponding to the LIN signal to a preset slope; the high-frequency noise suppression circuit can be used to filter the high-frequency noise when there is high-frequency noise on the LIN bus, and discharge part of the current on the LIN bus to the ground. It can be understood that after the high-frequency noise suppression circuit suppresses the high-frequency noise and the slope control circuit controls the slope of the LIN bus, even when the LIN signal is interfered by high-frequency noise, a relatively ideal LIN signal can still be obtained.

[0011] In a possible implementation, the slope control module includes:

[0012] A ramp current source, the ramp current source is used to output a ramp current with a preset slope;

[0013] A current mirror unit group, wherein the input end of the current mirror unit group is electrically connected to the output end of the ramp current source, the output end of the current mirror unit group is electrically connected to the LIN bus, the current mirror unit group is used to amplify the ramp current, and output a control signal at the output end of the current mirror unit group, the control signal is used to adjust the slope corresponding to the LIN signal on the LIN bus to a preset slope.

[0014] Since the current generated by the ramp current source is more accurate, and the circuit structure of using the current mirror circuit to amplify the corresponding ramp current is relatively simple, in the embodiment of the present application, the slope corresponding to the LIN signal on the LIN bus is controlled by using the ramp current source and the current mirror unit group, so that the slope corresponding to the LIN signal on the LIN bus can be controlled more accurately at a low cost.

[0015] In a possible implementation, the current mirror unit group includes a plurality of current mirror units;

[0016] The input end of the i-th current mirror unit is electrically connected to the output end of the i-1-th current mirror unit, and the i-th current mirror unit is used to receive the i-1-th current at the input end of the i-th current mirror unit and output the i-th current at the output end of the i-th current mirror unit;

[0017] When the i-th current mirror unit is the first current mirror unit, the input end of the i-th current mirror unit is electrically connected to the output end of the ramp current source, wherein the input end of the i-th current mirror unit is the input end of the current mirror unit group;

[0018] When the i-th current mirror unit is the last current mirror unit, the output end of the i-th current mirror unit is electrically connected to the LIN bus, wherein the output end of the i-th current mirror unit is the output end of the current mirror unit group;

[0019] Wherein i>1, and the current value of the i-th current is greater than the current value of the i-1-th current.

[0020] In the embodiment of the present application, by superimposing multiple current mirrors, the slope current is amplified without causing deformation of the slope current, and ultimately the slope corresponding to the LIN signal on the LIN bus is determined to be more accurate.

[0021] In one possible implementation,

[0022] The i-1th current mirror unit includes: a first A-type transistor, a source of the first A-type transistor is grounded, a drain of the first A-type transistor is electrically connected to a gate of the first A-type transistor, and the drain of the first A-type transistor is an input terminal of the i-1th current mirror unit; a second A-type transistor, a gate of the second A-type transistor is electrically connected to a gate of the first A-type transistor, a source of the second A-type transistor is grounded, and the drain of the second A-type transistor is an output terminal of the i-1th current mirror unit;

[0023] The i-th current mirror unit includes: a first B-type transistor, the source of the first B-type transistor is electrically connected to a voltage source, the drain of the first B-type transistor is electrically connected to a gate of the first B-type transistor, and the drain of the first B-type transistor is the input terminal of the i-th current mirror unit; a second B-type transistor, the gate of the second B-type transistor is electrically connected to the gate of the first B-type transistor, the source of the second B-type transistor is electrically connected to the voltage source, and the drain of the second B-type transistor is the output terminal of the i-th current mirror unit.

[0024] In the embodiment of the present application, the types of two adjacent current mirrors are designed to be different, which is beneficial to the amplification and transmission of the ramp current, thereby making the determined control signal more accurate, and ultimately making the slope corresponding to the LIN signal on the determined LIN bus more accurate.

[0025] In a possible implementation, when i is 3, the current mirror unit group includes:

[0026] a first transistor, wherein a drain of the first transistor is electrically connected to an output terminal of the ramp current source, a drain of the first transistor is electrically connected to a gate of the first transistor, a source of the first transistor is grounded, and the drain of the first transistor is an input terminal of the current mirror unit group;

[0027] a second transistor, wherein a gate of the second transistor is electrically connected to the gate of the first transistor, and a source of the second transistor is grounded;

[0028] a third transistor, wherein a drain of the third transistor is electrically connected to a drain of the second transistor, a drain of the third transistor is electrically connected to a gate of the third transistor, and a source of the third transistor is electrically connected to a voltage source;

[0029] a fourth transistor, wherein a gate of the fourth transistor is electrically connected to the gate of the third transistor, and a source of the fourth transistor is electrically connected to the voltage source;

[0030] a fifth transistor, wherein a drain of the fifth transistor is electrically connected to the drain of the fourth transistor, a gate of the fifth transistor is electrically connected to the drain of the fifth transistor, and a source of the fifth transistor is grounded;

[0031] A sixth transistor, wherein the source of the sixth transistor is grounded, the gate of the sixth transistor is electrically connected to the gate of the fifth transistor, the drain of the sixth transistor is electrically connected to the LIN bus, wherein the drain of the sixth transistor is the output end of the current mirror unit group.

[0032] In the embodiment of the present application, a three-layer current mirror is designed to reduce unnecessary circuit connections while ensuring that the generated control signal can accurately control the slope corresponding to the LIN signal on the LIN bus, thereby saving costs and avoiding redundancy in the circuit structure.

[0033] In a possible implementation, part or all of the current mirror units include:

[0034] The first filtering circuit is used for filtering noise interference when noise interference exists on the corresponding current mirror unit.

[0035] In an embodiment of the present application, by setting a first filtering circuit in part or all of the current mirror units, when the voltage signal provided by the ramp power supply has noise interference, the voltage signal can be filtered, and ultimately the slope corresponding to the LIN signal on the determined LIN bus can be more accurate.

[0036] In a possible implementation, the last current mirror unit includes:

[0037] A 2i-1th transistor, wherein a source of the 2i-1th transistor is grounded, and a drain of the 2i-1th transistor is an input terminal of the last current mirror unit;

[0038] a 2i th transistor, wherein a source of the 2i th transistor is grounded, and a drain of the 2i th transistor is an output terminal of the last current mirror unit;

[0039] A first filter circuit, wherein the input end of the first filter circuit is electrically connected to the gate of the 2i-1th transistor, the output end of the first filter circuit is electrically connected to the gate of the 2ith transistor, and the first filter circuit is used to filter the noise interference when there is noise interference on the last current mirror unit.

[0040] In the embodiment of the present application, by setting the first filtering circuit in the last current mirror unit, there is no noise interference in the final control signal. While ensuring that the slope corresponding to the LIN signal on the LIN bus is relatively accurate, unnecessary circuit connections are reduced, which saves costs and avoids redundancy in the circuit structure.

[0041] In a possible implementation, the first filtering circuit includes:

[0042] a first resistor, wherein a first end of the first resistor is electrically connected to the gate of the 2i-1th transistor, and a second end of the first resistor is electrically connected to the gate of the 2ith transistor, wherein the first end of the first resistor is an input end of the first filter circuit, and the second end of the first resistor is an output end of the first filter circuit;

[0043] A first capacitor, wherein a first end of the first capacitor is electrically connected to a second end of the first resistor, and a second end of the first capacitor is grounded.

[0044] In an embodiment of the present application, when there is noise interference in the voltage signal provided by the ramp power supply, the voltage will flow through the first resistor and then be conducted to the ground through the first capacitor, thereby eliminating the noise interference in the control signal and ultimately making the slope corresponding to the LIN signal on the determined LIN bus more accurate.

[0045] In a possible implementation, the high-frequency noise suppression circuit includes:

[0046] a seventh transistor, wherein a source of the seventh transistor is grounded, a drain of the seventh transistor is electrically connected to the LIN bus, and a source of the seventh transistor is grounded;

[0047] A second filter circuit, wherein an input end of the second filter circuit is electrically connected to the LIN bus, an output end of the second filter circuit is electrically connected to the gate of the seventh transistor, and the second filter circuit is used for conducting the high-frequency noise when there is high-frequency noise on the LIN bus, thereby conducting the source and drain of the seventh transistor, and discharging part of the current on the LIN bus to the ground through the source and drain of the seventh transistor.

[0048] In an embodiment of the present application, by electrically connecting the gate of the seventh transistor to the output end of the second filtering circuit, when high-frequency noise exists, the seventh transistor can be turned on through the second filtering circuit, thereby discharging part of the current on the LIN bus to the ground, thereby preventing the LIN bus from overcurrent.

[0049] In a possible implementation, the high-frequency noise suppression circuit includes:

[0050] a plurality of the seventh transistors, wherein the sources of the plurality of the seventh transistors are electrically connected, the drains of the plurality of the seventh transistors are electrically connected, and the gates of the plurality of the seventh transistors are electrically connected;

[0051] The number of the seventh transistors is positively correlated with the suppression effect on high-frequency noise.

[0052] In the embodiment of the present application, the high-frequency noise suppression capability can be adjusted by adjusting the number of the seventh transistor in the high-frequency noise suppression circuit, thereby effectively preventing the LIN bus from overcurrent.

[0053] In a possible implementation, the second filtering circuit includes:

[0054] a second capacitor, a first end of the second capacitor being electrically connected to the LIN bus;

[0055] a second resistor, wherein a first end of the second resistor is electrically connected to a second end of the second capacitor, and a second end of the second resistor is electrically connected to a gate of the 2i th transistor;

[0056] A third resistor, wherein a first end of the third resistor is electrically connected to a second end of the second resistor, and a second end of the third resistor is grounded.

[0057] In an embodiment of the present application, when high-frequency noise exists, the high-frequency noise will pass through the second capacitor, and then after flowing through the second resistor and the third resistor, a corresponding voltage divider will be formed at the first end of the third resistor, so that the source and drain of the seventh transistor are turned on, and finally part of the current on the LIN bus is discharged to the ground through the source and drain of the seventh transistor.

[0058] In a second aspect, an embodiment of the present application provides a LIN interface chip, including:

[0059] A slope control circuit for a LIN bus according to any one of the first aspects.

[0060] In a third aspect, an embodiment of the present application provides a microprocessor chip, including:

[0061] A slope control circuit for a LIN bus according to any one of the first aspects.

[0062] It can be understood that the LIN interface chip provided in the second aspect includes the slope control circuit for executing the LIN bus provided in the present application, and the microprocessor chip provided in the third aspect includes the LIN interface chip provided in the present application. Therefore, the beneficial effects that can be achieved can refer to the beneficial effects of the slope control circuit of the LIN bus in the first aspect, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0063] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0064] Figure 1 A schematic diagram of an application scenario provided for an embodiment of the present application.

[0065] Figure 2 A schematic diagram of a trapezoidal wave provided in an embodiment of the present application.

[0066] Figure 3 A slope control circuit suitable for a LIN bus is provided in an embodiment of the present application.

[0067] Figure 4 A schematic diagram of the structure of a slope control module provided in an embodiment of the present application.

[0068] Figure 5 A schematic diagram of the structure of a current mirror unit group provided in an embodiment of the present application.

[0069] Figure 6 A schematic diagram of the structure of a high-frequency noise suppression circuit provided in an embodiment of the present application.

[0070] Figure 7 A schematic diagram of another high-frequency noise suppression circuit provided in an embodiment of the present application

[0071] Figure 8 Another slope control circuit suitable for a LIN bus is provided in an embodiment of the present application. DETAILED DESCRIPTION

[0072] In order to better understand the technical solution of the present application, the embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0073] It should be clear that the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.

[0074] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the present application. The singular forms "a", "said" and "the" used in the embodiments of the present application and the appended claims are also intended to include plural forms, unless the context clearly indicates other meanings.

[0075] It should be understood that the term "and / or" used in this article is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.

[0076] To facilitate understanding, a specific application scenario is first exemplified below.

[0077] See also Figure 1 , is a schematic diagram of an application scenario provided by an embodiment of the present application. Figure 1 As shown, the application scenario includes: a printer 100. The printer 100 includes: a LIN main control unit 101, a paper feed motor 102, an indicator light 103, a heating roller 104 and a LIN bus 105. Among them, the LIN main control unit 101, the paper feed motor 102, the indicator light 103 and the heating roller 104 are all connected to the LIN bus 105. It can be understood that the LIN main control unit 101, the paper feed motor 102, the indicator light 103 and the heating roller 104 can transmit information between each other through the LIN bus 105 based on the LIN communication protocol.

[0078] Specifically, when information is transmitted between devices based on the LIN communication protocol, the LIN signal transmitted on the LIN bus is usually a trapezoidal wave. It can be understood that when different information needs to be transmitted, different trapezoidal wave signals are output accordingly. For ease of understanding, see Figure 2 , is a schematic diagram of a trapezoidal wave provided in an embodiment of the present application. Figure 2As shown, the figure shows a trapezoidal wave 201. At the same time, the figure also shows two dotted lines, which represent 60% and 40% of the rectangular wave voltage value from top to bottom respectively. Among them, the upper dotted line and the trapezoidal wave 201 constitute a recessive area 202, and the time period t1 corresponding to the recessive area 202 is used to represent the first level information, such as 1, etc.; the lower dotted line and the trapezoidal wave 201 constitute an explicit area 203, and the time period t2 corresponding to the linear area 203 is used to represent the second level information, such as 0, etc. Of course, the two dotted lines in the figure can also represent 80% and 20% of the rectangular wave voltage value from top to bottom, etc., and this application does not make specific restrictions on this.

[0079] in addition, Figure 1 The printer 100 shown in the figure is only an exemplary description, and the application scenarios of the LIN bus may also include vehicles, etc., and this application does not make specific restrictions on this. Figure 1 The LIN bus slaves shown in the figure: the paper feeding motor 102, the indicator light 103 and the heating roller 104 are only an exemplary description, and the present application does not impose any specific limitation on this.

[0080] Since the LIN bus transmits information between devices through the LIN signal (trapezoidal wave signal), an ideal LIN signal needs to be obtained before the LIN bus is used to transmit information between devices. In the related art, a LIN signal slope control circuit constructed by an ordinary current mirror is usually used to directly control the slope corresponding to the LIN signal on the LIN bus, thereby obtaining a LIN signal.

[0081] However, when there is high-frequency noise on the LIN bus, due to the influence of high-frequency noise, the LIN bus may also have an overcurrent problem. Using an ordinary current mirror to directly control the slope corresponding to the LIN signal on the LIN bus cannot obtain an ideal LIN signal. It is understandable that when there is high-frequency noise on the LIN bus, the LIN bus is often accompanied by an overcurrent signal.

[0082] In view of the above problems, in an embodiment of the present application, a slope control circuit applicable to the LIN bus includes a slope control circuit and a high-frequency noise suppression circuit. The slope control circuit can be used to adjust the slope corresponding to the LIN signal to a preset slope; the high-frequency noise suppression circuit can be used to filter the high-frequency noise when there is high-frequency noise on the LIN bus, and discharge part of the current on the LIN bus to the ground. It can be understood that the high-frequency noise suppression circuit suppresses the high-frequency noise and the slope control circuit controls the slope of the LIN bus, so that even when the LIN signal is interfered by high-frequency noise, a relatively ideal LIN signal can still be obtained. Specifically, a detailed description is given below in conjunction with the accompanying drawings and specific embodiments.

[0083] See also Figure 3, is a slope control circuit applicable to a LIN bus provided in an embodiment of the present application. The slope control circuit can be applied to Figure 1 In the application scenario shown, Figure 3 As shown in the figure, a LIN bus 301, a slope control module 302 and a high-frequency noise suppression circuit 303 are shown. Figure 3 As shown, the connection relationship between the modules is as follows: the slope control module 302 is electrically connected to the LIN bus 301 ; the high-frequency noise suppression circuit 303 is electrically connected to the LIN bus 301 .

[0084] It should be pointed out that in order to more clearly show the connection relationship and related functions of the slope control circuit applicable to the LIN bus, Figure 3 LIN bus 301 is also shown in FIG. It can be understood that Figure 3 The LIN bus shown in the figure should not be used as a specific limitation of this application. Those skilled in the art can also apply the slope control circuit to other signal transmission devices according to actual needs, and this application does not make specific limitations on this.

[0085] For ease of understanding, the following will Figure 3 The slope control module 302 and the high-frequency noise suppression circuit 303 shown in FIG. 3 are described one by one.

[0086] In the embodiments of the present application, Figure 3 The slope control module shown in is used to adjust the slope corresponding to the LIN signal on the LIN bus to a preset slope. It can be understood that the slope control module outputs a corresponding control signal according to the preset slope, and the control signal can adjust the slope corresponding to the LIN signal on the LIN bus to the preset slope.

[0087] In practical applications, in order to ensure that the LIN signal on the LIN bus is more accurate, a slope current source and a current mirror may be used to determine the slope corresponding to the LIN signal. Specifically, the following is a detailed description in conjunction with the accompanying drawings and specific embodiments.

[0088] In one possible implementation, see Figure 4 , is a schematic diagram of the structure of a slope control module provided in an embodiment of the present application. As shown in the figure, a slope current source 3021 and a current mirror unit group 3022 are shown. As shown in the figure, the output end of the slope current source is electrically connected to the input end of the current mirror unit group; the output end of the current mirror unit group is electrically connected to the LIN bus. It can be understood that the output end of the current mirror unit group is the output end of the slope control module.

[0089] It should be pointed out that in order to prevent the circuit connection relationship from being too complicated, some circuits, such as the LIN bus, are not shown in the figure.

[0090] In an embodiment of the present application, a ramp current source is used to output a ramp current with a preset slope; the current mirror unit group is used to amplify the ramp current and output a control signal at the output end of the current mirror unit group, wherein the control signal is used to adjust the slope corresponding to the LIN signal on the LIN bus to a preset slope.

[0091] Since the current generated by the ramp current source is more accurate, and the circuit structure of using the current mirror circuit to amplify the corresponding ramp current is relatively simple, in the embodiment of the present application, the slope corresponding to the LIN signal on the LIN bus is controlled by using the ramp current source and the current mirror unit group, so that the slope corresponding to the LIN signal on the LIN bus can be controlled more accurately at a low cost.

[0092] Of course, those skilled in the art may also design other circuits to determine the slope corresponding to the LIN signal according to actual needs, and this application does not impose any specific limitation on this.

[0093] In a possible implementation, the current mirror unit group includes a plurality of current mirror units. Specifically, the connection relationship of the plurality of current mirror units is: the input end of the ith current mirror unit is electrically connected to the output end of the i-1th current mirror unit; when the ith current mirror unit is the first current mirror unit, the input end of the ith current mirror unit is electrically connected to the output end of the ramp current source; when the ith current mirror unit is the last current mirror unit, the output end of the ith current mirror unit is electrically connected to the LIN bus.

[0094] In the embodiment of the present application, the i-th current mirror unit is used to receive the i-1th current at the input end of the i-th current mirror unit, and output the i-th current at the output end of the i-th current mirror unit. When the i-th current mirror unit is the first current mirror unit, the input end of the i-th current mirror unit is the input end of the current mirror unit group; when the i-th current mirror unit is the last current mirror unit, the output end of the i-th current mirror unit is the output end of the current mirror unit group. It can be understood that the current value of the i-th current is greater than the current value of the i-1th current.

[0095] Exemplarily, when the current mirror unit group includes three current mirror units, the second current mirror unit is used to receive the first current at the input end of the second current mirror unit and output the second current at the output end of the second current mirror unit. The first current mirror unit is used to output the first current. The third current mirror unit is used to receive the second current and output the third current. Wherein, the third current is a control signal. It can be understood that the current value of the third current is greater than the current value of the second current, which is greater than the current value of the first current, and the waveforms corresponding to the first current, the second current and the third current are the same.

[0096] Of course, those skilled in the art have more practical needs, and the current mirror unit group can be designed to have only one current mirror unit, and this application does not make any specific limitation on this.

[0097] In the embodiment of the present application, by superimposing multiple current mirrors, the slope current is amplified without causing deformation of the slope current, and ultimately the slope corresponding to the LIN signal on the LIN bus is determined to be more accurate.

[0098] In a possible implementation, the i-1th current mirror unit includes: a first A-type transistor, the source of the first A-type transistor is grounded, the drain of the first A-type transistor is electrically connected to the gate of the first A-type transistor, and the drain of the first A-type transistor is the input terminal of the i-1th current mirror unit; a second A-type transistor, the gate of the second A-type transistor is electrically connected to the gate of the first A-type transistor, the source of the second A-type transistor is grounded, and the drain of the second A-type transistor is the output terminal of the i-1th current mirror unit. The i-th current mirror unit includes: a first B-type transistor, the source of the first B-type transistor is electrically connected to a voltage source, the drain of the first B-type transistor is electrically connected to the gate of the first B-type transistor, and the drain of the first B-type transistor is the input terminal of the i-th current mirror unit; a second B-type transistor, the gate of the second B-type transistor is electrically connected to the gate of the first B-type transistor, the source of the second B-type transistor is electrically connected to the voltage source, and the drain of the second B-type transistor is the output terminal of the i-th current mirror unit.

[0099] In a possible implementation, the first A-type transistor and the second A-type transistor described above are composed of PMOS transistors; the first B-type transistor and the second B-type transistor are composed of NMOS transistors. Of course, those skilled in the art may, according to actual needs, use NMOS transistors for the first A-type transistor and the second A-type transistor; and use PMOS transistors for the first B-type transistor and the second B-type transistor. It is understandable that the types of the two adjacent current mirrors are different.

[0100] In the embodiment of the present application, the types of two adjacent current mirrors are designed to be different, which is beneficial to the amplification and transmission of the ramp current, thereby making the determined control signal more accurate, and ultimately making the slope corresponding to the LIN signal on the determined LIN bus more accurate.

[0101] Specifically, in the embodiment of the present application, a structural schematic diagram of a current mirror unit group is also provided. Figure 5, is a schematic diagram of the structure of a current mirror unit group provided by an embodiment of the present application. As shown in the figure, the figure shows a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, a fifth transistor M5 and a sixth transistor M6. Among them, the drain of the first transistor is electrically connected to the output end of the ramp current source; the drain of the first transistor is electrically connected to the gate of the first transistor; the source of the first transistor is grounded; the gate of the second transistor is electrically connected to the gate of the first transistor; the source of the second transistor is grounded; the gate of the fourth transistor is electrically connected to the gate of the third transistor; the source of the third transistor is electrically connected to the voltage source; the source of the fourth transistor is electrically connected to the voltage source; the drain of the third transistor is electrically connected to the drain of the second transistor; the drain of the third transistor is electrically connected to the gate of the third transistor; the drain of the fifth transistor is electrically connected to the drain of the fourth transistor; the gate of the fifth transistor is electrically connected to the drain of the fifth transistor; the source of the fifth transistor is grounded; the source of the sixth transistor is grounded; the gate of the sixth transistor is electrically connected to the gate of the fifth transistor; the drain of the sixth transistor is electrically connected to the LIN bus. It should be pointed out that in order to more clearly demonstrate the circuit structure of the current mirror unit group, some related circuits are not shown in the figure.

[0102] It can be understood that the drain of the first transistor is the input end of the current mirror unit group; the drain of the sixth transistor is the output end of the current mirror unit group.

[0103] Specifically, when the drain of the first transistor M1 receives the ramp current, the current mirror formed by the first transistor and the second transistor proportionally amplifies the ramp current and outputs the corresponding first current; when the drain of the third transistor receives the first current, the current mirror formed by the third transistor and the fourth transistor proportionally amplifies the first current and outputs the corresponding second current; when the drain of the fifth transistor receives the second current, the current mirror formed by the fifth transistor and the sixth transistor proportionally amplifies the second current and outputs the corresponding third current. The third current is the control signal.

[0104] In the embodiment of the present application, a three-layer current mirror is designed to reduce unnecessary circuit connections while ensuring that the generated control signal can accurately control the slope corresponding to the LIN signal on the LIN bus, thereby saving costs and avoiding redundancy in the circuit structure.

[0105] In practical applications, due to the noise interference on the current mirror unit, the final determined control signal may have errors, so it is necessary to filter the noise interference on the current mirror unit. Specifically, it is described in detail below in conjunction with specific embodiments.

[0106] In a possible implementation, some or all of the current mirror units include: a first filtering circuit. It can be understood that the first filtering circuit is used to filter the noise interference when there is noise interference on the corresponding current mirror unit. Of course, those skilled in the art may not set the first filtering circuit according to actual needs, and this application does not make specific restrictions on this.

[0107] In an embodiment of the present application, by setting a first filtering circuit in part or all of the current mirror units, when noise interference exists on the corresponding current mirror unit, the noise interference can be filtered, and ultimately the slope corresponding to the LIN signal on the determined LIN bus is more accurate.

[0108] In a possible implementation, the last current mirror unit includes: a 2i-1 transistor, a 2i transistor, and a first filter circuit. The source of the 2i-1 transistor is grounded; the source of the 2i transistor is grounded; the input of the first filter circuit is electrically connected to the gate of the 2i-1 transistor; and the output of the first filter circuit is electrically connected to the gate of the 2i transistor. It can be understood that the drain of the 2i-1 transistor is the input of the last current mirror unit; and the drain of the 2i transistor is the output of the last current mirror unit.

[0109] Specifically, the first filtering circuit is used to filter the noise interference when there is noise interference on the last current mirror unit.

[0110] It can be understood that in the embodiment of the present application, by setting the first filtering circuit in the last current mirror unit, there is no noise interference in the final control signal, while ensuring that the slope corresponding to the LIN signal on the LIN bus is relatively accurate, unnecessary circuit connections are reduced, which saves costs and avoids redundancy in the circuit structure.

[0111] In a possible implementation, the "first filter circuit" described above includes: a first resistor and a first capacitor. The first end of the first resistor is electrically connected to the gate of the 2i-1 transistor; the second end of the first resistor is electrically connected to the gate of the 2i transistor; the first end of the first capacitor is electrically connected to the second end of the first resistor; and the second end of the first capacitor is grounded. It can be understood that the first end of the first resistor is the input end of the first filter circuit, and the second end of the first resistor is the output end of the first filter circuit.

[0112] Specifically, when interference noise is generated on the current mirror, the first filtering circuit is used to filter the interference noise on the last current mirror, thereby making the determined control signal more accurate.

[0113] In the embodiments of the present application, Figure 3The high-frequency noise suppression circuit shown in is used to filter the high-frequency noise when there is high-frequency noise on the LIN bus, and to conduct the current discharge path, so that part of the current on the LIN bus is discharged to the ground through the current discharge path. It can be understood that when there is high-frequency noise on the LIN bus, the current on the LIN bus will be too large at the same time. Therefore, the high-frequency noise suppression circuit filters the high-frequency noise and conducts the current discharge path, so that part of the current on the LIN bus is discharged to the ground through the current discharge path.

[0114] In practical applications, in order to quickly restore the current on the LIN bus to a normal value, a transistor can be used as a switch to discharge part of the current on the LIN bus to the ground. Specifically, the following is a detailed description in conjunction with the accompanying drawings and specific embodiments.

[0115] In one possible implementation, see Figure 6 , is a schematic diagram of the structure of a high-frequency noise suppression circuit provided in an embodiment of the present application. As shown in the figure, the seventh transistor M7 and the second filter circuit 3031 are shown. As shown in the figure, the source of the seventh transistor is grounded; the drain of the seventh transistor is electrically connected to the LIN bus; the input end of the second filter circuit is electrically connected to the LIN bus; and the output end of the second filter circuit is electrically connected to the gate of the seventh transistor. It can be understood that the seventh transistor is the current discharge path described above.

[0116] It should be pointed out that in order to prevent the circuit connection relationship from being too complicated, some circuits, such as the LIN bus, are not shown in the figure.

[0117] In one possible implementation, the second filtering circuit is used to conduct high-frequency noise when there is high-frequency noise on the LIN bus, thereby conducting the source and drain of the seventh transistor, and discharging part of the current on the LIN bus to the ground through the source and drain of the seventh transistor.

[0118] In a possible implementation, the filtering frequency of the second filtering circuit described above can be adjusted, so that the high-frequency noise suppression circuit can be turned on for high-frequency noise in different frequency bands. This application does not impose any specific restrictions on this.

[0119] In a possible implementation, there may be a plurality of the seventh transistors. The sources of the plurality of seventh transistors are electrically connected to each other, the drains of the plurality of seventh transistors are electrically connected to each other, and the gates of the plurality of seventh transistors are electrically connected to each other. When the number of the seventh transistors of the high-frequency noise suppression circuit is greater, more current on the LIN bus can be discharged to the ground. It can be understood that the number of the seventh transistors is positively correlated with the suppression effect on high-frequency noise.

[0120] In an embodiment of the present application, by electrically connecting the gate of the seventh transistor to the output end of the second filtering circuit, when high-frequency noise exists, the seventh transistor can be turned on through the second filtering circuit, thereby discharging part of the current on the LIN bus to the ground, thereby preventing the LIN bus from overcurrent.

[0121] In actual use, the present application also provides a structural schematic diagram of another high-frequency noise suppression circuit. Specifically, see Figure 7 , is a schematic diagram of the structure of another high-frequency noise suppression circuit provided in an embodiment of the present application. Figure 7 As shown, the second filtering circuit includes: a second capacitor C2, a second resistor R2 and a third resistor R3. Combined with the seventh transistor shown in the figure, the connection relationship of the circuit is: the first end of the second capacitor is electrically connected to the LIN bus; the first end of the second resistor is electrically connected to the second end of the second capacitor; the second end of the second resistor is electrically connected to the gate of the seventh transistor; the first end of the third resistor is electrically connected to the second end of the second resistor; the second end of the third resistor is grounded; the source of the seventh transistor is grounded; the drain of the seventh transistor is electrically connected to the LIN bus. It should be pointed out that in order to more clearly show the circuit structure of the high-frequency noise suppression circuit, some related circuits are not shown in the figure.

[0122] Specifically, when there is high-frequency noise on the LIN bus, the high-frequency noise will be conducted to the ground through the second capacitor, the second resistor and the third resistor. At the same time, a corresponding voltage division will be generated at the first end of the third resistor, so that the source and the drain of the seventh transistor are conducted, and finally part of the current on the LIN bus is discharged to the ground through the source and the drain of the seventh transistor.

[0123] In the embodiment of the present application, the slope control circuit applicable to the LIN bus includes a slope control circuit and a high-frequency noise suppression circuit. The slope control circuit can be used to adjust the slope corresponding to the LIN signal to a preset slope; the high-frequency noise suppression circuit can be used to conduct the high-frequency noise for filtering when there is high-frequency noise on the LIN bus, and discharge part of the current on the LIN bus to the ground. It can be understood that after the high-frequency noise suppression circuit suppresses the high-frequency noise and the slope control circuit controls the slope of the LIN bus, even when the LIN signal is interfered by the high-frequency noise, a relatively ideal LIN signal can still be obtained.

[0124] For easier understanding, see Figure 8 , is another slope control circuit applicable to the LIN bus provided by the embodiment of the present application. As shown in the figure, Figure 8 is Figure 3Based on the above, a specific slope control circuit of the LIN bus is determined. As shown in the figure, the LIN bus 301, the slope current source 3021, the current mirror unit group 3022 and the high-frequency noise suppression circuit 303 are shown. The specific functions of the LIN bus 301, the slope current source 3021, the current mirror unit group 3022 and the high-frequency noise suppression circuit 303 can refer to the description of the embodiment described above. For the sake of simplicity, this application will not be repeated here.

[0125] Specifically, in the embodiment of the present application, the slope control circuit of the LIN bus specifically includes: a LIN bus 301, a slope current source 3021, a current mirror unit group 3022 and a high-frequency noise suppression circuit 303. The slope current source 3021 includes: a slope current source I. The current mirror unit group 3022 includes: a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, a fifth transistor M5, a sixth transistor M6, a first resistor R1 and a first capacitor C1. The high-frequency noise suppression circuit 303 includes: a seventh transistor M7, a second capacitor C2, a second resistor R2 and a third resistor R3. Specifically, the connection relationship of the slope control circuit of the LIN bus is: the input end of the slope current source is electrically connected to the voltage source; the output end of the slope current source is electrically connected to the drain of the first transistor; the drain of the first transistor is electrically connected to the gate of the first transistor; the source of the first transistor is grounded; the gate of the second transistor is electrically connected to the gate of the first transistor; the source of the second transistor is grounded; the gate of the fourth transistor is electrically connected to the gate of the third transistor; the source of the third transistor is electrically connected to the voltage source; the source of the fourth transistor is electrically connected to the voltage source; the drain of the third transistor is electrically connected to the drain of the second transistor; the drain of the third transistor is electrically connected to the gate of the third transistor; the drain of the fifth transistor is electrically connected to the drain of the fourth transistor; the gate of the fifth transistor The drain of the fifth transistor is electrically connected; the source of the fifth transistor is grounded; the source of the sixth transistor is grounded; the first end of the first resistor is electrically connected to the gate of the fifth transistor, and the second end of the first resistor is electrically connected to the gate of the sixth transistor; the first end of the first capacitor is connected to the second end of the first resistor, and the second end of the first capacitor is grounded; the drain of the sixth transistor is electrically connected to the LIN bus; the first end of the second capacitor is electrically connected to the LIN bus; the second end of the second capacitor is electrically connected to the first end of the second resistor; the second end of the second resistor is electrically connected to the first end of the third resistor; the second end of the third resistor is grounded; the gate of the seventh transistor is electrically connected to the first end of the third resistor; the drain of the seventh transistor is electrically connected to the LIN bus; the source of the seventh transistor is grounded.

[0126] Understandably, about Figure 8 The specific implementation method of the related functions of the circuit shown can be referred to the above description. For the sake of brevity, this application will not go into details here.

[0127] It should be pointed out that Figure 8 The structural diagram of the slope control circuit applicable to the LIN bus shown is only an exemplary description. Those skilled in the art may also design other circuits according to actual needs, and this application does not impose any specific limitation on this.

[0128] Corresponding to the above embodiment, the embodiment of the present application also provides a LIN interface chip.

[0129] In an embodiment of the present application, the LIN interface chip includes the slope control circuit of the LIN bus described above. The specific functions and specific implementation methods of the slope control circuit of the LIN bus refer to the specific embodiments described above. For the sake of brevity, this application will not elaborate on this.

[0130] Corresponding to the above-mentioned embodiment, the embodiment of the present application further provides a microprocessor chip. The microprocessor chip may be, for example, an MCU, a DSP, an MPU, a micro CPU, or a micro central control chip or a system-on-chip chip that can process digital signals, analog signals, or perform signal control functions, instruction processing, and calculation functions.

[0131] In an embodiment of the present application, the microprocessor chip includes the slope control circuit of the LIN bus described above. The specific functions and specific implementation methods of the slope control circuit of the LIN bus refer to the specific embodiments described above. For the sake of brevity, this application will not elaborate on this.

[0132] In the embodiments of the present application, "at least one" refers to one or more, and "plurality" refers to two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent the existence of A alone, the existence of A and B at the same time, and the existence of B alone. Among them, A and B can be singular or plural. The character " / " generally indicates that the previous and subsequent associated objects are in an "or" relationship. "At least one of the following" and similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b and c can be represented by: a, b, c, ab, ac, bc, or abc, where a, b, c can be single or multiple.

[0133] Those of ordinary skill in the art will appreciate that the various units and algorithm steps described in the embodiments disclosed herein can be implemented in a combination of electronic hardware, computer software, and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0134] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0135] In several embodiments provided in the present application, any function can be stored in a computer-readable storage medium if it is implemented in the form of a software functional unit and sold or used as an independent product. Based on this understanding, the technical solution of the present application can be essentially or partly embodied in the form of a software product that contributes to the prior art. The computer software product is stored in a storage medium, including several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), disk or optical disk, etc., and other media that can store program codes.

[0136] In this specification, the same or similar parts between the various embodiments can be referred to each other. In particular, for the device embodiment and the terminal embodiment, since they are basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the description in the method embodiment.

Claims

1. A slope control circuit suitable for a LIN bus, characterized in that: include: A slope control module, wherein an output end of the slope control module is electrically connected to a LIN bus, and the slope control module is used to adjust a slope corresponding to a LIN signal on the LIN bus to a preset slope; A high-frequency noise suppression circuit, wherein the input end of the high-frequency noise suppression circuit is electrically connected to the LIN bus, the output end of the high-frequency noise suppression circuit is grounded, and the high-frequency noise suppression circuit is used to filter the high-frequency noise when there is high-frequency noise on the LIN bus, and to turn on a current discharge path, so as to discharge part of the current on the LIN bus to the ground through the current discharge path.

2. The slope control circuit suitable for LIN bus according to claim 1, characterized in that: The slope control module comprises: A ramp current source, the ramp current source is used to output a ramp current with a preset slope; A current mirror unit group, wherein the input end of the current mirror unit group is electrically connected to the output end of the ramp current source, the output end of the current mirror unit group is electrically connected to the LIN bus, the current mirror unit group is used to amplify the ramp current, and output a control signal at the output end of the current mirror unit group, the control signal is used to adjust the slope corresponding to the LIN signal on the LIN bus to a preset slope.

3. The slope control circuit suitable for LIN bus according to claim 2, characterized in that: The current mirror unit group includes a plurality of current mirror units; The input end of the i-th current mirror unit is electrically connected to the output end of the i-1-th current mirror unit, and the i-th current mirror unit is used to receive the i-1-th current at the input end of the i-th current mirror unit and output the i-th current at the output end of the i-th current mirror unit; When the i-th current mirror unit is the first current mirror unit, the input end of the i-th current mirror unit is electrically connected to the output end of the ramp current source, wherein the input end of the i-th current mirror unit is the input end of the current mirror unit group; When the i-th current mirror unit is the last current mirror unit, the output end of the i-th current mirror unit is electrically connected to the LIN bus, wherein the output end of the i-th current mirror unit is the output end of the current mirror unit group; Wherein i>1, and the current value of the i-th current is greater than the current value of the i-1-th current.

4. The slope control circuit suitable for LIN bus according to claim 3, characterized in that: When i is 3, the current mirror unit group includes: a first transistor, wherein a drain of the first transistor is electrically connected to an output terminal of the ramp current source, a drain of the first transistor is electrically connected to a gate of the first transistor, a source of the first transistor is grounded, and the drain of the first transistor is an input terminal of the current mirror unit group; a second transistor, wherein a gate of the second transistor is electrically connected to the gate of the first transistor, and a source of the second transistor is grounded; a third transistor, wherein a drain of the third transistor is electrically connected to a drain of the second transistor, a drain of the third transistor is electrically connected to a gate of the third transistor, and a source of the third transistor is electrically connected to a voltage source; a fourth transistor, wherein a gate of the fourth transistor is electrically connected to the gate of the third transistor, and a source of the fourth transistor is electrically connected to the voltage source; a fifth transistor, wherein a drain of the fifth transistor is electrically connected to the drain of the fourth transistor, a gate of the fifth transistor is electrically connected to the drain of the fifth transistor, and a source of the fifth transistor is grounded; A sixth transistor, wherein the source of the sixth transistor is grounded, the gate of the sixth transistor is electrically connected to the gate of the fifth transistor, the drain of the sixth transistor is electrically connected to the LIN bus, wherein the drain of the sixth transistor is the output end of the current mirror unit group.

5. The slope control circuit applicable to the LIN bus according to claim 3, characterized in that: The last current mirror unit comprises: A 2i-1th transistor, wherein a source of the 2i-1th transistor is grounded, and a drain of the 2i-1th transistor is an input terminal of the last current mirror unit; a 2i th transistor, wherein a source of the 2i th transistor is grounded, and a drain of the 2i th transistor is an output terminal of the last current mirror unit; a first resistor, wherein a first end of the first resistor is electrically connected to the gate of the 2i-1th transistor, and a second end of the first resistor is electrically connected to the gate of the 2ith transistor; A first capacitor, wherein a first end of the first capacitor is electrically connected to a second end of the first resistor, and a second end of the first capacitor is grounded.

6. The slope control circuit applicable to the LIN bus according to claim 1, characterized in that: The high frequency noise suppression circuit comprises: a seventh transistor, wherein the source of the seventh transistor is grounded, and the drain of the seventh transistor is electrically connected to the LIN bus, wherein the source of the seventh transistor is the output end of the high-frequency noise suppression circuit, and the drain of the seventh transistor is the input end of the high-frequency noise suppression circuit; A second filter circuit, wherein an input end of the second filter circuit is electrically connected to the LIN bus, an output end of the second filter circuit is electrically connected to the gate of the seventh transistor, and the second filter circuit is used for filtering high-frequency noise when there is high-frequency noise on the LIN bus, and turning on the source and drain of the seventh transistor, so as to discharge part of the current on the LIN bus to the ground through the source and drain of the seventh transistor.

7. The slope control circuit suitable for LIN bus according to claim 6, characterized in that: The high frequency noise suppression circuit comprises: a plurality of the seventh transistors, wherein the sources of the plurality of the seventh transistors are electrically connected, the drains of the plurality of the seventh transistors are electrically connected, and the gates of the plurality of the seventh transistors are electrically connected; The number of the seventh transistors is positively correlated with the suppression effect on high-frequency noise.

8. The slope control circuit applicable to the LIN bus according to claim 6, characterized in that: The second filtering circuit comprises: a second capacitor, a first end of the second capacitor being electrically connected to the LIN bus; a second resistor, wherein a first end of the second resistor is electrically connected to a second end of the second capacitor, and a second end of the second resistor is electrically connected to a gate of the seventh transistor; A third resistor, wherein a first end of the third resistor is electrically connected to a second end of the second resistor, and a second end of the third resistor is grounded.

9. A LIN interface chip, characterized in that: include: A slope control circuit for a LIN bus according to any one of claims 1 to 8.

10. A microprocessor chip, characterized in that: include: A slope control circuit for a LIN bus according to any one of claims 1 to 8.