Circuit for preventing earphone from generating POP cracking sound during power-on startup
The integration of a delay switch circuit with MOS transistors and RC delay circuits in audio devices addresses the issue of POP distortion by gradually increasing volume, ensuring a smooth power-on process and protecting headphones.
Patent Information
- Application Number
- CN202421359922.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-06-14
- Publication Date
- 2024-12-27
- Estimated Expiration
- 2034-06-14
AI Technical Summary
Existing audio devices experience POP distortion when powered on due to sudden transmission of high voltage signals, which can damage headphones or audio devices and degrade user experience.
A circuit with a delay switch mechanism using MOS transistors and RC delay circuits is integrated between the audio CODEC and headphone interface to gradually increase the volume, preventing the sudden application of high voltage signals to the headphones.
The solution effectively prevents POP distortion by delaying the transmission of high voltage signals, ensuring a smooth power-on process and protecting the headphones from damage.
Smart Images

Figure CN222263004U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of audio output circuits, in particular to a circuit for preventing earphones from generating POP sound distortion when the earphones are powered on. Background Art
[0002] In audio devices, POP distortion often occurs when the device is powered on. This POP distortion is usually caused by the sudden transmission of high voltage signals or the transient response of switching circuits. This distortion not only affects the user experience, but may also damage the headphones or audio devices. Utility Model Content
[0003] In view of the deficiencies in the prior art, the purpose of the utility model is to provide a circuit to prevent POP distortion in headphones when the device is powered on. The circuit has a simple structure and low cost, and can prevent POP distortion in headphones when the device is powered on.
[0004] In order to achieve the above-mentioned purpose, the technical solution adopted by the utility model is: a circuit for preventing POP distortion in headphones when the power is turned on, comprising a main control chip, an audio CODEC and a headphone interface PJ_393, the headphone interface PJ_393 being provided with a left channel output pin 4 and a right channel output pin 3, the main control chip being connected to the audio CODEC, the audio CODEC being provided with a left channel output terminal LOUT1 and a right channel output terminal ROUT1, a delay switch circuit for cutting off the high-voltage signal generated when power is turned on and output to the headphone interface PJ_393 is electrically connected between the left channel output terminal LOUT1 and the left channel output pin 4 of the headphone interface PJ_393, and between the right channel output terminal ROUT1 and the right channel output pin 3 of the headphone interface PJ_393.
[0005] The delay switch circuit includes a MOS tube Q7, a MOS tube Q8, a capacitor C514 and a resistor R232.
[0006] A first switch subcircuit controlled by a MOS tube Q7 is connected between the left channel output pin 4 of the headphone interface PJ_393.
[0007] A second switch sub-circuit controlled by MOS tube Q7 is connected between the right channel output pin 3 of the headphone interface PJ_393;
[0008] The capacitor C514 and the resistor R232 are connected in series to form an RC delay circuit, and the G pole of the MOS tube Q7 and the G pole of the MOS tube Q8 are electrically connected to the RC delay circuit respectively.
[0009] The D pole of the MOS tube Q7 is electrically connected to the left channel output terminal LOUT1, and the S pole of the MOS tube Q7 is electrically connected to the left channel output pin 4 of the headphone interface PJ_393;
[0010] The D pole of the MOS tube Q8 is electrically connected to the right channel output terminal ROUT1, and the S pole of the MOS tube Q8 is electrically connected to the right channel output pin 3 of the headphone interface PJ_393.
[0011] A capacitor C515 is connected in series between the D pole of the MOS tube Q7 and the left channel output terminal LOUT1 for coupling the left channel high voltage signal to the headphone interface PJ_393;
[0012] A capacitor C516 is connected in series between the D pole of the MOS tube Q8 and the right channel output terminal ROUT1 for coupling the right channel high voltage signal to the headphone interface PJ_393.
[0013] A resistor R160 is connected in series between the D pole of the MOS tube Q7 and the capacitor C515, and a resistor R230 is connected in series between the D pole of the MOS tube Q7 and the ground terminal;
[0014] A resistor R161 is connected in series between the D pole of the MOS tube Q8 and the capacitor C516, and a resistor R231 is connected in series between the D pole of the MOS tube Q8 and the ground terminal.
[0015] Compared with the prior art, the utility model has the following advantages: the utility model adds a delay switch circuit between the headphone interface and the audio CODEC, delays the transmission of the power-on signal to the headphone interface, gradually increases the volume of the headphone, avoids the headphone suddenly receiving a high-voltage signal to produce distortion, and avoids the headphone producing POP distortion when the device is powered on. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] Figure 1 It is a circuit block diagram of the utility model.
[0017] Figure 2 It is a circuit working flow block diagram of the utility model.
[0018] Figure 3 and Figure 4 It is a circuit schematic diagram of the utility model.
[0019] Figure 5 The utility model is a headphone interface output signal waveform diagram. DETAILED DESCRIPTION
[0020] A circuit to prevent earphones from producing POP sound when powered on. Figures 1 to 5As shown, it includes a main control chip, an audio CODEC and a headphone interface PJ_393, the headphone interface PJ_393 is provided with a left channel output pin 4 and a right channel output pin 3, the main control chip is connected to the audio CODEC, the audio CODEC is an audio output unit, the audio CODEC is provided with a left channel output terminal LOUT1 and a right channel output terminal ROUT1, and the audio CODEC outputs the audio signals of the left and right channels through the left channel output terminal LOUT1 and the right channel output terminal ROUT1 respectively. A first delay switch circuit is electrically connected between the left channel output terminal LOUT1 and the left channel output pin 4 of the headphone interface PJ_393, and a second delay switch circuit is electrically connected between the right channel output terminal ROUT1 and the right channel output pin 3 of the headphone interface PJ_393, which is a delay switch circuit for cutting off the high voltage signal generated when power is on and output to the headphone interface PJ_393.
[0021] If there is no delay switch circuit, at the moment the device is powered on, capacitors C515 and C516 will couple the high-voltage signal to the headphone interface PJ_393 and output it to the headphone, causing the headphone to produce POP distortion. Adding a delay switch circuit can cut off the high-voltage signal generated when powered on, or make the voltage signal transmitted to the headphone rise slowly, so as not to produce POP distortion. The utility model adds a delay switch circuit between the headphone interface and the audio CODEC, delays the transmission of the power-on signal to the headphone interface, and gradually increases the volume of the headphone, avoiding the headphone from suddenly receiving the high-voltage signal and producing distortion, and avoiding the headphone from producing POP distortion when the device is powered on.
[0022] Specifically, the MOS transistor Q7, the MOS transistor Q8, the capacitor C514 and the resistor R232 are electrically connected to form two delay switch circuits, wherein a first switch sub-circuit controlled by the MOS transistor Q7 is connected between the left channel output pin 4 of the headphone interface PJ_393, and a second switch sub-circuit controlled by the MOS transistor Q7 is connected between the right channel output pin 3 of the headphone interface PJ_393; the capacitor C514 and the resistor R232 are connected in series to form an RC delay circuit, and the G pole (pin 1) of the MOS transistor Q7 and the G pole of the MOS transistor Q8 are electrically connected to the RC delay circuit respectively. The D pole (pin 3) of the MOS transistor Q7 is electrically connected to the left channel output terminal LOUT1, and the S pole (pin 2) of the MOS transistor Q7 is electrically connected to the left channel output pin 4 of the headphone interface PJ_393; the D pole of the MOS transistor Q8 is electrically connected to the right channel output terminal ROUT1, and the S pole of the MOS transistor Q8 is electrically connected to the right channel output pin 3 of the headphone interface PJ_393.
[0023] A capacitor C515 is connected in series between the D pole of the MOS tube Q7 and the left channel output terminal LOUT1 for coupling the left channel high voltage signal to the headphone interface PJ_393; a capacitor C516 is connected in series between the D pole of the MOS tube Q8 and the right channel output terminal ROUT1 for coupling the right channel high voltage signal to the headphone interface PJ_393.
[0024] A resistor R160 is connected in series between the D pole of the MOS tube Q7 and the capacitor C515, and a resistor R230 is connected in series between the D pole of the MOS tube Q7 and the ground terminal; a resistor R161 is connected in series between the D pole of the MOS tube Q8 and the capacitor C516, and a resistor R231 is connected in series between the D pole of the MOS tube Q8 and the ground terminal.
[0025] The pin EARPHONE_CTL of the audio CODEC is connected to the pin GPIO of the main control chip. No matter the pin EARPHONE_CTL is high or low at the moment of power-on, it can prevent the earphone from producing POP distortion. Because if the pin EARPHONE_CTL of the audio CODEC is low at the moment of power-on, the MOS tubes Q7 and Q8 are directly turned off, which is the most ideal situation. However, the pin EARPHONE_CTL of the audio CODEC may also be high. At this time, the RC delay circuit composed of the resistor R232 and C514 can effectively delay the conduction of the MOS tubes Q7 and Q8, thereby suppressing the earphone from producing POP distortion.
[0026] The above contents are only preferred embodiments of the present invention. For ordinary technicians in this field, according to the concept of the present invention, there will be changes in the specific implementation methods and application scopes. The contents of this specification should not be understood as limiting the present invention.
Claims
1. A circuit for preventing earphones from producing POP sound distortion when the device is powered on, comprising a main control chip, an audio CODEC and an earphone interface PJ_393, wherein the earphone interface PJ_393 is provided with a left channel output pin 4 and a right channel output pin 3, and the main control chip is connected to the audio CODEC, and is characterized in that: The audio CODEC is provided with a left channel output terminal LOUT1 and a right channel output terminal ROUT1. A delay switch circuit for cutting off the high-voltage signal generated when power is turned on and output to the headphone interface PJ_393 is electrically connected between the left channel output terminal LOUT1 and the left channel output pin 4 of the headphone interface PJ_393, and between the right channel output terminal ROUT1 and the right channel output pin 3 of the headphone interface PJ_393.
2. A circuit for preventing earphones from producing POP sound distortion when powered on according to claim 1, characterized in that: The delay switch circuit includes a MOS tube Q7, a MOS tube Q8, a capacitor C514 and a resistor R232. A first switch sub-circuit controlled by a MOS tube Q7 is connected between the left channel output pin 4 of the headphone interface PJ_393. A second switch sub-circuit controlled by MOS tube Q7 is connected between the right channel output pin 3 of the headphone interface PJ_393; The capacitor C514 and the resistor R232 are connected in series to form an RC delay circuit, and the G pole of the MOS tube Q7 and the G pole of the MOS tube Q8 are electrically connected to the RC delay circuit respectively.
3. A circuit for preventing earphones from producing POP sound distortion when powered on according to claim 2, characterized in that: The D pole of the MOS tube Q7 is electrically connected to the left channel output terminal LOUT1, and the S pole of the MOS tube Q7 is electrically connected to the left channel output pin 4 of the headphone interface PJ_393; The D pole of the MOS tube Q8 is electrically connected to the right channel output terminal ROUT1, and the S pole of the MOS tube Q8 is electrically connected to the right channel output pin 3 of the headphone interface PJ_393.
4. A circuit for preventing earphones from producing POP sound distortion when powered on according to claim 3, characterized in that: A capacitor C515 is connected in series between the D pole of the MOS tube Q7 and the left channel output terminal LOUT1 for coupling the left channel high voltage signal to the headphone interface PJ_393; A capacitor C516 is connected in series between the D pole of the MOS tube Q8 and the right channel output terminal ROUT1 for coupling the right channel high voltage signal to the headphone interface PJ_393.
5. The circuit for preventing earphones from producing POP sound distortion when powered on according to claim 4, characterized in that: A resistor R160 is connected in series between the D pole of the MOS tube Q7 and the capacitor C515, and a resistor R230 is connected in series between the D pole of the MOS tube Q7 and the ground terminal; A resistor R161 is connected in series between the D pole of the MOS tube Q8 and the capacitor C516, and a resistor R231 is connected in series between the D pole of the MOS tube Q8 and the ground terminal.