54results about How to "Save I/O resources" patented technology

The invention discloses a device and a method for testing a system-on-chip chip with a plurality of isomorphic IP cores. The device comprises a controller and a condition comparator, wherein the controller is provided with a plurality of control signal interfaces connected to each corresponding isomorphic IP core and is used for inputting a test control signal to each isomorphic IP core, controlling the test on one or more isomorphic IP cores, broadcasting the same test excitation data to the IP cores and simultaneously controlling the output of a test response of a certain IP core; the test response serves as a reference test response and is compared with the test responses of other IP cores; and the condition comparator is used for comparing the test response of a corresponding IP core with the reference test response and processing the comparison result to produce a one-bit error identification signal for identifying whether the comparison is accordant.

The present invention discloses a multi-bit nixietube control circuit and a method thereof. The control circuit comprises a nixietube, the drive circuit of the nixietube, latch drive circuits, a microprocessor and a decoding circuit. The present invention is characterized in that an eight-bit nixietube is used as a control unit of a section or a bit; two latch circuits are respectively used for section drive and bit drive of the nixietube. The method (1) comprises: the data input terminals of section latches and bit latches are independent and separate and are connected with the data transmission permission terminals in parallel, the data transmission permission terminals are directly connected with the microprocessor or connected the microprocessor by the decoding circuit. The method (2) comprises: the data input terminals of the section latches and the bit latches are connected in parallel, and the data transmission permission terminals are independent and separate; the independent and separate data transmission permission terminals of the sections and the bits are respectively connected with the microprocessor; the data signals of the section latches and bit latches of each control unit respectively drive the corresponding nixietube by the drive circuit of the nixietube. The method solves the problem of high cost when the multi-bit nixietube is driven or a plurality of LEDs are used for imaging.

The invention relates to a configurable low-speed PAD and a BMC chip possessing an intelligent reconfigurable interface. The chip is characterized in that the chip includes an ARM; the ARM is connected to the configurable low-speed PADs, low-speed PADs and high-speed PADs; the ARM is connected to an interface control logic module; the interface control logic module is connected to the configurable low-speed PADs, the low-speed PADs and the high-speed PADs; the configurable low-speed PADs, the low-speed PADs and the high-speed PADs are connected to an BMC chip pin respectively; and there are the several configurable low-speed PADs, the several low-speed PADs and the several high-speed PADs. In the invention, the configurable low-speed PADs are designed, open drain output and normal output functions are possessed, and a pull-up resistor function under an I2C mode is possessed too. After the BMC chip is molded, the interface can be intelligently configured and great convenience is brought for a board-grade design. IO resources can be saved, and interface reuse of the BMC chip to 12C, SPI and PCIE is realized.

The invention relates to a garbage can, in particular to an intelligent waste sorting collection garbage can and a sorting collection method thereof. The garbage can comprises a garbage can upper boxand a garbage can lower box, a turnable garbage can cover plate is arranged on the top of the garbage can upper box, and an electronic lock is arranged on the garbage can upper box, a lateral displacement inductor is arranged on the side wall of the garbage can upper box, a mechanical induction plate is arranged at the bottom of the garbage can upper box, a resistance-strain gravity inductor is arranged on the side wall of the garbage can upper box, a bottom displacement inductor is arranged at the bottom of the lower portion of the mechanical induction plate, the mechanical induction plate isa plate capable of being opened and closed, the garbage can upper box and the garbage can lower box are communicated or cut off through opening and closing of the mechanical induction plate, and thegarbage can lower box is provided with a garbage outlet. Accordingly, by means of an intelligent sorting garbage can, mandatory waste sorting in a residential area is implemented, and the awareness ofactively sorting household waste is helped to be improved for people.

The invention relates to an electric car controller integrating the battery management and complete car control functions. The controller mainly comprises a microprocessor module, a power supply module, an analogue input module, a temperature acquiring module, a switching quantity input module, a switching quantity output module, a CAN interface module, a balancing module and a voltage acquiring module, wherein the analogue input module and the temperature acquiring module are respectively used for connecting signals to the microprocessor module; the power module is respectively connected with the switching quantity input module, the switching quantity output module, the CAN interface module, the balancing module, the voltage acquiring module; the switching quantity input module, the switching quantity output module, the CAN interface module, the balancing module and the voltage acquiring module are respectively connected with the microprocessor module through a first isolating circuits. According to the controller, the car can be controlled to normally run according to the battery management and the complete control; the fault can be determined; the charge and discharge states can be obtained; the charge can be balanced to ensure the consistency of batteries.

The invention relates to an AES (Advanced Encryption Standard) decryption and decryption method for FPGA with limited IO resource. The AES decryption and decryption method includes the following steps: 1) a data processing module receives the input data and buffers the data into an input buffer cache; 2) an FPGA chip sends the data input in the buffer cache to an encryption unit or a decryption unit through a control command; 3) the FPGA chip sends the encrypted or decrypted data to an output buffer cache through the control command; 4) the FPGA chip reads the data in the output buffer cache through the control command; and 5) a system state signal is sent through a state manager and a command module. Compared with the prior art, the AES decryption and decryption method and circuit for FPGA with limited IO resource have the advantages of saving IO resource and being high in the program transportability.

The invention provides an elevator calling and registering system and an elevator. The system comprises a resistance unit, a power supply, a pull-down resistor and a registering unit; one end of the resistance unit is connected with the power supply, and the other end of the resistance unit is grounded through the pull-down resistor; the resistance unit comprises two or more resistors and button switches, all the resistors are connected with one another in series, and each resistor is connected with one button switch in parallel; each button switch corresponds to a floor, wherein the resistance value of the any one resistor does not equals to the resistance value of the other resistor; one input end of the registering unit is connected between the resistance unit and the pull-down resistor, is used for acquiring the input voltage of the pull-down resistor, and determines the elevator calling information of a user according to the acquired voltage value; and the elevator comprises at least one elevator calling and registering system. The elevator calling and registering system and the elevator have simple structures, are convenient to install and debug, use less wires and are low in cost.

The invention discloses a system and method for automatically allocating communication addresses for slave nodes of an industrial bus. The system comprises a master node and a plurality of slave nodes, and is characterized in that the master node and each of the slave nodes are respectively connected to the industrial bus; the master node sends a first chip selection signal to each of the slave nodes, and the slave nodes acquire data on the industrial bus; the master node is used for sequentially selecting one slave node to act as a slave node to be allocated, driving the first chip selection signal corresponding to the slave node to be allocated to be at effective state, enabling a target address to act as bus data and sending the target address to the industrial bus; and the slave node to be allocated is used for acquiring data on the industrial bus when the corresponding first chip selection signal is detected to be at an effective state and setting the data to be a communication address. The invention realizes a novel mode for automatically allocating communication addresses for the slave nodes of the industrial bus, and automatic allocation of the communication addresses can be realized simply and quickly through maintaining one program.

The invention belongs to the technical field of electronic information, and particularly relates to a contact type acoustic wave sensing device. The contact type acoustic wave sensing device includesa piezoelectric piece and a single chip microcomputer; the piezoelectric piece is used for converting a vibration signal of a sound wave into an electric signal; the single chip microcomputer is usedfor processing the received electric signal according to a pre-programmed program and issuing an execution signal. The technical problem that the sensing device has poor precision and is easy to be falsely triggered in the prior art is solved. The piezoelectric piece can convert the solid vibration signal into an electrical signal, and because the piezoelectric piece is insensitive to the acousticsignal in the air, the solid vibration signal can be better sensed, so that only one piezoelectric piece can achieve a large sensing receiving area.

The invention provides a broken bar detection device. The device comprises a transmission roller bar, one end of the transmission roller bar is fixedly connected with a rotating shaft which extends outwards, the tail end of the rotating shaft is fixedly connected with a trigger block suitable for rotation along with the rotating shaft, the outer side of the trigger block is fixedly provided with asignal generator corresponding to the trigger block, when the transmission roller bar rotates, the rotating shaft is driven to rotate, the trigger block is driven to rotate, and when the trigger block rotates to make contact with the signal generator, the signal generator generates a detection signal. Through the contact type broken bar detection device, multiple defects existing in the prior artcan be effectively overcome; in addition, the invention further provides a broken bar automatic monitoring system based on the contact type broken bar detection device and a roller kiln with the broken bar automatic monitoring system based on the contact type broken bar detection device.

A method of processing data is disclosed. The method includes obtaining newly added data of a latest cycle, generating an incremental graph, dividing the incremental graph into a plurality of computing nodes to generate a partial incremental graph of a latest version, loading a partial incremental graph of a previous version from persistent storage, and performing processing on the partial incremental graphs of the latest version and the previous version. The invention also discloses a method for processing fund flow data, a corresponding system, a device and a medium.

The invention relates to a task application device based on task pre-allocation, which comprises a memory and a processor, and is characterized in that an instruction is stored in the memory and is suitable for being loaded by the processor and executing the following steps: generating a task by a client; judging whether the generated task is a high-priority task; if the current task is a high-priority task, putting the current task into a high-priority queue; if the current task is not the high-priority task, selecting an entry user of the executable task, and putting the task into a pre-allocated task queue of the entry user of the executable task; entering a task application request initiated by a user; if the high-priority queue is not empty and the task with the application permissionof the input user exists, immediately applying for the task with the highest priority in the tasks by the current input user; otherwise, allocating the task with the highest priority to the current input user from the pre-allocated task queue of the current input user; and after the input user acquires the task, returning the detail data to the input user by the client.

The invention discloses a method and a server for secondary confirmation short messaging. The method for secondary confirmation short messaging comprises the following steps: receiving a short message request message sent by a client, wherein the short message request message includes uplink object information; determining a client instruction corresponding to the short message request message based on the uplink object information in the short message request message; querying a table entry matched with the client instruction in a service instruction table, and determining whether the short message request message needs secondary confirmation based on the queried table entry matched with the client instruction; storing the uplink object information in a memory and sending a secondary confirmation short message to the client when determining that the short message request message needs secondary confirmation; querying uplink object information corresponding to a first confirmation short message in the memory when receiving the first confirmation short message sent by the client; and executing queried service associated with the uplink object information. By adopting the technical scheme of the invention, the efficiency processing of secondary confirmation short messages can be improved.

The invention discloses a method and a device for automatically matching and upgrading a CPLD of a service board card, and relates to the technical field of communication. The method comprises the steps of storing CPLD target code universal versions and CPLD target code special versions of all service single disks are in a disk control module; after the service single disk is started, judging whether single disk type information can be obtained through the CPLD or not, and if the single disk type information cannot be obtained, burning a CPLD target code general version into the CPLD on line through an upgrading interface; and if the single disk type information can be obtained, obtaining upgrading information of the special version through the CPLD, matching the single disk type information with the stored special version of the CPLD target code after determining that upgrading is needed according to the upgrading information, and calling an upgrading interface to burn the matched special version of the CPLD target code into the CPLD on line. According to the invention, the production efficiency of the single disk is improved, the consumption of I/O resources of the disk control module is reduced, the management and maintenance of the disk control single disk and versions are facilitated, and the actual application requirements are met.

Embodiments of the invention disclose a slot number identification method and device. The method comprises the steps of acquiring a first voltage value and a second voltage value of a first pin and asecond pin of a slot; determining a first preset voltage interval to which the first voltage value belongs and a second preset voltage interval to which the second voltage value belongs; determining afirst parameter corresponding to the first preset voltage interval and a second parameter corresponding to the second preset voltage interval; and finally calculating a slot number of the slot by using the first parameter and the second parameter. According to the slot number identification method and device, the two voltage values are collected to recognize the slot number, so that the pins andother hardware resources are saved; and more slots can be formed in a backboard with the same area, and level leads do not need to be configured, so that a connection structure of the slot is simple.In addition, only two service single-board IO pins connected with the slot need to be occupied, so that the IO resources are saved.

The invention discloses a backboard and mainboard connection port identification system and method and a server. The system comprises a first controller of a mainboard, a serial-to-parallel conversion chip and a plurality of downlink ports, the first controller sends PWM signals used for distinguishing the downlink ports to the serial-to-parallel conversion chip through a serial bus, and each parallel IO port of the serial-to-parallel conversion chip is connected with the corresponding downlink port through a single signal line. The serial-to-parallel conversion chip distributes the PWM signal to a downlink port connected with each parallel IO port according to the frequency; the device comprises a back plate, uplink ports of the back plate and a second controller, one end of each uplink port is connected with a certain downlink port through a cable, the other end of each uplink port is connected with an IO port of the corresponding second controller through a single signal line, and the second controller is configured to be used for analyzing PWM signals received by the uplink ports so as to determine the corresponding relation between each uplink port and the corresponding downlink port. According to the scheme, expansion of more requirements is achieved, and IO resources of the backboard are saved.