I-type three-level IGBT (Insulated Gate Bipolar Translator) double-pulse testing device
By designing the I-type three-level IGBT dual-pulse test device, using rectifier circuit and switch logic control, the problem of high threshold for the existing I-font topology structure is solved, and a more efficient and universal test method is realized, which is suitable for multiple Test scenarios and reduce costs.
Patent Information
- Application Number
- CN202420890302.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-04-23
- Publication Date
- 2025-01-03
- Estimated Expiration
- 2034-04-23
AI Technical Summary
The existing I-font three-level topology double-pulse test device has a high threshold and is not suitable for all test applications. The complex interleaving control strategy increases the difficulty of testing.
A type I three-level IGBT dual-pulse test device is designed, including a dual-pulse generator, topology circuit, inductor, rectifier circuit and oscilloscope. DC power is provided through the rectifier circuit, the inductor is connected to the IGBT of the topology circuit, and switching logic is adopted. Control and simplify the testing process.
It improves testing efficiency and universality, is simple to operate, is compact and lightweight, and is easy to carry and move. It is suitable for various test scenarios, reducing testing costs and thresholds.
Smart Images

Figure CN222299739U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of test circuits, in particular to an I-type three-level IGBT double-pulse test device. Background Art
[0002] Double pulse test is a test method commonly used in power electronic devices and systems. It aims to evaluate the switching characteristics and performance of power devices (such as power semiconductor devices), that is, the switching behavior under different voltage and current conditions, such as turn-on time, turn-off time, conduction loss, switching loss, etc. In power electronic systems, the switching characteristics of power devices are crucial to the efficiency, stability and reliability of the system.
[0003] In traditional double pulse testing, there are usually only two levels of signals (high level and low level), while the I-shaped three-level topology uses a third intermediate level, which allows the output signal to have higher resolution and finer control. By testing and analyzing the device's response to these two pulse signals, its switching characteristics can be evaluated, and the design and control strategy of the power electronic system can be optimized accordingly. Existing I-shaped three-level topologies usually require complex control strategies such as interleaved control to ensure the coordinated operation of the four IGBTs in the circuit. Due to its complexity, the threshold for double pulse testing of the I-shaped three-level topology is high and is not suitable for all test applications. Utility Model Content
[0004] The main purpose of the utility model is to provide an I-type three-level IGBT double-pulse test device, aiming to improve the universality of the test.
[0005] To achieve the above-mentioned purpose, the utility model proposes a type I three-level IGBT double pulse test device, including a double pulse generator, a topological circuit, an inductor, a rectifier circuit, and an oscilloscope, wherein the inductor, the double pulse generator, the rectifier circuit, and the oscilloscope are electrically connected to the topological circuit, the topological circuit includes an inner tube IGBT and an outer tube IGBT that are electrically connected, the inductor is connected to the inner tube IGBT or the inductor is connected to the outer tube IGBT, the rectifier circuit provides direct current for the topological circuit, the double pulse generator is used to provide a driving pulse signal to the inner tube IGBT and / or the outer tube IGBT, and the oscilloscope is used to receive an output voltage waveform and an output current waveform formed by the driving voltage of the inner tube IGBT and / or the outer tube IGBT.
[0006] In one embodiment, the topological circuit also includes a first diode, a second diode, a third diode, and a fourth diode. The outer IGBT includes a first IGBT tube and a fourth IGBT tube. The inner IGBT includes a second IGBT tube and a third IGBT tube. The first IGBT tube is electrically connected to the first diode, the second IGBT tube is electrically connected to the second diode, the third IGBT tube is electrically connected to the third diode, and the fourth IGBT tube is electrically connected to the fourth diode.
[0007] In one embodiment, the I-type three-level IGBT double-pulse test device is further provided with a DC bus BUS+, one end of the inductor is connected to the DC bus BUS+, and the other end of the inductor is connected to the third IGBT tube.
[0008] In one embodiment, the I-type three-level IGBT double-pulse test device is further provided with a DC bus BUS+, one end of the inductor is connected to the DC bus BUS+, and the other end of the inductor is connected to the fourth IGBT tube.
[0009] In one embodiment, the topological circuit further includes a first capacitor and a second capacitor, the first capacitor and the second capacitor are connected in series, and the first capacitor and the second capacitor are electrically connected to the DC bus BUS+.
[0010] In one embodiment, the first capacitor and the second capacitor are electrolytic capacitors.
[0011] In one embodiment, the topological circuit also includes a fifth diode and a sixth diode, the cathode of the fifth diode is connected between the first IGBT tube and the second IGBT tube, the anode of the fifth diode is connected to the cathode of the sixth diode, and the anode of the sixth diode is connected between the third IGBT tube and the fourth IGBT tube.
[0012] The utility model adopts a rectifier circuit to provide direct current, and the inductor is connected to the outer tube IGBT or the inner tube IGBT of the topological circuit. The topological circuit is controlled by a certain switch logic. The utility model can complete the test in a shorter time, thereby improving the test efficiency; the test operation is simple, the device is more compact and light, easy to carry and move, suitable for various different test scenarios, and improving the universality of the test. BRIEF DESCRIPTION OF THE DRAWINGS
[0013] In order to more clearly illustrate the embodiments of the utility model or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the utility model. For ordinary technicians in this field, other drawings can be obtained based on the structures shown in these drawings without paying creative work.
[0014] Figure 1 This is a schematic diagram of a first embodiment of a double pulse test device for type I three-level IGBT;
[0015] Figure 2 This is a schematic diagram of a second embodiment of a double pulse test device for type I three-level IGBT;
[0016] Figure 3 It is an I-shaped three-level topology diagram.
[0017] The realization of the purpose, functional features and advantages of the utility model will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION
[0018] The following will be combined with the drawings in the embodiments of the utility model to clearly and completely describe the technical solutions in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments of the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.
[0019] It should be noted that if the embodiments of the present invention involve directional indications (such as up, down, left, right, front, back...), the directional indications are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.
[0020] In addition, if there are descriptions involving "first", "second", etc. in the embodiments of the utility model, the descriptions of "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In addition, if the meaning of "and / or" appearing in the full text is to include three parallel schemes, taking "A and / or B" as an example, it includes scheme A, or scheme B, or a scheme that satisfies both A and B. In addition, the technical solutions between the various embodiments can be combined with each other, but it must be based on the ability of ordinary technicians in this field to implement. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such a combination of technical solutions does not exist and is not within the scope of protection required by the utility model.
[0021] The utility model proposes an I-type three-level IGBT double-pulse test device, comprising a double-pulse generator 1, a topological circuit, an inductor L, a rectifier circuit 3, and an oscilloscope 4, wherein the inductor L, the double-pulse generator 1, the rectifier circuit 3, and the oscilloscope 4 are electrically connected to the topological circuit, the topological circuit comprises an inner tube IGBT and an outer tube IGBT that are electrically connected, the inductor L is connected to the inner tube IGBT or the inductor L is connected to the outer tube IGBT, the rectifier circuit 3 provides direct current for the topological circuit, the double-pulse generator 1 is used to provide a driving pulse signal to the inner tube IGBT and / or the outer tube IGBT, and the oscilloscope 4 is used to receive an output voltage waveform and an output current waveform formed by the driving voltage of the inner tube IGBT and / or the outer tube IGBT.
[0022] In the embodiment of the present utility model, Figure 1 and Figure 2 As shown, the I-type three-level IGBT double-pulse test device adopts a rectifier circuit 3 to provide direct current, and the inductor L is connected to the outer tube IGBT or the inner tube IGBT of the topological circuit. The topological circuit is controlled by a certain switch logic. The present invention can complete the test in a shorter time, thereby improving the test efficiency; the test operation is simple, the device is more compact and light, easy to carry and move, and is suitable for various different test scenarios;
[0023] like Figure 3As shown, the topological circuit also includes a first diode D1, a second diode D2, a third diode D3, and a fourth diode D4. The outer IGBT includes a first IGBT tube Q1 and a fourth IGBT tube Q4. The inner IGBT includes a second IGBT tube Q2 and a third IGBT tube Q3. The first IGBT tube Q1 is electrically connected to the first diode D1, the second IGBT tube Q2 is electrically connected to the second diode D2, the third IGBT tube Q3 is electrically connected to the third diode D3, and the fourth IGBT tube Q4 is electrically connected to the fourth diode D4.
[0024] Embodiment 1
[0025] like Figure 1 As shown, the I-type three-level IGBT double-pulse test device is further provided with a DC bus BUS+, one end of the inductor L is connected to the DC bus BUS+, and the other end of the inductor L is connected to the third IGBT tube Q3.
[0026] The inductor L is connected to the DC bus BUS+ and the collector of the third IGBT tube Q3. The upper computer is used to control the double pulse generator 1 to only give two consecutive driving pulses to the third IGBT tube Q3. When the third IGBT tube Q3 is turned on, the current transmission direction is the direction of curve A. When the third IGBT tube Q3 is turned off, the current transmission direction is the direction of curve B. When the third IGBT tube Q3 is turned on again, the current flows in the direction of curve A again, and the first diode D1 and the second diode D2 reversely recover at the same time. During the test, the waveforms such as the driving voltage of the third IGBT tube Q3 and the turn-off stress of the third IGBT tube Q3 are observed through the connected oscilloscope 4 to evaluate the switching characteristics of the third IGBT tube Q3. The test process of other IGBTs is the same and will not be repeated here.
[0027] Embodiment 2
[0028] like Figure 2 As shown, the I-type three-level IGBT double-pulse test device is further provided with a DC bus BUS+, one end of the inductor L is connected to the DC bus BUS+, and the other end of the inductor L is connected to the fourth IGBT tube Q4.
[0029] The inductor L is connected to the DC bus BUS+ and the collector of the fourth IGBT tube Q4. The upper computer is used to control the double pulse generator 1 to only give two consecutive drive pulses to the fourth IGBT tube Q4. When the fourth IGBT tube Q4 is turned on, the current transmission direction is the C curve direction. When the fourth IGBT tube Q4 is turned off, the current transmission direction is the D curve direction. When the fourth IGBT tube Q4 is turned on again, the current flows in the C curve direction again, and the sixth diode D6 reversely recovers. During the test, the waveforms such as the drive voltage of the fourth IGBT tube Q4 and the turn-off stress of the fourth IGBT tube Q4 are observed through the connected oscilloscope 4 to evaluate the switching characteristics of the fourth IGBT tube Q4. The test process of other IGBTs is the same and will not be repeated here.
[0030] This type I three-level IGBT double pulse test device improves test efficiency and adopts a simpler test method. It can complete the test process in a shorter time, thereby improving test efficiency; reducing test costs and lowering the usage threshold: by optimizing the test process or using more cost-saving components, it can reduce the cost of testing and make the test more economical and efficient; it has stronger adaptability and flexible design, can adapt to different test environments and requirements, and has a wider range of applicability.
[0031] The topology circuit also includes a first capacitor C1 and a second capacitor C2, the first capacitor C1 and the second capacitor C2 are connected in series, and the first capacitor C1 and the second capacitor C2 are electrically connected to the DC bus BUS+. The first capacitor C1 and the second capacitor C2 are electrolytic capacitors, and the entire DC side is supported and balanced by the first capacitor C1 and the second capacitor C2 connected in series. The I-shaped three-level is controlled by a certain switch logic, and the AC side generates three levels of phase voltage to synthesize a sine wave at the output end.
[0032] The topological circuit also includes a fifth diode D5 and a sixth diode D6, wherein the cathode of the fifth diode D5 is connected between the first IGBT tube Q1 and the second IGBT tube Q2, the anode of the fifth diode D5 is connected to the cathode of the sixth diode D6, and the anode of the sixth diode D6 is connected between the third IGBT tube Q3 and the fourth IGBT tube Q4. The fifth diode D5 and the sixth diode D6 are clamping diodes, which are connected in the circuit to prevent the induced voltage in the inductor L from exceeding a certain safety level. When the current in the inductor L (such as a coil) is suddenly cut off, it will generate a reverse induced voltage. If this induced voltage exceeds the tolerance range of the surrounding components, these components may be damaged, so the fifth diode D5 and the sixth diode D6 are used to protect the topological circuit.
[0033] The above description is only an optional embodiment of the present invention, and does not limit the patent scope of the present invention. All equivalent structural changes made by using the contents of the present invention specification and drawings under the inventive concept of the present invention, or directly / indirectly applied in other related technical fields are included in the patent protection scope of the present invention.
Claims
1. A type I three-level IGBT double pulse test device, characterized in that: It includes a dual pulse generator, a topological circuit, an inductor, a rectifier circuit, and an oscilloscope. The inductor, the dual pulse generator, the rectifier circuit, and the oscilloscope are electrically connected to the topological circuit. The topological circuit includes an inner tube IGBT and an outer tube IGBT that are electrically connected. The inductor is connected to the inner tube IGBT or the inductor is connected to the outer tube IGBT. The rectifier circuit provides direct current for the topological circuit. The dual pulse generator is used to provide a driving pulse signal to the inner tube IGBT and / or the outer tube IGBT. The oscilloscope is used to receive an output voltage waveform and an output current waveform formed by the driving voltage of the inner tube IGBT and / or the outer tube IGBT.
2. The I-type three-level IGBT double pulse test device according to claim 1, characterized in that: The topological circuit also includes a first diode, a second diode, a third diode, and a fourth diode. The outer IGBT includes a first IGBT tube and a fourth IGBT tube. The inner IGBT includes a second IGBT tube and a third IGBT tube. The first IGBT tube is electrically connected to the first diode, the second IGBT tube is electrically connected to the second diode, the third IGBT tube is electrically connected to the third diode, and the fourth IGBT tube is electrically connected to the fourth diode.
3. The I-type three-level IGBT double pulse test device according to claim 2, characterized in that: The I-type three-level IGBT double-pulse test device is also provided with a DC bus BUS+, one end of the inductor is connected to the DC bus BUS+, and the other end of the inductor is connected to the third IGBT tube.
4. The I-type three-level IGBT double pulse test device according to claim 2, characterized in that: The I-type three-level IGBT double-pulse test device is also provided with a DC bus BUS+, one end of the inductor is connected to the DC bus BUS+, and the other end of the inductor is connected to the fourth IGBT tube.
5. The I-type three-level IGBT double pulse test device according to claim 3 or 4, characterized in that: The topology circuit further includes a first capacitor and a second capacitor, the first capacitor and the second capacitor are connected in series, and the first capacitor and the second capacitor are electrically connected to the DC bus BUS+.
6. The I-type three-level IGBT double pulse test device according to claim 5, characterized in that: The first capacitor and the second capacitor are electrolytic capacitors.
7. The I-type three-level IGBT double pulse test device according to claim 2, characterized in that: The topological circuit also includes a fifth diode and a sixth diode, wherein the cathode of the fifth diode is connected between the first IGBT tube and the second IGBT tube, the anode of the fifth diode is connected to the cathode of the sixth diode, and the anode of the sixth diode is connected between the third IGBT tube and the fourth IGBT tube.
