Self-powered synchronous rectification chip

By integrating the synchronous rectification controller and power tube in the synchronous rectification chip, the connection between the NMOS tube and the capacitor is used to realize the self-powered TSSOP-8 package, which solves the problems of complex packaging, large thickness and poor heat dissipation in the existing technology, and improves the Efficiency and lifespan, and reduce production costs.

CN222300675UActive Publication Date: 2025-01-03SHENZHEN CCMIC ELECTRONICS CO LTD
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202420681167.8
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-04-03
Publication Date
2025-01-03
Estimated Expiration
2034-04-03

AI Technical Summary

Technical Problem

The TSSOP-8 packaging process of existing synchronous rectifier chips is complex, has thicker thickness, poor heat dissipation performance, short service life, and cannot directly replace Schottky in SM277 and SM10 packages, resulting in the need to change the PCB, wasting manpower, material resources and time. .

Method used

Adopt the peripheral-free synchronous rectifier chip packaging method, the synchronous rectifier controller and power tube are integrated into a base island, connected to the capacitor through NMOS tubes, and self-power supply is achieved. The TSSOP-8 packaging process is adopted to simplify the packaging process and thin the overall structure. .

Benefits of technology

It realizes simplified packaging process, improved heat dissipation performance, extended service life, and no need to change PCB, saving manpower and material resources and reducing production costs.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN222300675U_ABST
    Figure CN222300675U_ABST
Patent Text Reader

Abstract

The utility model discloses a self-powered synchronous rectification chip, which is characterized in that a power tube and a synchronous rectification controller are fixed on the same base island through a binder, and the synchronous rectification controller is respectively communicated with the power tube and four output pins led out from one side of the base island through leads; a capacitor is arranged at one end of three pins arranged on the other side of the base island, one end of the capacitor is communicated with an adjacent pin through an NMOS (N-channel Metal Oxide Semiconductor) tube, and the other end of the capacitor is kept in a suspended state after connection; other connecting positions of the synchronous rectification controller are respectively connected with the capacitor and the pin adjacent to the capacitor, and the power tube is respectively connected with the three pins on one side of the base island. According to the utility model, the problems of low efficiency, large energy consumption and poor heat dissipation performance of the Schottky diode, which are solved by the fact that the Schottky diode packaged by the TSSOP-7 in the prior art can completely replace the Schottky diode packaged by the SM277 and the SM10 without changing a PCB (Printed Circuit Board), the efficiency is improved, the energy is saved, and the energy efficiency requirement is met.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The utility model relates to the technical field of semiconductor packaging, in particular to a self-powered synchronous rectification chip. Background Art

[0002] Semiconductor packaging refers to the shell used to install semiconductor integrated circuit chips. Using a series of technologies, the chip is laid out, glued, fixed and connected on the frame, and the wiring terminals are led out and fixed by potting with a plastic insulating medium to form an overall three-dimensional structure.

[0003] Most of the synchronous rectifier chips in the prior art are packaged in SOP8 or separated (i.e., the controller and NMOS are separated). They use a split packaging structure. This type of synchronous rectifier chip also requires capacitors on the outside. In addition, since the split packaging structure cannot directly replace the Schottky packaged in SM277 and SM10, customers need to change the PCB, which will waste too much manpower, material resources and time.

[0004] In view of this, the technical solution proposes a self-powered synchronous rectifier chip, which adopts a peripheral-free synchronous rectifier chip packaging method, a TSSOP-8 process, and places the chip directly in the base island. The controller and MOS are connected with wires, and the capacitor is placed between pins 3 and 4. There is no need for a separate power supply, which not only simplifies the packaging process, but also the overall chip can be further thinned, thereby improving the heat dissipation performance, while improving efficiency and further extending the service life. Utility Model Content

[0005] The technical solution of the utility model aims to solve one of the technical problems in the related art at least to a certain extent. To this end, the main purpose of the utility model is to provide a self-powered synchronous rectification chip, aiming to solve the problems of TSSOP-8 packaging technology being complex, thick, poor heat dissipation performance, and short service life in the prior art.

[0006] To achieve the above object, the utility model provides a self-powered synchronous rectification chip, including a base island, a power tube and a synchronous rectification controller arranged in the base island,

[0007] The base island has 4 pins on one side and 3 pins on the other side, and a capacitor is provided at one end of the 3 pins, and the capacitor is connected to the adjacent pins through an NMOS tube.

[0008] The synchronous rectification controller is respectively connected to the power tube, the capacitor, and the pins located adjacent to one side of the capacitor. The power tube is also respectively connected to 3 pins. The synchronous rectification controller is also connected to 4 output pins led out from one side of the base island.

[0009] As a further solution of the present invention, the capacitor is a self-powered capacitor, and the self-powered capacitor draws power from pin 4 through the synchronous rectification controller.

[0010] As a further solution of the present invention, the NMOS tube is a 20V-200V NMOS.

[0011] As a further solution of the utility model, the three pins on one side of the base island are each provided with five soldering points, and the second soldering point of the middle pin is located on the right side.

[0012] As a further solution of the present invention, the capacitor is a non-polar capacitor.

[0013] The beneficial effects of the utility model are as follows:

[0014] The self-powered synchronous rectifier chip proposed in this utility model adopts a new "no peripheral synchronous rectifier chip" packaging method to realize the integration of the synchronous rectifier chip and the power tube in a base island, and adopts an 8-pin (ie TSSOP-8) packaging process, replacing the diode solution, improving efficiency and energy efficiency. There is no need to change the PCB board, saving manpower, material resources, and time, and the product is easy to mass produce, reducing costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the embodiments of the utility model technical solution or the utility model technical solution in the prior art, the drawings required for use in the embodiments or the prior art descriptions will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the utility model technical solution. For ordinary technicians in this field, other drawings can be obtained based on the structures shown in these drawings without paying creative work.

[0016] Figure 1 It is a schematic diagram of the planar structure of the packaging structure in the utility model.

[0017] [Main parts / assembly reference numerals]

[0018] Label name Label name 1 Key Island 4 NMOS tube 2 Power tube 5 capacitance 3 Synchronous Rectification Controller 6 Pinout DETAILED DESCRIPTION

[0019] as follows:

[0020] Please refer to the attached Figure 1 ,

[0021] The main structure includes a base island, a power tube and a synchronous rectification controller arranged in the base island. Four pins are arranged on one side of the base island, and three pins are arranged on the other side. A capacitor is arranged at one end of the three pins. The capacitor is connected to the adjacent pins through an NMOS tube. The synchronous rectification controller is respectively connected to the power tube, the capacitor, and the pins adjacent to one side of the capacitor. The power tube is also respectively connected to the three pins. The synchronous rectification controller is also connected to the four output pins led out from one side of the base island.

[0022] Here’s how it works:

[0023] The power tube 2 and the synchronous rectification controller 3 are fixed on the same base island 1 by an adhesive, and the synchronous rectification controller 3 is connected to the power tube 2 and the four output pins 6 led out on one side of the base island 1 by wires; the capacitor 5 setting step: a capacitor 5 is set at one end of the three pins 6 set on the other side of the base island 1, and one end of the capacitor 5 is connected to the adjacent pins through the NMOS tube 4, and the other end of the capacitor 5 is kept suspended after the connection; the wiring step: the other connection positions of the synchronous rectification controller 3 are connected to the capacitor 5 and the pins adjacent to the capacitor 5, and the power tube 2 is connected to the three pins 6 on one side of the base island 1.

[0024] The difference from the existing packaging technology is that the current similar chips all use a split packaging structure, for example, the controller and MOS, capacitors, etc. are separated. This type of chip uses the SOP8 packaging process. The problem caused by this type of packaging process is that it cannot directly replace the Schottky packaged in SM277 and SM10, wasting a lot of manpower and material resources to change the PCB.

[0025] After adopting the packaging process of this solution, various chips are directly integrated into a base island 1, and only the chips are connected, so there is no gap and the connection is reduced. In addition, due to the use of TSSOP-8 packaging technology, the volume of the overall packaging structure is reduced, so that it can be further thinned, and both power and heat dissipation performance are further improved.

[0026] The capacitor 5 is a non-polar capacitor, and draws power from four pins on one side of the base island 1. The capacitor 5 is a non-polar capacitor.

[0027] Using non-polarized capacitors, power is taken from four pins on one side through a synchronous rectification controller 3 without the need for separate packaging.

[0028] A preferred embodiment of the present invention: the three pins on one side of the base island 1 are each provided with five solder joints, and the second solder joint of the middle pin is located on the right side.

[0029] A preferred embodiment of the present invention: the NMOS tube 4 is a 20V-200V NMOS.

[0030] The main structure of the self-powered synchronous rectification chip package includes a base island 1, a power tube 2 and a synchronous rectification controller 3 arranged in the base island 1, four pins (5, 6, 7, 8) are provided on one side of the base island 1, and three pins are provided on the other side, and a capacitor 5 is provided at one end of the three pins, and the capacitor 5 is connected to the adjacent pins through an NMOS tube. The synchronous rectification controller 3 is respectively connected to the power tube 2, the capacitor 5, and the pins adjacent to one side of the capacitor 5, the power tube 2 is also respectively connected to the three pins, and the synchronous rectification controller 3 is also connected to the four output pins led out from one side of the base island 1.

[0031] A preferred embodiment of the present invention is as follows: the capacitor 5 is a self-powered capacitor, which is powered by pin 4 through the synchronous rectification controller 3 .

[0032] A preferred embodiment of the present invention: the NMOS tube 4 is a 20V-200V NMOS.

[0033] A preferred embodiment of the present invention: the three pins on one side of the base island 1 are each provided with five solder joints, and the second solder joint of the middle pin is located on the right side.

[0034] A preferred embodiment of the present invention: the capacitor 5 is a non-polar capacitor.

[0035] The above are only preferred embodiments of the technical solution of the utility model, and do not limit the patent scope of the technical solution of the utility model. All equivalent structural changes made by using the contents of the technical solution description and drawings of the utility model under the conception of the technical solution of the utility model, or direct / indirect application in other related technical fields are included in the patent protection scope of the technical solution of the utility model.

Claims

1. A self-powered synchronous rectification chip, characterized in that: The chip includes A base island, and a power tube and a synchronous rectification controller arranged in the base island, The base island has 4 pins on one side and 3 pins on the other side, and a capacitor is provided at one end of the 3 pins, and the capacitor is connected to the adjacent pins through an NMOS tube. The synchronous rectification controller is respectively connected to the power tube, the capacitor, and the pins located adjacent to one side of the capacitor. The power tube is also respectively connected to 3 pins. The synchronous rectification controller is also connected to 4 output pins led out from one side of the base island.

2. The self-powered synchronous rectification chip according to claim 1, characterized in that: The capacitor is a self-powered capacitor, which draws power from pin 4 through the synchronous rectification controller.

3. The self-powered synchronous rectification chip according to claim 1, characterized in that: The NMOS tube is a 20V-200V NMOS.

4. The self-powered synchronous rectification chip according to claim 1, characterized in that: The three pins on one side of the base island are each provided with five solder joints, and the second solder joint bonding position of the middle pin is on the right side.

5. The self-powered synchronous rectification chip according to claim 1, characterized in that: The capacitor is a non-polar capacitor.