Communication chip test board, test system and verification system
By designing a multi-functional communication chip test board, including mode, fault and communication rate switch modules, the problem of lack of multi-angle verification of chip performance in the early development stage is solved, and a comprehensive test of the communication chip is achieved to ensure the consistency and consistency of the chip. quality and reduced development time.
Patent Information
- Application Number
- CN202420269876.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-02-04
- Publication Date
- 2025-01-14
- Estimated Expiration
- 2034-02-04
AI Technical Summary
The existing technology lacks the performance of communication chips from different angles in the early development stage, which leads to high pressure for later product verification when there are chip problems and extends development time.
Design a communication chip test board, including a mode switch module, a fault switch module and a communication rate switch module. Through these modules, the communication chip under test and the comparison communication chip can be tested respectively under different modes, different faults and different communication rates. level conversion quality.
Through multi-angle testing, the consistency of the communication chip under test and the comparison communication chip is determined, making up for the shortage of physical layer testing and verification of domestic communication chips, reducing potential communication-related problems that may arise from later batch applications, and saving development time.
Smart Images
Figure CN222354013U_ABST
Abstract
Description
Technical Field
[0001] The utility model belongs to the technical field of chip testing, and in particular relates to a communication chip testing board, a testing system and a verification system. Background Art
[0002] As the interface for bus level conversion, the communication chip is the basis of vehicle network communication. Therefore, the quality of the level after the communication chip conversion determines the quality of vehicle network communication. Since the communication chip products used in the vehicle network are of different manufacturers and models, the consistency of the chip level conversion cannot be guaranteed, resulting in the inability to guarantee the quality of vehicle network communication. However, there is currently no relevant technology or system to verify the performance of the communication chip from different angles in the early development stage. If there is a problem with the communication chip, it will lead to verification pressure for later products and extend the development time. Utility Model Content
[0003] The purpose of the utility model is to solve the problem in the prior art that the chip performance is not verified from different angles in the early development stage. If there is a problem with the chip, it will cause verification pressure for later products and extend the development time.
[0004] To solve the above problems, an embodiment of the utility model discloses a communication chip test board, which is used to arrange the communication chip to be tested and the comparison communication chip. The communication chip to be tested and the comparison communication chip respectively have a CAN high end and a CAN low end. Each CAN high end in each communication chip test board is connected to form a CAN high line, and each CAN low end is connected to form a CAN low line.
[0005] The communication chip test board includes: multiple switching switch modules and a controller; each of the multiple switching switch modules is respectively connected to the controller, and the controller is respectively connected to the communication chip to be tested and the comparison communication chip, and the multiple switching switch modules include a mode switching switch module, a fault switching switch module and a communication rate switching switch module; the CAN high end and the CAN low end of the communication chip to be tested or the CAN high end and the CAN low end of the comparison communication chip can be electrically connected to the CAN high line and the CAN low line respectively.
[0006] By adopting the above technical scheme, the communication chip test board includes: a plurality of switching switch modules and a controller; each switching switch module is respectively connected to the controller, and the controller is respectively connected to the communication chip to be tested and the comparison communication chip, and the plurality of switching switch modules include a mode switching switch module, a fault switching switch module and a communication rate switching switch module; the CAN high end and the CAN low end of the communication chip to be tested or the CAN high end and the CAN low end of the comparison communication chip can be electrically connected to the CAN high line and the CAN low line respectively, so that by controlling the mode switching switch module, the fault switching switch module and the communication rate switching switch module, the quality of level conversion of the communication chip to be tested (which can be the domestic communication chip to be tested) and the comparison communication chip (which can be a high-quality communication chip determined abroad) under different modes, different faults, different communication rates and other different angles can be tested respectively, and the consistency of the communication chip to be tested and the comparison communication chip can be further determined, thereby making up for the shortage of physical layer test and verification for domestic communication chips in the past, discovering problems in the early verification stage, reducing potential communication-related problems that may be caused by batch applications, and saving development time.
[0007] According to another specific embodiment of the present invention, in the communication chip test board disclosed in the embodiment of the present invention, the mode switching switch module includes a plurality of mode switching sub-switches arranged in parallel, and each of the plurality of mode switching sub-switches is connected to a controller.
[0008] By adopting the above technical scheme, the modes of the communication chip to be tested and the comparison communication chip that are electrically connected to the CAN high line and the CAN low line can be switched through multiple mode switching sub-switches, so that the quality of the level conversion of the communication chip to be tested and the comparison communication chip in different modes can be tested respectively, and the consistency of the communication chip to be tested and the comparison communication chip in different modes can be further determined.
[0009] According to another specific embodiment of the present invention, in the communication chip test board disclosed in the embodiment of the present invention, the fault switching switch module includes a plurality of fault switching sub-switches arranged in parallel, and each of the plurality of fault switching sub-switches is connected to a controller.
[0010] By adopting the above technical scheme, the input faults of the communication chip under test and the comparison communication chip that are electrically connected to the CAN high line and the CAN low line can be switched through multiple fault switching sub-switches, so that the quality of the level conversion of the communication chip under test and the comparison communication chip under different fault inputs, as well as the consistency of the communication chip under test and the comparison communication chip under different fault inputs can be tested respectively.
[0011] According to another specific embodiment of the present invention, the communication chip test board disclosed in the embodiment of the present invention, the communication rate switching switch module includes at least two communication rate switching sub-switches arranged in parallel, and each of the at least two communication rate switching sub-switches is connected to the controller.
[0012] By adopting the above technical scheme, the communication rates of the communication chip to be tested and the comparison communication chip that are electrically connected to the CAN high line and the CAN low line can be switched through at least two communication rate switching sub-switches, so that the quality of the level conversion of the communication chip to be tested and the comparison communication chip at at least two communication rates can be tested respectively, as well as the consistency of the communication chip to be tested and the comparison communication chip at at least two different communication rates.
[0013] According to another specific embodiment of the present utility model, in the communication chip test board disclosed in the embodiment of the present utility model, each mode switching sub-switch, each fault switching sub-switch, and each communication rate switching sub-switch are buttons.
[0014] By adopting the above technical solution, all switching sub-switches are buttons, and the button operation is convenient and simple.
[0015] According to another specific embodiment of the present invention, the communication chip test board disclosed in the embodiment of the present invention further includes a plurality of status indicator lights for displaying the mode, fault and communication rate corresponding to the communication chip to be tested or the comparison communication chip.
[0016] By adopting the above technical solution, corresponding display states can be set through multiple status indicator lights to display corresponding faults, corresponding modes, and corresponding rates. This can also more intuitively display whether the mode of the communication chip to be tested or the comparison communication chip is switched successfully, whether the fault is input successfully, and whether the communication rate is switched successfully.
[0017] According to another specific embodiment of the utility model, the communication chip test board disclosed in the embodiment of the utility model is provided with switches between the CAN high end of the communication chip to be tested and the CAN high line, between the CAN low end of the communication chip to be tested and the CAN low line, between the CAN high end of the comparison communication chip and the CAN high line, and between the CAN low end of the comparison communication chip and the CAN low line.
[0018] By adopting the above technical scheme, by setting the above switch, it is more convenient to make one of the communication chip to be tested and the comparison communication chip electrically connected to the CAN high line and the CAN low line respectively, and the other communication chip disconnected from the CAN high line and the CAN low line respectively, so that the quality of the level conversion of the chip electrically connected to the CAN high line and the CAN low line under different modes, different faults and different communication rates can be tested, and the consistency of the communication chip to be tested and the comparison communication chip can be further determined.
[0019] The utility model also provides a communication chip testing system, comprising: a plurality of the above-mentioned communication chip testing boards, each CAN high-order end in each communication chip testing board is connected to form a CAN high-order line, and each CAN low-order end is connected to form a CAN low-order line; the CAN high-order end and CAN low-order end of the communication chip to be tested or the CAN high-order end and CAN low-order end of the comparison communication chip in each communication chip testing board can be electrically connected to the CAN high-order line and the CAN low-order line respectively.
[0020] By adopting the above technical scheme, one of the communication chips to be tested and the comparison communication chip on each communication chip test board in the communication chip test system can be electrically connected to the CAN high line and the CAN low line respectively, and the quality of level conversion of multiple communication chips to be tested and multiple comparison communication chips that are electrically connected to the CAN high line and the CAN low line respectively under different modes, different faults, different communication rates and other different angles can be tested simultaneously, and the consistency of multiple communication chips to be tested and multiple comparison communication chips that are electrically connected to the CAN high line and the CAN low line at the same time can be further determined.
[0021] The utility model also provides a communication chip verification system, comprising: a host computer, a power supply, an oscilloscope and a test device, and the above-mentioned communication chip test system; wherein the host computer is respectively connected to the power supply, the oscilloscope and the test device, the power supply is connected to the communication chip test system, and the oscilloscope and the test device are both connected to the CAN high line and the CAN low line of the communication chip test system.
[0022] By adopting the above technical scheme, the communication chip test system can be powered by the power supply, the oscilloscope can be used to observe the waveforms of the communication chip to be tested and the comparison communication chip that are electrically connected to the CAN high line and the CAN low line in the communication chip verification system, and the test equipment can be used to observe the communication of the communication chip to be tested and the comparison communication chip that are electrically connected to the CAN high line and the CAN low line in the communication chip verification system.
[0023] According to another specific embodiment of the utility model, in a communication chip verification system disclosed in the embodiment of the utility model, a plurality of high-order line sampling points are arranged on the CAN high-order line, and a plurality of low-order line sampling points are arranged on the CAN low-order line, the same number as the plurality of high-order line sampling points and corresponding one to one, and an oscilloscope and a test device can be connected to one high-order line sampling point and a corresponding low-order line sampling point of the plurality of high-order line sampling points at a time.
[0024] By adopting the above technical solution, a plurality of high-order line sampling points are set on the CAN high-order line, and a plurality of low-order line sampling points are set on the CAN low-order line. The oscilloscope and the test equipment can be connected to a high-order line sampling point and a corresponding low-order line sampling point each time. After multiple times, the accuracy of the test can be improved.
[0025] The beneficial effects of the utility model are:
[0026] By adopting the communication chip test board, test system and verification system provided by the utility model, the communication chip test board can respectively test the quality of level conversion of the communication chip to be tested, such as domestic communication chips, and comparison communication chips, such as high-quality communication chips determined abroad, which are electrically conductive with the CAN high-order line and the CAN low-order line, under different modes, different faults, different communication rates and other different angles through the control mode switching switch module, the fault switching switch module and the communication rate switching switch module, and further determine the consistency of the two, thereby making up for the shortage of physical layer testing and verification of domestic communication chips, discovering problems in the early verification stage, reducing potential communication-related problems that may be caused by batch applications, and saving development time. BRIEF DESCRIPTION OF THE DRAWINGS
[0027] Figure 1 It is a structural schematic diagram of a communication chip test board provided in Example 1 of the utility model;
[0028] Figure 2 It is a structural schematic diagram of a communication chip testing system provided by Embodiment 2 of the present utility model;
[0029] Figure 3 It is a structural block diagram of the communication chip verification system provided in Example 3 of the present utility model.
[0030] Description of reference numerals:
[0031] 10: Communication chip test board; 100: Controller; 200: Mode switching switch module; 300: Fault switching switch module; 400: Communication rate switching switch module; 500: Status indicator light; 20: Communication chip to be tested; 30: Comparison communication chip; 40: CAN high line; 50: CAN low line; 60: Host computer; 70: Power supply; 80: Oscilloscope; 90: Test equipment; T: CAN high end; L: CAN low end. DETAILED DESCRIPTION
[0032] Example 1
[0033] In order to solve the problem in the prior art that chip performance is not verified from different angles in the early development stage, and if there is a problem with the chip, it will lead to verification pressure of later products and extend the development time, the utility model provides a communication chip test board, which can respectively test the quality of level conversion of the communication chip to be tested and the comparison communication chip under different modes, different faults and communication rates and other different angles, and further determine the consistency of the communication chip to be tested and the comparison communication chip.
[0034] Next, refer to the attached Figure 1 , the structure and advantages of the communication chip test board 10 provided by the utility model are described in detail.
[0035] like Figure 1 As shown, the communication chip test board 10 provided by the utility model is used to arrange the communication chip to be tested 20 and the comparison communication chip 30. The communication chip to be tested 20 and the comparison communication chip 30 respectively have a CAN high terminal T and a CAN low terminal L. Each CAN high terminal T in each communication chip test board 10 is connected to form a CAN high line 40, and each CAN low terminal L is connected to form a CAN low line 50. In this embodiment, the comparison communication chip 30 is specifically a chip that has passed the test.
[0036] The communication chip test board 10 provided by the utility model includes: multiple switching switch modules and a controller 100; each of the multiple switching switch modules is respectively connected to the controller 100, and the controller 100 is respectively connected to the communication chip 20 to be tested and the comparison communication chip 30 arranged on the communication chip test board 10; the CAN high end T and the CAN low end L of the communication chip 20 to be tested or the CAN high end T and the CAN low end L of the comparison communication chip 30 can be electrically connected to the CAN high line 40 and the CAN low line 50 respectively.
[0037] That is to say, in this embodiment, during the test, the communication chip to be tested 20 and the comparison communication chip 30 need to be arranged on the communication chip test board 10 first. Then, the CAN high-order end T and the CAN low-order end L of one of the communication chips to be tested 20 and the comparison communication chip 30 are electrically connected to the CAN high-order line 40 and the CAN low-order line 50, respectively, and the CAN high-order end T and the CAN low-order end L of the other communication chip are disconnected from the CAN high-order line 40 and the CAN low-order line 50, respectively. Then, the quality of the level conversion of the communication chip electrically connected to the CAN high-order line 40 and the CAN low-order line 50 can be tested. Afterwards, only the CAN high-order end T and the CAN low-order end L of the other communication chip to be tested 20 and the comparison communication chip 30 can be electrically connected to the CAN high-order line 40 and the CAN low-order line 50, respectively, and the quality of their level conversion can be tested accordingly. The consistency of the communication chip to be tested 20 and the comparison communication chip 30 can be determined based on the results of the two tests.
[0038] Further, the plurality of switching switch modules include a mode switching switch module 200, a fault switching switch module 300, and a communication rate switching switch module 400, and the mode switching switch module 200, the fault switching switch module 300, and the communication rate switching switch module 400 are respectively connected to the controller 100. The mode switching switch module 200 can be used to switch the mode of the communication chip through the controller 100, the fault switching switch module 300 can be used to switch the input fault of the communication chip through the controller 100, and the communication rate switching switch module 400 can be used to switch the communication rate of the communication chip through the controller 100.
[0039] In this embodiment, the controller 100 stores programs that can output different communication chip modes, different input faults, and different communication rates. The mode switching switch module 200, the fault switching switch module 300, and the communication rate switching switch module 400 can respectively switch the communication chip mode, input fault, and communication rate through the controller 100. It should be noted that the programs for different communication chip modes stored in the controller 100 are common programs in the art, the programs for different input faults stored are common programs in the art, and the programs for different communication rates stored are also common programs in the art. The controller 100 can specifically be a microcontroller unit (MCU), referred to as a single-chip microcomputer.
[0040] In a specific embodiment, Figure 1 As shown, the mode switching switch module 200 includes a plurality of mode switching sub-switches arranged in parallel, and each of the plurality of mode switching sub-switches is connected to the controller 100 .
[0041] In the art, the modes of a communication chip are generally divided into three types, namely, normal mode, standby mode and sleep mode, also known as Normal mode, Standby mode and Sleep mode. The multiple mode switching sub-switches may specifically include a normal mode switching sub-switch, a standby mode switching sub-switch and a sleep mode switching sub-switch. One mode switching sub-switch can control one mode of the communication chip, which is convenient and simple to operate. If the number of modes of the communication chip is not limited to three, the number of the multiple mode switching sub-switches may also be set to two, such as two, according to the mode of the communication chip by a person skilled in the art. Figure 1 Four, five, or even more are shown.
[0042] In a specific implementation, the fault switching switch module 300 includes a plurality of fault switching sub-switches arranged in parallel, and each of the plurality of fault switching sub-switches is connected to the controller 100 .
[0043] In this field, the faults of the communication chip include a short circuit fault of both the CAN high line 40 and the CAN low line 50, a circuit break fault of both the CAN high line 40 and the CAN low line 50, a short circuit fault of the CAN high line 40, and a short circuit fault of the CAN low line 50. The multiple fault switching sub-switches may specifically include switching sub-switches corresponding to the above faults. A single fault switching sub-switch may control a single fault input of the communication chip, or a combination of multiple fault switching sub-switches may control multiple fault inputs of the communication chip. Therefore, the multiple fault switching sub-switches need to be set according to the actual situation, and this embodiment does not specifically limit this.
[0044] In a specific implementation, the communication rate switching switch module 400 includes at least two communication rate switching sub-switches arranged in parallel, and each of the at least two communication rate switching sub-switches is connected to the controller 100 .
[0045] In the art, communication rates generally include 2Mbp / s and 5Mbp / s, and the at least two communication rate switching sub-switches may specifically include a 2Mbp / s switching sub-switch and a 5Mbp / s switching sub-switch. One mode switching sub-switch can control one communication rate of the communication chip, which is convenient and simple to operate, and can test the quality of level conversion of the communication chip 20 to be tested or the comparison communication chip 30 at a communication rate of 2Mbp / s and a communication rate of 5Mbp / s, and the consistency of the communication chip 20 to be tested and the comparison communication chip 30 at different communication rates.
[0046] In a specific implementation, each mode switching sub-switch, each fault switching sub-switch, and each communication rate switching sub-switch is a button, and button operation is convenient and simple.
[0047] In a specific implementation, the communication chip test board 10 further includes a plurality of status indicator lights 500 for displaying the mode, fault, and communication rate corresponding to the communication chip 20 to be tested or the comparison communication chip 30 .
[0048] In the art, each of the multiple status indicator lights 500 can display different colors and have different lighting frequencies, and the specific number of the multiple status indicator lights 500 is not specifically limited in this embodiment, and can be specifically as follows: Figure 1 The four shown may also be two, three, five, or even more. A variety of display states can be formed by lighting the status indicator lights 500 in different colors and numbers, or at different lighting frequencies. One display state can represent a unique corresponding fault, a corresponding mode, and a corresponding rate. For example, in normal mode, the status indicator light 500 is always on, and different faults are represented by lighting frequencies. This can more intuitively display whether the mode is switched successfully, whether the fault is input successfully, and whether the communication rate is switched successfully.
[0049] In a specific embodiment, Figure 1 As shown, switches are respectively provided between the CAN high-order terminal T of the communication chip 20 to be tested and the CAN high-order line 40, between the CAN low-order terminal L of the communication chip 20 to be tested and the CAN low-order line 50, between the CAN high-order terminal T of the comparison communication chip 30 and the CAN high-order line 40, and between the CAN low-order terminal L of the comparison communication chip 30 and the CAN low-order line 50.
[0050] By setting the above switch, it is more convenient to make one of the communication chip to be tested 20 and the comparison communication chip 30 electrically connected to the CAN high line 40 and the CAN low line 50, and the other communication chip disconnected from the CAN high line 40 and the CAN low line 50, so as to test the communication chip electrically connected to the CAN high line 40 and the CAN low line 50. If another communication chip is to be tested, the other communication chip can be tested by switching the above corresponding switch.
[0051] Through the above-mentioned communication chip test board 10, the quality of level conversion of the communication chip to be tested 20 and the comparison communication chip 30 electrically connected to the CAN high line 40 and the CAN low line 50 under different modes, different faults, different communication rates and other different angles can be tested respectively, and the consistency of the communication chip to be tested 20 and the comparison communication chip 30 can be further determined.
[0052] Example 2
[0053] like Figure 2As shown, the utility model also provides a communication chip testing system, including: a plurality of communication chip testing boards 10 in Embodiment 1, each CAN high-order end T in each communication chip testing board 10 is connected to form a CAN high-order line 40, and each CAN low-order end L is connected to form a CAN low-order line 50; the CAN high-order end T and the CAN low-order end L of the communication chip 20 to be tested or the CAN high-order end T and the CAN low-order end L of the comparison communication chip 30 in each communication chip testing board 10 can be electrically connected to the CAN high-order line 40 and the CAN low-order line 50, respectively.
[0054] During the test, only one of the communication chips to be tested 20 and the comparison communication chips 30 in each communication chip test board 10 can be electrically connected to the CAN high line 40 and the CAN low line 50, and the other can be disconnected from the CAN high line 40 and the CAN low line 50. During a test, in the communication chip test system, multiple communication chip test boards 10 can all be electrically connected to the CAN high line 40 and the CAN low line 50 with the communication chips to be tested 20, or all can be electrically connected to the CAN high line 40 and the CAN low line 50 with the comparison communication chips 30, or some of the communication chips to be tested 20 and some of the comparison communication chips 30 can be electrically connected to the CAN high line 40 and the CAN low line 50. The specific configuration can be made by those skilled in the art according to the actual situation.
[0055] By adopting the above technical scheme, the quality of level conversion of multiple communication chips 20 to be tested and multiple comparison communication chips 30 that are electrically connected to the CAN high line 40 and the CAN low line 50 respectively under different modes, different faults, different communication rates and other different angles can be tested simultaneously, and the consistency of multiple communication chips 20 to be tested and multiple comparison communication chips 30 that are electrically connected to the CAN high line 40 and the CAN low line 50 respectively can be further determined.
[0056] It should be noted that the communication chips 20 to be tested on the multiple communication chip test boards 10 in the communication chip test system can be the same type of communication chips, in which case the communication chip test system is referred to as a "homogeneous" system; they can also be different types of communication chips, in which case the communication chip test system is referred to as a "heterogeneous" system. The "homogeneous" system and the "heterogeneous" system can realize the level conversion verification of the communication chip in different scenarios by adjusting the input variables, and the input variables include the length of the main wiring harness connected in the system, the length of the branch wiring harness connected, the layout position of the communication chip on the communication chip test board 10, and the number of communication chips.
[0057] The number of communication chip test boards 10 in the communication chip test system and the number of communication chips 20 to be tested and comparison communication chips 30 electrically connected to the CAN high line 40 and the CAN low line 50 can be set by those skilled in the art based on experience. For example, 16 communication chip test boards 10 can be set at a communication rate of 2Mbp / s, and 16 communication chips are electrically connected to the CAN high line 40 and the CAN low line 50, including 12 comparison communication chips 30 and 4 communication chips 20 to be tested; 8 communication chip test boards 10 can be set at a communication rate of 5Mbp / s, that is, 8 communication chips can be connected, including 6 comparison communication chips 30 and 2 communication chips 20 to be tested. The positions of communication chips in the communication chip test system can be as follows: Figure 2 The length between two adjacent communication chips can be adjusted according to the test requirements, and the adjustment range is 0.5m to 2m.
[0058] The communication rate switching button can be used to switch the communication rate of the communication chip, so as to verify the performance of the communication chip at different communication rates. The communication chip can be switched to switch channels. The communication chip 20 to be tested and the comparison communication chip 30 are placed in two different verification channels respectively, and the switching is achieved through the above switch, and the communication quality is compared. The fault type of the current communication chip is judged by the status indicator 500, and the three modes of Normal / Standby / Sleep of the communication chip are switched through the mode switching button. After all devices are connected, the programmable power supply can be turned on, and the observation equipment oscilloscope, data recorder, etc. can be connected to observe the quality of the level conversion of the communication chip 20 to be tested under different conditions.
[0059] Example 3
[0060] like Figure 3 As shown, the utility model also provides a communication chip verification system, including: a host computer 60, a power supply 70, an oscilloscope 80 and a test device 90, and the communication chip test system in Example 2; wherein the host computer 60 is connected to the power supply 70, the oscilloscope 80 and the test device 90 respectively, the power supply 70 is connected to the communication chip test system, and the oscilloscope 80 and the test device 90 are both connected to the CAN high line 40 and the CAN low line 50 of the communication chip test system.
[0061] In this embodiment, the host computer 60 may be a computer. The communication chip test system may be powered by a power supply 70, which may be a programmable power supply. The oscilloscope 80 is used to observe the waveforms of the communication chip 20 to be tested and the comparison communication chip 30 that are electrically connected to the CAN high line 40 and the CAN low line 50 in the communication chip verification system. The test equipment 90 may be a CAN test tool, such as VH6501, which is used for observing the communication of the communication chip 20 to be tested and the comparison communication chip 30 that are electrically connected to the CAN high line 40 and the CAN low line 50 in the communication chip verification system.
[0062] In a specific embodiment, a plurality of high-order line sampling points are provided on the CAN high-order line 40, and a plurality of low-order line sampling points which are the same in number and correspond one to one to the plurality of high-order line sampling points are provided on the CAN low-order line 50. The oscilloscope 80 and the test equipment 90 can be connected to one of the plurality of high-order line sampling points and a corresponding low-order line sampling point at a time, and the accuracy of the test can be improved after multiple times.
[0063] A high-bit line sampling point and a corresponding low-bit line sampling point form a group of test sampling points. In the communication chip verification system, the level conversion quality of each group of test sampling points should be consistent in principle. In order to improve the accuracy of the test, multiple groups of test sampling points can be set. For example, Figure 3 As shown, four groups of test sampling points can be set, namely, group A test sampling points, group B test sampling points, group C test sampling points and group D test sampling points for testing. When the oscilloscope 80 is sampling, the probes need to be connected to the high-bit line sampling points and the low-bit line sampling points of the four groups of test sampling points respectively to observe the dominant bit voltage, recessive bit voltage, level rising edge, falling edge time, bit time, bit symmetry, ringing size, etc.
[0064] The dominant bit voltage, recessive bit voltage, level rising edge, falling edge time, bit time, bit symmetry, ringing size, etc. of the CAN high-bit terminal T and the CAN low-bit terminal L of the communication chip 20 to be tested can be observed by the oscilloscope 80, and the communication chip 20 to be tested can be judged whether it meets the design requirements by referring to international standards and enterprise standards and comparing with other mature comparative communication chips 30. When any of the above parameters do not meet the design requirements, it means that the consistency of the current communication chip 20 to be tested under the communication chip verification system is poor. Generally, a single communication chip 20 to be tested generally meets the requirements when tested for the above parameters, but when the communication chip 20 to be tested is placed in a system composed of multiple comparative communication chips 30, the above parameters may not meet the requirements or perform poorly relative to other comparative communication chips 30, so the communication chip 20 to be tested with poor performance is considered to have failed the consistency test.
[0065] The above is an explanation of the implementation mode of the present invention by specific specific embodiments. Those skilled in the art can easily understand other advantages and functions of the present invention from the contents disclosed in this specification. Although the description of the present invention will be introduced in conjunction with the preferred embodiment, this does not mean that the features of this utility model are limited to this implementation mode. On the contrary, the purpose of introducing the utility model in conjunction with the implementation mode is to cover other options or modifications that may be extended based on the claims of the present utility model. In order to provide a deep understanding of the present utility model, the above description will include many specific details. The present utility model can also be implemented without using these details. In addition, in order to avoid confusion or blurring the focus of the present utility model, some specific details will be omitted in the description. It should be noted that, in the absence of conflict, the embodiments in the present utility model and the features in the embodiments can be combined with each other.
[0066] It should be noted that in this specification, similar reference numerals and letters denote similar items in the above-mentioned drawings, and therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings.
[0067] The orientation or position relationship indicated by the terms "upper", "lower", "inner", "bottom", etc. is based on the orientation or position relationship shown in the drawings, or is the orientation or position relationship in which the utility model product is usually placed when used. It is only for the convenience of describing the utility model and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the utility model.
[0068] The terms “first”, “second”, etc. are only used for distinguishing descriptions and should not be understood as indicating or implying relative importance.
[0069] In the description of this embodiment, it is also necessary to explain that, unless otherwise clearly specified and limited, the terms "set", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in this embodiment can be understood according to specific circumstances.
[0070] Although the present invention has been illustrated and described with reference to certain preferred embodiments of the present invention, it should be understood by those skilled in the art that the above contents are further detailed descriptions of the present invention in combination with specific embodiments, and it cannot be determined that the specific implementation of the present invention is limited to these descriptions. Those skilled in the art may make various changes in form and details, including making several simple deductions or substitutions, without departing from the spirit and scope of the present invention.
Claims
1. A communication chip test board, used for arranging a communication chip to be tested and a comparison communication chip, wherein the communication chip to be tested and the comparison communication chip respectively have a CAN high-order end and a CAN low-order end, each of the CAN high-order ends in each of the communication chip test boards is connected to form a CAN high-order line, and each of the CAN low-order ends is connected to form a CAN low-order line; characterized in that: The communication chip test board includes: a plurality of switching modules and a controller; Each of the plurality of switch modules is respectively connected to the controller, the controller is respectively connected to the communication chip to be tested and the comparison communication chip, and the plurality of switch modules include a mode switch module, a fault switch module and a communication rate switch module; The CAN high-order end and the CAN low-order end of the communication chip to be tested or the CAN high-order end and the CAN low-order end of the comparison communication chip can be electrically connected to the CAN high-order line and the CAN low-order line respectively.
2. The communication chip test board as claimed in claim 1, characterized in that: The mode switching switch module includes a plurality of mode switching sub-switches arranged in parallel, and each of the plurality of mode switching sub-switches is connected to the controller.
3. The communication chip test board as claimed in claim 2, characterized in that: The fault switching switch module includes a plurality of fault switching sub-switches arranged in parallel, and each of the plurality of fault switching sub-switches is connected to the controller.
4. The communication chip test board as claimed in claim 3, characterized in that: The communication rate switching switch module includes at least two communication rate switching sub-switches arranged in parallel, and each of the at least two communication rate switching sub-switches is connected to the controller.
5. The communication chip test board as claimed in claim 4, characterized in that: Each of the mode switching sub-switch, each of the fault switching sub-switch, and each of the communication rate switching sub-switch is a button.
6. The communication chip test board as claimed in claim 5, characterized in that: The communication chip test board also includes a plurality of status indicator lights for displaying the mode, fault and communication rate corresponding to the communication chip to be tested or the comparison communication chip.
7. The communication chip test board according to any one of claims 1 to 6, characterized in that: Switches are respectively provided between the CAN high end of the communication chip to be tested and the CAN high line, between the CAN low end of the communication chip to be tested and the CAN low line, between the CAN high end of the comparison communication chip and the CAN high line, and between the CAN low end of the comparison communication chip and the CAN low line.
8. A communication chip testing system, characterized in that: include: A plurality of communication chip test boards as described in any one of claims 1 to 7, wherein each of the CAN high ends in each of the communication chip test boards is connected to form the CAN high line, and each of the CAN low ends is connected to form the CAN low line; the CAN high end and the CAN low end of the communication chip to be tested or the CAN high end and the CAN low end of the comparison communication chip in each of the communication chip test boards can be electrically connected to the CAN high line and the CAN low line, respectively.
9. A communication chip verification system, characterized in that: include: A host computer, a power supply, an oscilloscope and a test device, and a communication chip test system as claimed in claim 8; wherein, The host computer is connected to the power supply, the oscilloscope and the test equipment respectively, the power supply is connected to the communication chip test system, and the oscilloscope and the test equipment are both connected to the CAN high line and CAN low line of the communication chip test system.
10. The communication chip verification system according to claim 9, characterized in that: The CAN high-order line is provided with a plurality of high-order line sampling points, and the CAN low-order line is provided with a plurality of low-order line sampling points which are the same in number and correspond one to one with the plurality of high-order line sampling points. The oscilloscope and the test equipment can be connected to one of the plurality of high-order line sampling points and a corresponding one of the low-order line sampling points at a time.