Variable range flow chip

By using multiple sets of thermal resistance cross-series and parallel structures and laser ablation technology on the flow chip, the central heat source resistance is adjusted, and the problem of difficulty in measuring range adjustment in the existing technology is solved, and the multi-range testing capability of a single chip is realized, which improves the Flexibility and applicability.

CN222364613UActive Publication Date: 2025-01-17WUXI SENCOCH SEMICON CO LTD
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Patent Information

Application Number
CN202420870134.8
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-04-25
Publication Date
2025-01-17
Estimated Expiration
2034-04-25

AI Technical Summary

Technical Problem

Due to size limitations, existing flow chips are difficult to adjust the range and cannot meet the needs of different application scenarios, which increases the design complexity and flexibility limitations.

Method used

The variable-range flow chip is designed, and multiple sets of thermal resistance cross-series and parallel structures and laser ablation technology are used to adjust the resistance combination of the central heat source to realize flow measurements of different ranges to meet the multi-range test needs.

Benefits of technology

It realizes the multi-range testing capability of a single chip, meets the measurement needs of different ranges, improves flexibility and applicability, and adjusts the thermal resistance structure through laser ablation to achieve accurate measurement of different ranges.

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Abstract

The utility model relates to a variable range flow chip. The light emitting diode comprises a substrate; a supporting structure layer; a first insulating layer; the lower thermopile and the central heat source are respectively arranged on the first insulating layer; the upper thermopile of the second insulating layer is arranged on the second insulating layer; a third insulating layer; connecting a wire structure; the upstream temperature measuring element thermopile lower-layer thermocouple and the upstream temperature measuring element thermopile upper-layer thermocouple form an upstream temperature measuring element thermopile; the downstream temperature measuring element thermopile lower-layer thermocouple and the downstream temperature measuring element thermopile upper-layer thermocouple form a downstream temperature measuring element thermopile; the plurality of groups of central heat sources are arranged side by side along the longitudinal direction of the chip; a plurality of groups of thermopile temperature measuring elements are arranged and are symmetrically distributed along the transverse symmetrical section of the chip, and each group of thermopile temperature measuring elements comprises a plurality of rows of upstream temperature measuring element thermopiles and a plurality of corresponding rows of downstream temperature measuring element thermopiles. According to the utility model, flow measurement with different measuring ranges is realized.
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Description

Technical Field

[0001] The utility model relates to the technical field of flow sensors, in particular to a variable range flow chip. Background Art

[0002] Thermal flow sensors use the thermal sensing effect to measure gas and liquid flow, and are composed of hot wire sensors, compensation circuits, temperature compensation circuits, and operational amplifiers. They are widely used in industrial automation, air conditioning, automotive industry, medical equipment, and robotics due to their high precision, fast response, and minimal impact on the medium.

[0003] However, due to the limitation of chip size, it is difficult to adjust the range of existing flow chips inside the chip. Therefore, existing flow chips can usually only provide a fixed range and cannot meet the requirements of different application scenarios for different ranges. This limitation increases the complexity of design and implementation, which needs to be compensated by external circuit and flow channel structure design, limiting its flexibility and applicability. Summary of the invention

[0004] To this end, the utility model provides a variable range flow chip to achieve multi-range testing of a single chip and meet measurement requirements of different ranges.

[0005] In order to solve the above technical problems, the utility model provides a variable range flow chip, comprising:

[0006] substrate;

[0007] A supporting structure layer is arranged on the surface of the substrate;

[0008] A first insulating layer, disposed on the supporting structure layer;

[0009] The lower thermopile and the central heat source are respectively arranged on the first insulating layer; wherein the lower thermopile includes a lower thermocouple of an upstream temperature measuring element thermopile and a lower thermocouple of a downstream temperature measuring element thermopile, and each group of the central heat source includes an upstream heating element heat source thermocouple, a central heating element heat source thermocouple and a downstream heating element heat source thermocouple sequentially arranged in the transverse direction;

[0010] a second insulating layer, covering the lower thermopile and each of the central heat sources;

[0011] An upper thermopile is disposed on the second insulating layer, and the upper thermopile includes an upper thermocouple of an upstream temperature measuring element thermopile and an upper thermocouple of a downstream temperature measuring element thermopile;

[0012] a third insulating layer, covering the upper thermopile;

[0013] A connecting wire structure, penetrating the third insulating layer, to respectively realize the connection between the lower thermopile and the upper thermopile and the connection of the central heat source;

[0014] The thermocouple of the lower layer of the upstream temperature measuring element thermopile and the thermocouple of the upper layer of the upstream temperature measuring element thermopile constitute the upstream temperature measuring element thermopile; the thermocouple of the lower layer of the downstream temperature measuring element thermopile and the thermocouple of the upper layer of the downstream temperature measuring element thermopile constitute the downstream temperature measuring element thermopile;

[0015] A plurality of groups of central heat sources are arranged side by side along the longitudinal direction of the chip;

[0016] A plurality of groups of thermopile temperature measuring elements are provided and symmetrically distributed along the transverse symmetrical section of the chip, and each group of thermopile temperature measuring elements includes a plurality of rows of upstream temperature measuring element thermopiles and a corresponding plurality of rows of downstream temperature measuring element thermopiles.

[0017] In one embodiment of the present utility model, the central heat source and the thermopile temperature measuring elements are respectively provided in three groups.

[0018] In one embodiment of the present invention, in each group of the thermopile temperature measuring elements, two adjacent groups of the upstream temperature measuring element thermopile and two adjacent groups of the downstream temperature measuring element thermopile are connected via wires.

[0019] In one embodiment of the utility model, the transverse symmetry axis of the chip passes through the central heat source located in the middle, and the upstream heating element heat source thermocouple, the central heating element heat source thermocouple and the downstream heating element heat source thermocouple in each group of the central heat source are arranged in sequence along the transverse direction, thereby correspondingly constituting an upstream heating resistor R1, an upstream heating resistor R2, an upstream heating resistor R3, a central heating resistor R4, a central heating resistor R5, a central heating resistor R6, a downstream heating resistor R7, a downstream heating resistor R8 and a downstream heating resistor R9, and the upstream heating resistor R1, the upstream heating resistor R2, the upstream heating resistor R3, the central heating resistor R4, the central heating resistor R5, the central heating resistor R6, the downstream heating resistor R7, the downstream heating resistor R8 and the downstream heating resistor R9 are connected in series and / or in parallel.

[0020] In one embodiment of the utility model, all of the thermopile temperature measuring elements include an upstream heating resistor R1 supporting a positive electrode of a thermopile temperature measuring element, an upstream heating resistor R1 supporting a negative electrode of a thermopile temperature measuring element, an upstream heating resistor R2 supporting a positive electrode of a thermopile temperature measuring element, an upstream heating resistor R2 supporting a negative electrode of a thermopile temperature measuring element, an upstream heating resistor R3 supporting a positive electrode of a thermopile temperature measuring element, an upstream heating resistor R3 supporting a negative electrode of a thermopile temperature measuring element, a downstream heating resistor R7 supporting a positive electrode of a thermopile temperature measuring element, a downstream heating resistor R7 supporting a negative electrode of a thermopile temperature measuring element, a downstream heating resistor R8 supporting a positive electrode of a thermopile temperature measuring element, a downstream heating resistor R8 supporting a negative electrode of a thermopile temperature measuring element, a downstream heating resistor R9 supporting a positive electrode of a thermopile temperature measuring element, and a downstream heating resistor R9 supporting a negative electrode of a thermopile temperature measuring element;

[0021] The central heat source comprises a central heating element heat source wire symmetrically arranged along the transverse symmetry axis of the chip to heat the positive electrode and a central heating element heat source wire to heat the negative electrode.

[0022] In one embodiment of the utility model, the resistance values ​​of the upstream heating resistor R1, the upstream heating resistor R2, the upstream heating resistor R3, the central heating resistor R4, the central heating resistor R5, the central heating resistor R6, the downstream heating resistor R7, the downstream heating resistor R8 and the downstream heating resistor R9 are not completely equal.

[0023] In one embodiment of the utility model, the connecting wire structure includes an upstream temperature measuring element thermopile cold end connecting wire structure connected to the lower thermocouple of the upstream temperature measuring element thermopile, an upstream temperature measuring element thermopile hot end connecting wire structure connected between the lower thermocouple of the upstream temperature measuring element thermopile and the upper thermocouple of the upstream temperature measuring element thermopile, a downstream temperature measuring element thermopile cold end connecting wire structure connected to the lower thermocouple of the downstream temperature measuring element thermopile, a downstream temperature measuring element thermopile hot end connecting wire structure connected between the lower thermocouple of the downstream temperature measuring element thermopile and the upper thermocouple of the downstream temperature measuring element thermopile, an upstream heating element heat source connecting wire structure connected to the upstream heating element heat source thermocouple, a central heating element heat source connecting wire structure connected to the central heating element heat source thermocouple, and a downstream heating element heat source connecting wire structure connected to the downstream heating element heat source thermocouple.

[0024] In one embodiment of the present invention, a silicon nitride passivation layer is provided on the surface of the third insulating layer.

[0025] In one embodiment of the present invention, the support structure layer includes a first silicon oxide support layer, a silicon nitride support layer and a second silicon oxide support layer which are sequentially arranged on the surface of the substrate.

[0026] In one embodiment of the present invention, the thickness of the first silicon oxide support layer is 0.1-10 μm; the thickness of the silicon nitride support layer is 0.01-0.08 μm; and the thickness of the second silicon oxide support layer is 1-3 μm.

[0027] The above technical solution of the utility model has the following advantages compared with the prior art:

[0028] The variable range flow chip described in the utility model designs the central heat source into a "non" structure and adopts a combination of thermal resistors of various lengths so that the spacing between the central heating resistor element and the temperature measuring element is different, thereby achieving flow measurement requirements of different ranges. In order to further expand the possibility of range measurement, a cross-series and parallel design of multiple groups of thermal resistors is adopted, and the series-parallel structure is adjusted in combination with laser ablation, thereby realizing multi-range testing of a single chip and meeting measurement requirements of different ranges. At the same time, the multiple groups of thermal resistors working with the central heat source are also used for measurements of different ranges, and the remaining thermal resistors disconnected by laser ablation and their corresponding temperature measuring thermopiles can be used to monitor the ambient temperature and serve as a control group to eliminate background interference factors. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] In order to make the content of the utility model more clearly understood, the utility model is further described in detail below based on specific embodiments of the utility model in combination with the accompanying drawings.

[0030] Figure 1 It is a schematic diagram of the overall structure of the utility model.

[0031] Figure 2 It is a schematic diagram of the chip structure from a top view of the utility model.

[0032] Figure 3 It is a schematic diagram of three groups of thermopile temperature measuring elements of the utility model.

[0033] Figure 4 It is a schematic diagram of a thermopile temperature measuring element of the utility model.

[0034] Figure 5 It is the equivalent original diagram of the range-adjustable circuit of the utility model.

[0035] Figure 6 It is a schematic diagram of the structure of the utility model in which upstream, central and downstream heat source resistors are connected in parallel.

[0036] Figure 7 It is a structural schematic diagram of the parallel structure of the upstream, central and downstream heat source resistors after abandoning part of the central heat source resistor of the utility model.

[0037] Figure 8It is a schematic diagram of the parallel structure of the upstream, central and downstream heat source resistors after some upstream and downstream heat source resistors are discarded in the utility model.

[0038] Description of the Figures in the Specification:

[0039] 1. Substrate;

[0040] 2. A first silicon oxide support layer;

[0041] 3. Silicon nitride support layer;

[0042] 4. A second silicon oxide support layer;

[0043] 5a, the thermocouple of the lower layer of the thermopile of the upstream temperature measuring element; 5b, the thermocouple of the lower layer of the thermopile of the downstream temperature measuring element;

[0044] 6a, upstream heating element heat source thermocouple; 6b, central heating element heat source thermocouple; 6c, downstream heating element heat source thermocouple;

[0045] 7a, a first insulating layer; 7b, a second insulating layer; 7c, a third insulating layer;

[0046] 8a, upper thermocouple of the thermopile of the upstream temperature measuring element; 8b, upper thermocouple of the thermopile of the downstream temperature measuring element;

[0047] 91. The cold end connection wire structure of the thermopile of the upstream temperature measuring element; 92. The hot end connection wire structure of the thermopile of the upstream temperature measuring element; 93. The heat source connection wire structure of the upstream heating element; 94. The heat source connection wire structure of the central heating element; 95. The heat source connection wire structure of the downstream heating element; 96. The cold end connection wire structure of the thermopile of the downstream temperature measuring element; 97. The hot end connection wire structure of the thermopile of the downstream temperature measuring element;

[0048] 10. Passivation layer;

[0049] 1-1, upstream heating resistor R1 is equipped with positive electrode of thermopile temperature measuring element; 1-2, upstream heating resistor R1 is equipped with negative electrode of thermopile temperature measuring element; 1-3, upstream heating resistor R2 is equipped with positive electrode of thermopile temperature measuring element; 1-4, upstream heating resistor R2 is equipped with negative electrode of thermopile temperature measuring element; 1-5, upstream heating resistor R3 is equipped with positive electrode of thermopile temperature measuring element; 1-6, upstream heating resistor R3 is equipped with negative electrode of thermopile temperature measuring element; 1-7, downstream heating resistor R7 is equipped with positive electrode of thermopile temperature measuring element Electrode; 1-8, downstream heating resistor R7 is matched with the negative electrode of the thermopile temperature measuring element; 1-9, downstream heating resistor R8 is matched with the positive electrode of the thermopile temperature measuring element; 1-10, downstream heating resistor R8 is matched with the negative electrode of the thermopile temperature measuring element; 1-11, downstream heating resistor R9 is matched with the positive electrode of the thermopile temperature measuring element; 1-12, downstream heating resistor R9 is matched with the negative electrode of the thermopile temperature measuring element; 1-13, the heat source wire of the central heating element heats the positive electrode; 1-14, the heat source wire of the central heating element heats the negative electrode. DETAILED DESCRIPTION

[0050] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments so that those skilled in the art can better understand the present invention and implement it, but the embodiments are not intended to limit the present invention.

[0051] Reference Figures 1 to 4 As shown, a variable range flow chip of the utility model comprises:

[0052] Substrate 1;

[0053] A supporting structure layer, arranged on the surface of the substrate 1;

[0054] A first insulating layer 7a, disposed on the supporting structure layer;

[0055] The lower thermopile and the central heat source are respectively arranged on the first insulating layer 7a; wherein the lower thermopile includes an upstream temperature measuring element thermopile lower thermocouple 5a and a downstream temperature measuring element thermopile lower thermocouple 5b, and each group of the central heat source includes an upstream heating element heat source thermocouple 6a, a central heating element heat source thermocouple 6b and a downstream heating element heat source thermocouple 6c arranged in sequence along the transverse direction;

[0056] A second insulating layer 7b, covering the lower thermopile and each of the central heat sources;

[0057] An upper thermopile is arranged on the second insulating layer 7b, and the upper thermopile includes an upper thermocouple 8a of an upstream temperature measuring element thermopile and an upper thermocouple 8b of a downstream temperature measuring element thermopile;

[0058] A third insulating layer 7c, covering the upper thermopile;

[0059] A connecting wire structure, penetrating the third insulating layer 7c, to respectively realize the connection between the lower thermopile and the upper thermopile and the connection of the central heat source;

[0060] The lower thermocouple 5a of the upstream temperature measuring element thermopile and the upper thermocouple 8a of the upstream temperature measuring element thermopile constitute the upstream temperature measuring element thermopile; the lower thermocouple 5b of the downstream temperature measuring element thermopile and the upper thermocouple 8b of the downstream temperature measuring element thermopile constitute the downstream temperature measuring element thermopile;

[0061] A plurality of groups of central heat sources are arranged side by side along the longitudinal direction (YY' axis direction) of the chip;

[0062] A plurality of groups of thermopile temperature measuring elements are provided and symmetrically distributed along the transverse symmetrical section of the chip, and each group of thermopile temperature measuring elements includes a plurality of rows of upstream temperature measuring element thermopiles and a corresponding plurality of rows of downstream temperature measuring element thermopiles.

[0063] Specifically, the central heat source and the thermopile temperature measuring elements are respectively provided in three groups.

[0064] Specifically, in each group of the thermopile temperature measuring elements, two adjacent groups of the upstream temperature measuring element thermopile and two adjacent groups of the downstream temperature measuring element thermopile are connected via wires.

[0065] Specifically, refer to Figure 2 As shown, the transverse symmetry axis (XX' axis) of the chip passes through the central heat source located in the middle, and the upstream heating element heat source thermocouple 6a, the central heating element heat source thermocouple 6b and the downstream heating element heat source thermocouple 6c in each group of the central heat source are arranged in sequence along the transverse direction, thereby correspondingly constituting an upstream heating resistor R1, an upstream heating resistor R2, an upstream heating resistor R3, a central heating resistor R4, a central heating resistor R5, a central heating resistor R6, a downstream heating resistor R7, a downstream heating resistor R8 and a downstream heating resistor R9, and the upstream heating resistor R1, the upstream heating resistor R2, the upstream heating resistor R3, the central heating resistor R4, the central heating resistor R5, the central heating resistor R6, the downstream heating resistor R7, the downstream heating resistor R8 and the downstream heating resistor R9 are connected in series and / or in parallel.

[0066] Specifically, refer to Figure 2As shown, all of the thermopile temperature measuring elements include an upstream heating resistor R1 supporting a thermopile temperature measuring element positive electrode 1-1, an upstream heating resistor R1 supporting a thermopile temperature measuring element negative electrode 1-2, an upstream heating resistor R2 supporting a thermopile temperature measuring element positive electrode 1-3, an upstream heating resistor R2 supporting a thermopile temperature measuring element negative electrode 1-4, an upstream heating resistor R3 supporting a thermopile temperature measuring element positive electrode 1-5, an upstream heating resistor R3 supporting a thermopile temperature measuring element negative electrode 1-6, a downstream heating resistor R7 supporting a thermopile temperature measuring element positive electrode 1-7, a downstream heating resistor R7 supporting a thermopile temperature measuring element negative electrode 1-8, a downstream heating resistor R8 supporting a thermopile temperature measuring element positive electrode 1-9, a downstream heating resistor R8 supporting a thermopile temperature measuring element negative electrode 1-10, a downstream heating resistor R9 supporting a thermopile temperature measuring element positive electrode 1-11, and a downstream heating resistor R9 supporting a thermopile temperature measuring element negative electrode 1-12;

[0067] The central heat source includes a central heating element heat source wire symmetrically arranged along the transverse symmetry axis of the chip to heat the positive electrode 1-13 and a central heating element heat source wire to heat the negative electrode 1-14.

[0068] Specifically, the connecting wire structure includes an upstream temperature measuring element thermopile cold end connecting wire structure 91 connected to the upstream temperature measuring element thermopile lower thermocouple 5a, an upstream temperature measuring element thermopile hot end connecting wire structure 92 connected between the upstream temperature measuring element thermopile lower thermocouple 5a and the upstream temperature measuring element thermopile upper thermocouple 8a, a downstream temperature measuring element thermopile cold end connecting wire structure 96 connected to the downstream temperature measuring element thermopile lower thermocouple 5b, a downstream temperature measuring element thermopile hot end connecting wire structure 97 connected between the downstream temperature measuring element thermopile lower thermocouple 5b and the downstream temperature measuring element thermopile upper thermocouple 8b, an upstream heating element heat source connecting wire structure 93 connected to the upstream heating element heat source thermocouple 6a, a central heating element heat source connecting wire structure 94 connected to the central heating element heat source thermocouple 6b, and a downstream heating element heat source connecting wire structure 95 connected to the downstream heating element heat source thermocouple 6c.

[0069] Specifically, a silicon nitride passivation layer 10 is disposed on the surface of the third insulating layer 7c.

[0070] Specifically, the support structure layer includes a first silicon oxide support layer 2, a silicon nitride support layer 3 and a second silicon oxide support layer 4 which are sequentially arranged on the surface of the substrate 1.

[0071] Specifically, the thickness of the first silicon oxide support layer 2 is 0.1-10 μm; the thickness of the silicon nitride support layer 3 is 0.01-0.08 μm; and the thickness of the second silicon oxide support layer 4 is 1-3 μm.

[0072] Through the above structure, the central heat source is in a "non" shape. The nine groups of resistors (R1-R9) of the central heat source can be connected in series or in parallel through laser ablation. The lengths of resistors R1-R9 can be set to be not completely equal, and the total resistance of the central heat source can be adjusted, so that the heating power and total heat of the central heat source are different. Therefore, when the upstream and downstream temperature measuring elements receive the same flow, they will produce different output sizes to adjust the different ranges of the whole chip. For example, when it is necessary to measure a small range flow, due to the change of the small flow, the chip needs to have higher sensitivity and resolution at the same input voltage. The central heat source can be connected in series and parallel by means of laser ablation to achieve the central heat source connection mode with the largest total resistance and the largest heat generation, so that the temperature measuring element has a larger output voltage and greater sensitivity at a small flow rate, meeting the needs of small range flow measurement.

[0073] When it is necessary to measure a large range of flow, because the range requirement is relatively large, the chip needs to have a change in output under a large range of flow under the same input voltage and is not saturated. Therefore, it is necessary to adjust the series-parallel mode of the central heat source to achieve a central heat source connection mode with the minimum total resistance and the minimum heat generation, so that the temperature measuring element can still have changes and output at a large flow rate to meet the needs of large-range flow measurement. By designing multiple groups of thermal resistors in cross-series and parallel, combined with laser ablation to adjust the series-parallel structure to meet the measurement of different ranges of flow. A single chip can meet the measurement needs of multiple ranges.

[0074] The equivalent original diagram of the adjustable range circuit of the central heat source is as follows Figure 5 As shown in FIG. 1 , up to 27 equivalent circuit diagrams can be formed by different laser ablation methods, and the most suitable measurement range can reach hundreds. For example, Figure 6 The upstream, center and downstream heat source resistors are connected in parallel as shown; Figure 7 The upstream, central and downstream heat source resistors are connected in parallel after discarding part of the central heat source resistors as shown; Figure 8 The upstream, center and downstream heat source resistors are connected in parallel after some of the upstream and downstream heat source resistors are discarded.

[0075] Finally, it should be noted that the above specific implementation methods are only used to illustrate the technical solution of the utility model rather than to limit it. Although the utility model has been described in detail with reference to examples, ordinary technicians in the field should understand that the technical solution of the utility model can be modified or replaced by equivalents without departing from the spirit and scope of the technical solution of the utility model, which should be included in the scope of the claims of the utility model.

Claims

1. A variable range flow chip, characterized in that: include: Substrate (1); A supporting structure layer, arranged on the surface of the substrate (1); A first insulating layer (7a) is arranged on the supporting structure layer; The lower thermopile and the central heat source are respectively arranged on the first insulating layer (7a); wherein the lower thermopile comprises an upstream temperature measuring element thermopile lower thermocouple (5a) and a downstream temperature measuring element thermopile lower thermocouple (5b), and each group of the central heat source comprises an upstream heating element heat source thermocouple (6a), a central heating element heat source thermocouple (6b) and a downstream heating element heat source thermocouple (6c) arranged in sequence in the transverse direction; A second insulating layer (7b), covering the lower thermopile and each of the central heat sources; An upper thermopile is arranged on the second insulating layer (7b), the upper thermopile comprising an upper thermocouple (8a) of an upstream temperature measuring element thermopile and an upper thermocouple (8b) of a downstream temperature measuring element thermopile; A third insulating layer (7c), covering the upper thermopile; A connecting wire structure, penetrating the third insulating layer (7c), so as to respectively realize the connection between the lower layer thermopile and the upper layer thermopile and the connection of the central heat source; The lower thermocouple (5a) of the upstream temperature measuring element thermopile and the upper thermocouple (8a) of the upstream temperature measuring element thermopile constitute the upstream temperature measuring element thermopile; the lower thermocouple (5b) of the downstream temperature measuring element thermopile and the upper thermocouple (8b) of the downstream temperature measuring element thermopile constitute the downstream temperature measuring element thermopile; A plurality of groups of central heat sources are arranged side by side along the longitudinal direction of the chip; A plurality of groups of thermopile temperature measuring elements are provided and symmetrically distributed along the transverse symmetrical section of the chip, and each group of thermopile temperature measuring elements includes a plurality of rows of upstream temperature measuring element thermopiles and a corresponding plurality of rows of downstream temperature measuring element thermopiles.

2. A variable range flow chip according to claim 1, characterized in that: The central heat source and the thermopile temperature measuring elements are respectively provided in three groups.

3. A variable range flow chip according to claim 1, characterized in that: In each group of the thermopile temperature measuring elements, two adjacent groups of the upstream temperature measuring element thermopile and two adjacent groups of the downstream temperature measuring element thermopile are connected via wires.

4. A variable range flow chip according to claim 2, characterized in that: The transverse symmetry axis of the chip passes through the central heat source located in the middle, and the upstream heating element heat source thermocouple (6a), the central heating element heat source thermocouple (6b) and the downstream heating element heat source thermocouple (6c) in each group of the central heat source are arranged in sequence along the transverse direction, thereby correspondingly forming an upstream heating resistor R1, an upstream heating resistor R2, an upstream heating resistor R3, a central heating resistor R4, a central heating resistor R5, a central heating resistor R6, a downstream heating resistor R7, a downstream heating resistor R8 and a downstream heating resistor R9, and the upstream heating resistor R1, the upstream heating resistor R2, the upstream heating resistor R3, the central heating resistor R4, the central heating resistor R5, the central heating resistor R6, the downstream heating resistor R7, the downstream heating resistor R8 and the downstream heating resistor R9 are connected in series and / or in parallel.

5. A variable range flow chip according to claim 4, characterized in that: All of the thermopile temperature measuring elements include a positive electrode (1-1) of a thermopile temperature measuring element supporting an upstream heating resistor R1, a negative electrode (1-2) of a thermopile temperature measuring element supporting an upstream heating resistor R1, a positive electrode (1-3) of a thermopile temperature measuring element supporting an upstream heating resistor R2, a negative electrode (1-4) of a thermopile temperature measuring element supporting an upstream heating resistor R2, a positive electrode (1-5) of a thermopile temperature measuring element supporting an upstream heating resistor R3, a negative electrode (1-6) of a thermopile temperature measuring element supporting an upstream heating resistor R3, a positive electrode (1-7) of a thermopile temperature measuring element supporting a downstream heating resistor R7, a negative electrode (1-8) of a thermopile temperature measuring element supporting a downstream heating resistor R7, a positive electrode (1-9) of a thermopile temperature measuring element supporting a downstream heating resistor R8, a negative electrode (1-10) of a thermopile temperature measuring element supporting a downstream heating resistor R8, a positive electrode (1-11) of a thermopile temperature measuring element supporting a downstream heating resistor R9, and a negative electrode (1-12) of a thermopile temperature measuring element supporting a downstream heating resistor R9; The central heat source comprises a central heating element heat source wire symmetrically arranged along the transverse symmetry axis of the chip to heat the positive electrode (1-13) and a central heating element heat source wire to heat the negative electrode (1-14).

6. The variable range flow chip according to claim 4, characterized in that: The resistance values ​​of the upstream heating resistor R1, the upstream heating resistor R2, the upstream heating resistor R3, the central heating resistor R4, the central heating resistor R5, the central heating resistor R6, the downstream heating resistor R7, the downstream heating resistor R8 and the downstream heating resistor R9 are not completely equal.

7. The variable range flow chip according to claim 1, characterized in that: The connecting wire structure comprises an upstream temperature measuring element thermopile cold end connecting wire structure (91) connected to the lower thermocouple (5a) of the upstream temperature measuring element thermopile, an upstream temperature measuring element thermopile hot end connecting wire structure (92) connected between the lower thermocouple (5a) of the upstream temperature measuring element thermopile and the upper thermocouple (8a) of the upstream temperature measuring element thermopile, a downstream temperature measuring element thermopile cold end connecting wire structure (96) connected to the lower thermocouple (5b) of the downstream temperature measuring element thermopile, and a downstream temperature measuring element thermopile hot end connecting wire structure (97) connected to the lower thermocouple (5c) of the downstream temperature measuring element thermopile. A downstream temperature measuring element thermopile hot end connecting wire structure (97) between the lower thermocouple (5b) of the temperature measuring element thermopile and the upper thermocouple (8b) of the downstream temperature measuring element thermopile, an upstream heating element heat source connecting wire structure (93) connected to the upstream heating element heat source thermocouple (6a), a central heating element heat source connecting wire structure (94) connected to the central heating element heat source thermocouple (6b), and a downstream heating element heat source connecting wire structure (95) connected to the downstream heating element heat source thermocouple (6c).

8. The variable range flow chip according to claim 1, characterized in that: A silicon nitride passivation layer (10) is provided on the surface of the third insulating layer (7c).

9. The variable range flow chip according to claim 1, characterized in that: The support structure layer comprises a first silicon oxide support layer (2), a silicon nitride support layer (3) and a second silicon oxide support layer (4) which are sequentially arranged on the surface of the substrate (1).

10. The variable range flow chip according to claim 9, characterized in that: The thickness of the first silicon oxide support layer (2) is 0.1-10 μm; the thickness of the silicon nitride support layer (3) is 0.01-0.08 μm; and the thickness of the second silicon oxide support layer (4) is 1-3 μm.