Chip packaging structure

Abstract

The utility model relates to the technical field of chip packaging, and discloses a chip packaging structure, which comprises a packaging substrate, a first heat absorbing plate is arranged at the top of the packaging substrate, a chip body is arranged at the top of the first heat absorbing plate, a plurality of pins are arranged on two sides of the chip body, and the pins are arranged on the packaging substrate. A second heat absorption plate is arranged at the top of the chip body, first heat conduction plates are arranged on the two sides of the first heat absorption plate, a plurality of second heat conduction plates are arranged at the top of the second heat absorption plate, and packaging shells are arranged on the outer sides of the second heat conduction plates. According to the chip packaging structure, the heat generated at the bottom of the chip body is absorbed through the first heat absorption plate, the heat generated at the top of the chip body is absorbed through the second heat absorption plate, and the heat on the first heat absorption plate, the second heat absorption plate and the pins is intensively introduced to the heat dissipation plate through the first heat conduction plate and the second heat conduction plate; the heat dissipation efficiency is increased by connecting the heat dissipation plate with an external heat dissipation device.

Description

Technical Field

[0001] The utility model relates to the technical field of chip packaging, in particular to a chip packaging structure. Background Art

[0002] The chip packaging structure refers to a technology that encapsulates the chip in an external protective layer. It protects the chip, connects the chip with other components, and provides electrical and mechanical connections. For example, CN209626202U, a chip packaging structure disclosed on the Chinese patent website, changes the structure of the connecting clip and sets it as a clip body and welding layers at both ends of the clip body. The welding layers at both ends are respectively suitable for aligning the pads and corresponding pins; the clip body is made of a material that is not wetted by the solder, and the welding layer is made of a material that is wetted by the solder. The advantage is that during the welding process of the connecting clip, the solder is only distributed in the welding layer, and the solder will not be lost in the welding layer due to the wetting of the clip body. The area of ​​the welding area can be accurately controlled to ensure the welding firmness, which helps to improve the yield of the packaging structure. However, this type of packaging structure makes the heat dissipation effect of the chip itself slower. Therefore, a chip packaging structure is proposed. Utility Model Content

[0003] In view of the deficiencies in the prior art, the utility model provides a chip packaging structure, which has the advantages of concentrating the heat inside the chip on the top of the packaging structure for heat dissipation, and cooperating with the heat dissipation structure outside the chip to increase the heat dissipation efficiency, thereby solving the problem of slow heat dissipation effect of the chip itself.

[0004] To achieve the above-mentioned purpose, the utility model provides the following technical solutions: a chip packaging structure, including a packaging substrate, a No. 1 heat absorbing plate is arranged on the top of the packaging substrate, a chip body is arranged on the top of the No. 1 heat absorbing plate, and the heat generated by the bottom of the chip body is absorbed by the No. 1 heat absorbing plate, a plurality of pins are arranged on both sides of the chip body, a No. 2 heat absorbing plate is arranged on the top of the chip body, and the heat generated by the top of the chip body is absorbed by the No. 2 heat absorbing plate, a No. 1 heat conducting plate is arranged on both sides of the No. 1 heat absorbing plate, a plurality of No. 2 heat conducting plates are arranged on the top of the No. 2 heat absorbing plate, a packaging shell is arranged on the outer side of the No. 2 heat conducting plate, a plurality of plug interfaces are opened on the top of the packaging shell, a heat dissipation plate is arranged on the top of the packaging shell, and packaging colloid is arranged at the internal gap between the packaging substrate and the packaging shell, and the chip and the circuit are completely fixed together by filling the entire packaging space with the packaging colloid.

[0005] Preferably, the outer sides of the No. 1 heat absorbing plate and the No. 2 heat absorbing plate are both provided with a No. 1 heat absorbing gel, and the outer sides of the No. 1 heat conducting plate and the No. 2 heat conducting plate are both provided with a No. 2 heat absorbing gel, and the heat absorbing efficiency of the No. 1 heat absorbing plate and the No. 2 heat absorbing plate is enhanced by the No. 1 heat absorbing gel and the No. 2 heat absorbing gel.

[0006] Preferably, the middle of the No. 1 heat conducting plate is connected to the pin, and part of the heat of the pin can also be absorbed by the No. 1 heat conducting plate.

[0007] Preferably, the outer surface of the packaging shell is sprayed with an anti-oxidation coating, and the pins are subjected to anti-corrosion treatment.

[0008] Preferably, the No. 1 heat conducting plate and the No. 2 heat conducting plate are both connected to the bottom of the heat sink through the plug interface, and the heat on the No. 1 heat absorbing plate, the No. 2 heat absorbing plate and the pins are concentratedly introduced into the heat sink through the No. 1 heat conducting plate and the No. 2 heat conducting plate, and the heat dissipation efficiency is increased by connecting the heat sink to an external heat sink.

[0009] Compared with the prior art, the present invention provides a chip packaging structure with the following beneficial effects:

[0010] 1. The chip packaging structure absorbs the heat generated by the bottom of the chip body through the No. 1 heat absorbing plate, absorbs the heat generated by the top of the chip body through the No. 2 heat absorbing plate, and concentrates the heat on the No. 1 heat absorbing plate, the No. 2 heat absorbing plate and the pins onto the heat sink through the No. 1 heat conducting plate and the No. 2 heat conducting plate. The heat dissipation efficiency is increased by connecting the heat sink to an external heat dissipation device.

[0011] 2. The chip packaging structure enhances the heat absorption efficiency of the first heat absorption plate and the second heat absorption plate through the first heat absorption gel and the second heat absorption gel. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 This is a schematic diagram of the overall cross-sectional structure of the utility model;

[0013] Figure 2 This is a schematic diagram of the cross-sectional structure of the unfilled encapsulated colloid of the utility model;

[0014] Figure 3 It is a schematic diagram of the partial cross-section structure of the utility model.

[0015] Among them: 1. packaging substrate; 2. No. 1 heat absorbing plate; 3. chip body; 4. pins; 5. No. 2 heat absorbing plate; 6. No. 1 heat conducting plate; 7. No. 2 heat conducting plate; 8. packaging shell; 9. plug interface; 11. packaging colloid; 12. No. 1 heat absorbing gel; 13. No. 2 heat absorbing gel. DETAILED DESCRIPTION

[0016] The following will be combined with the drawings in the embodiments of the utility model to clearly and completely describe the technical solutions in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0017] See also Figure 1-3 The utility model provides the following technical solutions: a chip packaging structure, including a packaging substrate 1, a No. 1 heat absorbing plate 2 is arranged on the top of the packaging substrate 1, a chip body 3 is arranged on the top of the No. 1 heat absorbing plate 2, and the heat generated at the bottom of the chip body 3 is absorbed by the No. 1 heat absorbing plate 2, and a plurality of pins 4 are arranged on both sides of the chip body 3, and a No. 2 heat absorbing plate 5 is arranged on the top of the chip body 3, and the heat generated at the top of the chip body 3 is absorbed by the No. 2 heat absorbing plate 5, and a No. 1 heat conducting plate 6 is arranged on both sides of the No. 1 heat absorbing plate 2, and a plurality of No. 2 heat conducting plates 7 are arranged on the top of the No. 2 heat conducting plate 5, and a packaging shell 8 is arranged on the outer side of the No. 2 heat conducting plate 7, and a plurality of plug-in interfaces 9 are opened on the top of the packaging shell 8, and a heat dissipation plate is arranged on the top of the packaging shell 8, and a packaging colloid 11 is arranged at the internal gap between the packaging substrate 1 and the packaging shell 8, and the chip and the circuit are completely fixed together by filling the entire packaging space with the packaging colloid 11;

[0018] The outer sides of the first heat absorbing plate 2 and the second heat absorbing plate 5 are both provided with a first heat absorbing gel 12, and the outer sides of the first heat conducting plate 6 and the second heat conducting plate 7 are both provided with a second heat absorbing gel 13, and the heat absorbing efficiency of the first heat absorbing plate 2 and the second heat absorbing plate 5 is enhanced by the first heat absorbing gel 12 and the second heat absorbing gel 13;

[0019] The middle of the first heat conducting plate 6 is connected to the pin 4, and part of the heat of the pin 4 can also be absorbed through the first heat conducting plate 6;

[0020] The outer surface of the package housing 8 is sprayed with an anti-oxidation coating, and the pin 4 is treated with anti-corrosion;

[0021] The first heat conducting plate 6 and the second heat conducting plate 7 are both connected to the bottom of the heat sink through the plug interface 9. The heat on the first heat absorbing plate 2, the second heat absorbing plate 5 and the pin 4 is concentratedly introduced into the heat sink through the first heat conducting plate 6 and the second heat conducting plate 7. The heat dissipation efficiency is increased by connecting the heat sink to an external heat dissipation device.

[0022] When in use, the heat generated by the bottom of the chip body 3 is absorbed by the No. 1 heat absorbing plate 2, and the heat generated by the top of the chip body 3 is absorbed by the No. 2 heat absorbing plate 5. The heat absorption efficiency of the No. 1 heat absorbing plate 2 and the No. 2 heat absorbing plate 5 is enhanced by the No. 1 heat absorbing gel 12 and the No. 2 heat absorbing gel 13. The heat on the No. 1 heat absorbing plate 2, the No. 2 heat absorbing plate 5 and the pin 4 is concentratedly introduced into the heat dissipation plate through the No. 1 heat conducting plate 6 and the No. 2 heat conducting plate 7. The heat dissipation efficiency is increased by connecting the heat dissipation plate to an external heat dissipation device.

[0023] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A chip packaging structure, comprising a packaging substrate (1), characterized in that: A first heat absorbing plate (2) is arranged on the top of the packaging substrate (1), a chip body (3) is arranged on the top of the first heat absorbing plate (2), a plurality of pins (4) are arranged on both sides of the chip body (3), a second heat absorbing plate (5) is arranged on the top of the chip body (3), a first heat conducting plate (6) is arranged on both sides of the first heat absorbing plate (2), a plurality of second heat conducting plates (7) are arranged on the top of the second heat absorbing plate (5), a packaging shell (8) is arranged on the outside of the second heat conducting plate (7), a plurality of plug interfaces (9) are provided on the top of the packaging shell (8), a heat dissipation plate is arranged on the top of the packaging shell (8), and a packaging colloid (11) is arranged at the internal gap between the packaging substrate (1) and the packaging shell (8).

2. The chip packaging structure according to claim 1, characterized in that: The outer sides of the first heat absorbing plate (2) and the second heat absorbing plate (5) are both provided with a first heat absorbing gel (12), and the outer sides of the first heat conducting plate (6) and the second heat conducting plate (7) are both provided with a second heat absorbing gel (13).

3. The chip packaging structure according to claim 1, characterized in that: The middle of the first heat conducting plate (6) is connected to the pin (4).

4. The chip packaging structure according to claim 1, characterized in that: The outer surface of the packaging shell (8) is sprayed with an anti-oxidation coating, and the pins (4) are subjected to an anti-corrosion treatment.

5. The chip packaging structure according to claim 1, characterized in that: The first heat conducting plate (6) and the second heat conducting plate (7) are both connected to the bottom of the heat dissipation plate through the plug interface (9).

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