Power semiconductor module and power electronic device system comprising same
By introducing vibration dampeners in the power semiconductor module, the failure problem caused by circuit board vibration in the power electronic device system was solved, and effective suppression of the circuit board vibration was achieved, and the system was stable.
Patent Information
- Application Number
- CN202420277858.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Priority Date
- 2023-02-08
- Filing Date
- 2024-02-05
- Publication Date
- 2025-01-28
- Estimated Expiration
- 2034-02-05
AI Technical Summary
The lack of effective vibration control between the power semiconductor module and the circuit board, causing vibration of the circuit board to cause failure of the power electronics system.
The vibration damping device is introduced in the power semiconductor module, which is attached to the lead frame or fixture framework, and the separation of the electrical insulating shell is highlighted to inhibit the vibration of the circuit board.
Effectively reduce the vibration of the circuit board, prevent it from affecting the power electronic device system, and does not affect the electrical operation of the power semiconductor module.
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Figure CN222421967U_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of semiconductor devices, and in particular to a power semiconductor module and a power electronic device system including the power semiconductor module. Background Art
[0002] Power semiconductor modules are designed for power electronics applications and are widely used in many industries, including electric vehicles, appliances, industrial drives, general drives, traction, servo units, renewable energy applications (such as solar inverters or wind energy applications, etc.). A printed circuit board (PCB) is usually mounted on the power semiconductor module, and the PCB includes additional electronic components for the electronic components included in the power semiconductor module, such as controllers, gate drivers, etc. However, the PCB has one or more vibration modes that need to be controlled. The vibration mode of the PCB depends on several variables, including the composition and size of the PCB, the type of circuit system mounted on the PCB, etc. If there is not enough vibration control, the movement of the PCB may cause failures or other problems within the power electronics system.
[0003] Therefore, there is a need for an improved interface between a power semiconductor module and a PCB that reduces PCB vibrations. Utility Model Content
[0004] According to an embodiment of a power semiconductor module, the power semiconductor module includes: an electrically insulating housing; a plurality of power semiconductor dies attached to a substrate inside the electrically insulating housing; a lead frame or a clamp frame arranged above the plurality of power semiconductor dies inside the electrically insulating housing and electrically connected to the plurality of power semiconductor dies; a plurality of contact pins attached to the lead frame or the clamp frame and protruding through a first side of the electrically insulating housing to form an electrical connection interface outside the electrically insulating housing; and a plurality of vibration dampers attached to the lead frame or the clamp frame and protruding through the first side of the electrically insulating housing separately from the electrical connection interface, wherein the plurality of vibration dampers are configured to suppress vibrations at a circuit board designed to be mounted to the power semiconductor module without affecting the electrical operation of the power semiconductor module.
[0005] According to an embodiment of a power electronic device system, the power electronic device system includes: a power semiconductor module, the power semiconductor module including: an electrically insulating housing; a plurality of power semiconductor dies attached to a substrate inside the electrically insulating housing; a lead frame or a clamp frame, arranged above the plurality of power semiconductor dies inside the electrically insulating housing and electrically connected to the plurality of power semiconductor dies; a plurality of pins attached to the lead frame or the clamp frame and protruding through a first side of the electrically insulating housing to form an electrical connection interface outside the electrically insulating housing; and a plurality of vibration dampers attached to the lead frame or the clamp frame and protruding through the first side of the electrically insulating housing separately from the electrical connection interface; and a circuit board, the circuit board including: a plurality of electronic components mounted thereon; a plurality of first openings for accommodating the plurality of pins; and a plurality of second openings for accommodating the plurality of vibration dampers, wherein the plurality of vibration dampers are configured to suppress vibrations at the circuit board and not affect the electrical operation of the power semiconductor module.
[0006] Those skilled in the art will recognize additional features and advantages upon reading the following detailed description, and upon viewing the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0007] The elements in the drawings are not necessarily to scale with respect to each other. Like reference numerals represent corresponding similar parts. The features of the various illustrated embodiments may be combined unless they exclude each other. The embodiments are depicted in the drawings and described in detail in the following description.
[0008] Figure 1 A top perspective view of an embodiment of a power semiconductor module with a vibration damper is shown.
[0009] Figure 2 A bottom perspective view of a power semiconductor module is shown.
[0010] Figure 3 A side perspective view of a power semiconductor module is shown.
[0011] Figure 4 A partial cross-sectional view of a circuit board designed to be mounted to a power semiconductor module is shown.
[0012] Figure 5 A partial cross-sectional view of a power semiconductor module with a heat sink mounted to the metallization back side of the module is shown.
[0013] Figure 6 A side perspective view of a power semiconductor module according to another embodiment is shown.
[0014] Figure 7 A side perspective view of a power semiconductor module according to another embodiment is shown.
[0015] Figures 8 to 10 The drawings show corresponding partial top views of a circuit board designed as a power semiconductor module for different exemplary embodiments of a vibration damper.
[0016] Fig.11 A top perspective view of a power semiconductor module according to another embodiment is shown.
[0017] Fig.12 A top perspective view of a power semiconductor module according to another embodiment is shown. DETAILED DESCRIPTION
[0018] Embodiments described herein provide a power semiconductor module having a vibration suppression feature that reduces vibrations at a circuit board designed to be mounted to the power semiconductor module. The vibration suppression feature is configured to suppress vibrations at the circuit board without affecting the electrical operation of the power semiconductor module.
[0019] Next, exemplary embodiments of a power semiconductor module having a vibration suppression feature and a power electronic device system including the power semiconductor module are described with reference to the drawings. Unless explicitly stated otherwise, any vibration suppression feature embodiments described herein may be used interchangeably.
[0020] Figure 1 A top perspective view of an embodiment of a power semiconductor module 100 is shown. Figure 2 A bottom perspective view of a power semiconductor module 100 is shown. Figure 3 A side perspective view of a power semiconductor module 100 is shown.
[0021] The power semiconductor module 100 may form a portion of a power electronic device circuit for use in various power applications, such as in a DC / AC inverter, a DC / DC converter, an AC / DC converter, a DC / AC converter, an AC / AC converter, a multiphase inverter, an H-bridge, etc. The power semiconductor module 100 includes an electrically insulating housing 102, such as a plastic housing. A power semiconductor die 104 is attached to a substrate 106 inside the electrically insulating housing 102. A lead frame or a clamp frame 108 is disposed above the power semiconductor die 104 inside the electrically insulating housing 102 and is electrically connected to the power semiconductor die 104. The semiconductor die 104 and the lead frame or the clamp frame 108 are connected to each other. Figures 1 to 3 It is not visible.
[0022] The substrate 106 may be, for example, a DCB (direct copper bonding) substrate, an AMB (active metal brazing) substrate, an IMS (insulated metal substrate), etc. The semiconductor die 104 may be a power Si or SiC power MOSFET (metal oxide semiconductor field effect transistor) die, a HEMT (high electron mobility transistor) die, an IGBT (insulated gate bipolar transistor) die, a JFET (junction field effect transistor) die, etc. The semiconductor die 104 may be a vertical power transistor die. For a vertical power transistor die, the main current flow path is between the positive side and the back side of the die. The drain pad is typically disposed at the back side of the die 104, and the gate pad and the source pad (and optionally one or more sensing pads) are at the positive side of the die 104. Additional types of semiconductor dies may be included in the power semiconductor module 100, for example, such as one or more power diode dies, a logic die, a controller die, a gate driver die, etc.
[0023] The power semiconductor module 100 further includes contact pins 110 that are attached to the lead frame or clamp frame 108 and protrude through a first side 112 of the electrically insulating housing 102 to form an electrical connection interface 114 outside the electrically insulating housing 102. For example, the contact pins 110 may extend through openings 115 in the first side 112 of the electrically insulating housing 102.
[0024] The electrical connection interface 114 formed by the contact pins 110 provides an electrical interface to the power semiconductor die 104 housed in the electrically insulating housing 102. In one embodiment, the contact pins 110 forming the electrical connection interface 114 are press-fit pins. The press-fit pins have a pin geometry that enables plastic deformation to occur in the upper region of the pins. After being inserted into an opening in a metallization such as a metallization 116 of a circuit board 118 (such as a PCB), the contact between the pins 110 and the metallization 118 develops, and the elastic and plastic deformations create a large contact area.
[0025] The power semiconductor module 100 further includes a vibration damper 120 attached to the lead frame or clamp frame 108 and protruding through the first side 112 of the electrically insulating housing 102 separately from the electrical connection interface 114. For example, the vibration damper 120 may extend through an opening 115 in the first side 112 of the electrically insulating housing 102.
[0026] The vibration damper 120 is configured to suppress vibrations at a circuit board 118 that is designed to be mounted to the power semiconductor module 100, such as Figure 3The power semiconductor module 100 and the circuit board 118 form a power electronic device system such as a DC / AC inverter, a DC / DC converter, an AC / DC converter, a DC / AC converter, an AC / AC converter, a multi-phase inverter, an H-bridge, etc.
[0027] The vibration damper 120 does not affect the electrical operation of the power semiconductor module 100. The electrical connection interface 114 formed by the contact pins 110 affects the electrical operation of the power semiconductor module 100, and the vibration damper 120 does not form a part of the electrical connection interface. Therefore, the vibration damper 120 does not provide power or signals to the power semiconductor die 104 accommodated in the electrically insulating housing 102.
[0028] One or more vibration dampers 120 may be at electrical potential because the vibration dampers 120 are attached to the lead frame or fixture frame 108. However, no vibration damper 120 at electrical potential carries current. Instead, the vibration dampers 120 are arranged to suppress vibrations of a circuit board 118 mounted to the first side 112 of the electrically insulating housing 102 of the power semiconductor module 100. The pattern / layout of the vibration dampers 120 depends on the vibration modes (single or multiple) of the circuit board 118 to be suppressed. Each circuit board vibration mode, in turn, depends on a number of variables, such as the composition and size of the circuit board 118, the type of circuit system mounted to the circuit board 118, etc. According to Figures 1 to 3 In the illustrated embodiment of the power module, the vibration dampers 120 that dampen vibrations at the circuit board 118 are pins such as press-fit pins.
[0029] Figure 4A partial cross-sectional view of a circuit board 118 designed to be mounted to a power semiconductor module 100 is shown. An opening 122 is formed in an electrical insulator 124 of the circuit board 118. The electrical insulator 124 may include a pre-peg material (pre-impregnated fiber), such as FR-2, FR-4, CEM-1, G-10, etc., for example in the case of a PCB. The opening 122 in the electrical insulator 124 may be coated with a metallization 116. In the case of pins as vibration dampers 120, during mounting of the circuit board 118 to the module 100, the contact pins 110 of the power semiconductor module 100 and the vibration dampers 120 are inserted into the circuit board opening 122. In the case of press-fit pins as vibration dampers 120, a first press-fit connection is formed between contact pins 110 of the power semiconductor module 100 and openings 122 in the circuit board 118 that receive the contact pins 110, and a second press-fit connection is formed between the vibration damper 120 of the module 100 and the openings 122 in the circuit board 118 that receive the vibration damper 120. The circuit board 118 may be mounted to the power semiconductor module 100 by one or more fasteners 126 such as screws, bolts, rivets, etc., by adhesives, by plastic welding, by clamping, etc.
[0030] A portion of the lead frame or fixture frame 108 included in the power semiconductor module 100 may protrude through one or more sides 128 of the electrically insulating housing 102 to form power terminals 130 of the power semiconductor module. The power terminals may provide a reference voltage to the power semiconductor module 100 or deliver current to or from the power semiconductor module 100.
[0031] The substrate 106 inside the electrically insulating housing 102 of the power semiconductor module 100 and to which the power semiconductor die 104 is attached may have a metallized back side 132 facing away from the circuit board 118, for example in the case of a DCB, AMB or IMS substrate. According to this embodiment, a heat sink 134 may be mounted to the metallized back side 132 of the power semiconductor module 100, such as Figure 5 For example, the heat sink 134 may be mounted to the metallized back side 132 of the power semiconductor module 100 by one or more fasteners 136 (such as screws, bolts, rivets, etc.), which are inserted through openings in the power terminals 130 of the module 100 and into the heat sink 134.
[0032] Figure 6 FIG. 1 shows a side perspective view of a power semiconductor module 100 according to another embodiment. Figure 6, the vibration damper 120 is an electrically insulating protrusion 200 protruding from the first side 112 of the electrically insulating housing 102. For example, the electrically insulating protrusion 200 can be formed as a part of the electrically insulating housing 102, for example by injection molding or a similar process. The electrically insulating protrusion 200 can alternatively be (plastic) welded to the electrically insulating housing 102. The electrically insulating protrusion 200 is received by a corresponding opening 122 in a circuit board 118 mounted to the power semiconductor module 100. The electrically insulating protrusion 200 is (plastic) welded to the circuit board 118 at a side 202 of the circuit board 118 facing away from the power semiconductor module 100, for example, by applying heat and pressure to deform the distal (free) end of the electrically insulating protrusion 200 and then cooling to form a plastic weld 204.
[0033] Figure 7 FIG. 1 shows a side perspective view of a power semiconductor module 100 according to another embodiment. Figure 6 , the vibration damper 120 is a threaded fastener 300 attached to a lead frame or fixture frame 108 included in the power semiconductor module 100, and which protrudes through the first side 112 of the electrically insulating housing 102 to form a threaded connection with a corresponding opening 122 in the circuit board 118. For example, a nut or similar type of fastener 302 can be fixed to a distal (free) end 304 of the threaded fastener 300 to form a threaded connection with the corresponding opening 122 in the circuit board 118.
[0034] Figure 8 FIG. 1 shows a partial top plan view of a circuit board 118 designed for mounting to a power semiconductor module 100. Figure 8 In the embodiment, the circuit board 118 has metal traces 400 that electrically interconnect the contact pins 110 of the power semiconductor module 100 to one or more electronic components 402 mounted on the circuit board 118. The electronic components (single or multiple) 402 mounted on the circuit board 118 can be passive and / or active components, such as resistors (single or multiple), capacitors (single or multiple), inductors (single or multiple), controllers, gate drivers, etc. Figure 1-3 and Figure 5 In the case of the pin-type vibration damper 120 shown in FIG. Figure 8 The metal traces 400 of the circuit board 118 in FIG.
[0035] Fig. 9 Shown with Figure 8 A partial top view of the same circuit board 118, but for Figure 7 The threaded insulating vibration damper 300 shown in FIG.
[0036] Fig.10 Shown with Figure 8A partial top view of the same circuit board 118, but for Figure 6 An electrically insulating vibration damper 200 is shown.
[0037] Fig.11 1 shows a top perspective view of a power semiconductor module 100 according to another embodiment. Fig.11 In the embodiment, at least one first power electronic device carrier 500 has a metallization layer 502 disposed on an electrically insulating substrate 504. A first power semiconductor die 506 is attached to the metallization layer 502 of the at least one first power electronic device carrier 500. At least one second power electronic device carrier 508 has a metallization layer 510 disposed on an electrically insulating substrate 512. A second power semiconductor die 514 is attached to the metallization layer 510 of the at least one second power electronic device carrier 508. The electrically insulating housing 102 encapsulates the first power semiconductor die 506 and the second power semiconductor die 514, and at least partially encapsulates the at least one first power electronic device carrier 500 and the at least one second power electronic device carrier 508. In one embodiment, the surfaces of the first and second power electronic device carriers 500, 508 opposite to the respective metallization layers 502, 510 (at Fig.11 1 (not visible in FIG. 1 ) is exposed from the electrically insulating housing 102 to provide single-sided cooling of the power semiconductor module 100, for example, as Figure 2 , Figure 3 and Figure 5-7 shown.
[0038] Fig.11 1 to provide an unobstructed view of the components enclosed within the electrically insulating housing 102. The at least one first power electronics carrier 500 and the at least one second power electronics carrier 508 are positioned alongside each other in the xy plane rather than being vertically stacked one above the other in the z direction.
[0039] The first power semiconductor die 506 may be attached to the metallization layer 502 of a single first power electronic device carrier 500, wherein a first subset 516 and a second subset 518 of the first power semiconductor die 506 are arranged symmetrically on the single first power electronic device carrier 500 about a longitudinal centerline AA′ of the power semiconductor module 100. Similarly, the second power semiconductor die 514 may be attached to the metallization layer 510 of a single second power electronic device carrier 508, wherein a first subset 520 and a second subset 522 of the second power semiconductor die are also arranged symmetrically on the single second power electronic device carrier about a longitudinal centerline AA′ of the power semiconductor module 100.
[0040] The first and second subsets 516, 518 of the first power semiconductor die 506 may alternatively be attached to a separate first power electronics carrier 500, wherein the separate first power electronics carrier 500 is arranged symmetrically with respect to each other about the longitudinal centerline AA′ of the power semiconductor module 100. The first subset 520 and the second subset 522 of the second power semiconductor die 514 may similarly be attached to a separate second power electronics carrier 508, wherein the separate second power electronics carrier 508 is also arranged symmetrically with respect to each other about the longitudinal centerline AA′ of the power semiconductor module 100.
[0041] exist Fig.11 In the example shown, the first power semiconductor dies 506 are arranged symmetrically in three rows (x direction) about the package longitudinal centerline AA', with four (two on each side of the longitudinal centerline AA') first power semiconductor dies 506 in each row. The second power semiconductor dies 514 are also arranged symmetrically in three rows (x direction) about the package longitudinal centerline AA', with four (two on each side of the longitudinal centerline AA') second power semiconductor dies 514 in each row. More generally, the power semiconductor module 100 may include at least two first power semiconductor dies 506 and at least two second power semiconductor dies 514, wherein an equal number of first power semiconductor dies 506 and an equal number of second power semiconductor dies 514 are arranged on both sides of the longitudinal centerline AA' of the module 100. This ensures a symmetrical layout of both the power semiconductor dies 506, 514 and the power electronic device carriers 500, 508 within the electrically insulating housing 102 of the module 100.
[0042] The first power semiconductor die 506 and the second power semiconductor die 514 can be electrically interconnected as a half-bridge inside the electrically insulating housing 102 via the lead frame or fixture frame 108 and the substrate formed by the power electronic device carriers 500, 508, wherein the first power semiconductor die 506 forms a low-side switch of the half-bridge and the second power semiconductor die 514 forms a high-side switch of the half-bridge. According to this embodiment, one or more electronic components 402 mounted on the circuit board 118 designed for the power semiconductor module 100 include gate drivers for the low-side switching device and / or the high-side switching device.
[0043] for Fig.11 In the vertical die arrangement shown in FIG. 1 , the drain pad of each first power semiconductor die 506 (at Fig.11 The first power semiconductor die 506 is connected to the metallization layer 502 of the at least one first power electronic device carrier 500 (not visible in FIG. 1 ), wherein the gate pad 524 and the source pad 526 (and optionally one or more sense pads) are at opposite positive sides of the first die 506. The drain pad of each second power semiconductor die 514 (at Fig.11 5 ) is similarly connected to the metallization layer 510 of at least one second power electronic device carrier 508 , with a gate pad 528 and a source pad 530 (and optionally one or more sense pads) at an opposite positive side of the second die 514 .
[0044] At least one lead 532, 534, 536 protrudes from a first side 538 of the electrically insulating housing 102, and at least one lead 540 protrudes from a second side 542 of the electrically insulating housing 102 opposite the first side 538. A longitudinal centerline AA' of the power semiconductor module 100 extends between the first side 538 and the second side 542 of the electrically insulating housing 102.
[0045] exist Fig.11 , two high-side phase or power leads 532, 534 protrude from a first side 538 of the electrically insulating housing 102 to provide a power / phase connection "DC+" to the second (high-side) power semiconductor die 514. The first high-side phase / power lead 532 provides a DC+ power / phase connection to a first subset 520 of the second power semiconductor die 514, and the second high-side phase / power lead 534 provides a DC+ power / phase connection to a second subset 522 of the second power semiconductor die 514. A low-side phase / ground lead 536 also protrudes from the first side 538 of the electrically insulating housing 102 and provides a power / phase connection "DC-" to the first (low-side) power semiconductor die 506. The low-side phase / ground lead 536 is between the first and second high-side phase / power leads 532, 534.
[0046] Switch node lead 540 protrudes from second side 542 of electrically insulating housing 102 and is electrically connected to switch node 'SW' between high-side power semiconductor die 514 and low-side power semiconductor die 506 of the half-bridge. Switch node lead 540 is an output lead for power semiconductor module 100 in this case.
[0047] Internal electrical connections between the package leads 532, 534, 536, 540 and the power semiconductor die 506, 514 enclosed in the electrically insulating housing 102 may be provided by a lead frame or fixture frame 108 overlying the power semiconductor die 506, 514. Fig.11 , the lead frame or fixture frame 108 includes a first structural metal frame 544 disposed over at least one first power electronic device carrier 500 and a second structural metal frame 546 disposed over at least one second power electronic device carrier 508. Features of the structural metal frames 544, 546 may be formed by stamping, punching, etching, etc.
[0048] exist Fig.11, the first structural metal frame 544 and the second structural metal frame 546 are both symmetrical about the longitudinal centerline AA' of the power semiconductor module 100. The terms "symmetrical" and "symmetrical" as used herein include unavoidable asymmetries that may occur due to manufacturing tolerances. However, asymmetry can be intentionally introduced into the lead frame or clamp frame 108. For example, all semiconductor dies 506, 514 can face the same direction, which can introduce less asymmetry in the lead frame or clamp frame 108 relative to the centerline AA' of the power semiconductor module 100.
[0049] In either case, the first structural metal frame 544 is electrically connected to the source pad 526 of each first (low-side) power semiconductor die 506, e.g., by bumps or stamped features 548 at the back side of the first structural metal frame 544, or by solder, a conductive adhesive, etc. The second structural metal frame 546 is electrically connected to the source pad 530 of each second (high-side) power semiconductor die 514, e.g., by bumps or stamped features 550 at the back side of the second structured metal frame 546, or by solder, a conductive adhesive, etc.
[0050] The first and second subsets 516, 518 of the first power semiconductor die 506 may be arranged on opposite sides of the longitudinal centerline AA′ of the power semiconductor module 100 as previously described. The first and second subsets 520, 522 of the second power semiconductor die 514 may similarly be arranged on opposite sides of the longitudinal centerline AA′.
[0051] like Fig.11 As shown, the first structural metal frame 544 may include a first central portion '1' extending along the longitudinal centerline AA'. The first branches '2' are each connected to the first central portion '1' at the proximal end in a first transverse direction ( Figure 1 The second branches '3', which are all connected to the first central portion '1' at the proximal end, extend in parallel over the first subset 516 of the first power semiconductor die 506 in a second lateral direction (-x direction in FIG. 1 ) opposite to the first lateral direction. Figure 1 The second subset 518 of the first power semiconductor die 514 extends in parallel in the x-direction (in the x-direction).
[0052] In addition, if Fig.11As shown, the second structural metal frame 546 includes a second central portion '4' extending along the longitudinal centerline AA'. The third branches '5', each of which is proximally coupled to the second central portion '4', extend in parallel over the first subset 520 of the second power semiconductor die 514 in the first lateral direction. The fourth branches '6', each of which is proximally coupled to the second central portion '4', extend in parallel over the second subset 522 of the second power semiconductor die 514 in the second lateral direction.
[0053] The first branch '2' of the lead frame or clamp frame 108 is vertically connected to the source pad 526 of each power semiconductor die 506 included in the first subset 516 of the first power semiconductor die 506. The second branch '3' of the lead frame or clamp frame 108 is vertically connected to the source pad 526 of each power semiconductor die 506 included in the second subset 518 of the first power semiconductor die 506. The third branch '5' of the lead frame or clamp frame 108 is vertically connected to the source pad 530 of each power semiconductor die 514 included in the first subset 520 of the second power semiconductor die 514. The fourth branch '6' of the lead frame or clamp frame 108 is vertically connected to the source pad 530 of each power semiconductor die 514 included in the second subset 522 of the second power semiconductor die 514.
[0054] The first structural metal frame 544 of the lead frame or clamp frame 108 may include a first additional branch '7' connecting the first branch '2' at the distal end of the first branch '2', and a second additional branch '8' connecting the second branch '3' at the distal end of the second branch '3'. The second structural metal frame 546 of the lead frame or clamp frame 108 may include a third additional branch '9' connecting the third branch '5' at the distal end of the third branch '5', and a fourth additional branch '10' connecting the fourth branch '6' at the distal end of the fourth branch '6'.
[0055] The first structural metal frame 544 of the lead frame or fixture frame 108 may include a first gate metallization '12', which is disposed in an opening 552 formed in a first central portion '1' of the first structural metal frame 544 and is electrically insulated from the first central portion '1', the first branch '2' and the second branch '3'. The first gate metallization '12' is electrically connected to the gate pad 524 of each first power semiconductor die 506, for example, by a bonding wire 554. The second structural metal frame 546 of the lead frame or fixture frame 108 may include a second gate metallization '14', which is disposed in an opening 556 formed in a second central portion '4' of the second structural metal frame 546 and is electrically insulated from the second central portion '4', the third branch '5' and the fourth branch '6'. The second gate metallization '14' is electrically connected to the gate pad 528 of each second power semiconductor die 514, for example, by a bonding wire 558.
[0056] The first and second gate metallizations '12', '14' may be part of the lead frame or fixture frame 108, as explained above. The first and second gate metallizations '12', '14' may alternatively be part of respective first and second PCBs disposed in corresponding openings 552, 556 formed in the first center portion '1' and the second center portion '4' of the lead frame or fixture frame 108. In another example, the first and second gate metallizations '12', '14' may be part of respective first and second additional power electronic device carriers disposed in respective openings 552, 556 formed in the first center portion '1' and the second center portion '4' of the lead frame or fixture frame 108.
[0057] The first press-fit pin 560 may be attached to the first gate metallization '12' and protrude through the first side 112 of the electrically insulating housing 102. The second press-fit pin 562 may be attached to the second gate metallization '14' and protrude through the first side 112 of the electrically insulating housing 102. The power semiconductor module 100 may include additional press-fit pins 564, one or more of which may be attached to the first structural metal frame 544 and / or the second structural metal frame 546 and protrude through the first side 112 of the electrically insulating housing 102, for example for external current sensing, temperature sensing, etc. The press-fit pins 560, 562, 564 form part of the electrical connection interface 114 of the power semiconductor module 100.
[0058] The second structural metal frame 546 of the lead frame or clamp frame 108 may include an additional branch '16' at an end of the second central portion '4' of the second structural metal frame 546 and facing the first structural metal frame 544. The additional branch '16' extends parallel to the third branch '5' and the fourth branch '6' of the second structural metal frame 546. The additional branch '16' is vertically connected to the metallization layer 502 of the at least one first power electronic device carrier 500, for example, by a bump or stamping feature 566 at the back side of the additional branch '16', or by solder, a conductive adhesive, etc.
[0059] exist Fig.11 , the metallization layer 502 of at least one first power electronic device carrier 500 is electrically connected to the drain pad (not visible) of each first power semiconductor die 506. The metallization layer 510 of at least one second power electronic device carrier 508 is electrically connected to the drain pad (not visible) of each second power semiconductor die 514. The first structured metal frame 544 is electrically connected to the source pad 526 of each first power semiconductor die 506. The second structured metal frame 546 is electrically connected to the source pad 530 of each second power semiconductor die 514. The additional branch '16' of the second structured metal frame 546 forms a switch node connection 'SW' between the drain pad of each first power semiconductor die 506 and the source pad 530 of each second power semiconductor die 514.
[0060] exist Fig.11 , the first high side phase / power lead 532 and the second high side phase / power lead 534 are both electrically connected to the metallization layer 510 of the at least one second power electronic device carrier 508. The first high side phase / power lead 532 is located on one side of the first structural metal frame 544, and the second high side phase / power lead 534 is located on the side of the first structural metal frame 544 opposite to the first high side phase / power lead 532.
[0061] Ends of the first structural metal frame 544 may protrude from the first side 538 of the electrically insulating housing 102 to form low-side phase / ground leads 536 of the power semiconductor module 100. Ends of the second structural metal frame 546 may protrude from the second side 542 of the electrically insulating housing 102 to form switch node leads 540 of the power semiconductor module 100.
[0062] exist Fig.11 In the embodiment, the vibration damper 120 is attached to the lead frame or fixture frame 108 and protrudes through the first side 112 of the electrically insulating housing 102 separately from the electrical connection interface 114. For example, the vibration damper 120 may be as shown in FIG. Figure 1-3 and Figure 5 Pin type shown or as Figure 7 The vibration damper 120 may be welded, fused, or press-fitted to the lead frame or fixture frame 108 .
[0063] Fig.12 FIG. 1 shows a top perspective view of another embodiment of a power semiconductor module 100 . Fig.12 In the embodiment of FIG. 5 , the source connection to the first power semiconductor die 506 is formed by a first bonding wire 600 that connects the first center portion '1' of the first structural metal frame 544 to the source pad 526 of each first power semiconductor die 506. The source connection to the second power semiconductor die 514 is similarly formed by a second bonding wire 602 that connects the second center portion '4' of the second structural metal frame 546 to the source pad 530 of each second power semiconductor die 514. Therefore, in FIG. Fig.12 , branches '2', '3', '7' and '8' of the first structural metal frame 544 and branches '5', '6', '9' and '10' of the second structural metal frame 546 are omitted from the lead frame or fixture frame 108 and replaced by bonding wires 600, 602. An additional branch '16' of the second structural metal frame 546 is formed by Fig.12 The third bonding wire 604 in is electrically connected to the metallization layer 502 of the at least one first power electronic device carrier 500 to complete the switch node connection 'SW'.
[0064] exist Fig.12 , gate connections to the power semiconductor dies 506, 514 are provided by at least one PCB 606 disposed in an opening 552 formed in a first center portion '1' of a first structural metal frame 544 and in an opening 556 formed in a second center portion '4' of a second structural metal frame 546. The at least one PCB 606 has one or more first metal traces 608 electrically connected to a gate pad 524 of each first power semiconductor die 506 and one or more second metal traces 610 electrically connected to a gate pad 528 of each second power semiconductor die 514. External gate connections may be provided by respective press-fit connectors 612, 614. The at least one PCB 606 may be replaced by at least one additional power electronic device carrier such as a DCB substrate, an AMB substrate, an IMS, etc.
[0065] exist Fig.12, a first structural metal frame 544 is wire bonded to the source pad 526 of each first power semiconductor die 506, and a second structural metal frame 546 is wire bonded to the source pad 530 of each second power semiconductor die 514. An additional branch '16' of the second structural metal frame 546 may be divided into two segments '16a', '16b' to accommodate at least one PCB / power electronics carrier 606 that provides a gate connection to the power semiconductor dies 506, 514. Each segment '16a', '16b' of the additional branch '16' of the second structural metal frame 546 is wire bonded to the metallization layer 502 of the first power electronics carrier 500 to form a switch node connection 'SW' between a drain pad (not visible) of each first power semiconductor die 506 and a source pad 530 of each second power semiconductor die 514.
[0066] Although the present disclosure is not limited in this regard, the following numbered examples demonstrate one or more aspects of the present disclosure.
[0067] Example 1. A power semiconductor module comprises: an electrically insulating housing; a plurality of power semiconductor dies attached to a substrate inside the electrically insulating housing; a lead frame or a clamp frame disposed above the plurality of power semiconductor dies inside the electrically insulating housing and electrically connected to the plurality of power semiconductor dies; a plurality of contact pins attached to the lead frame or the clamp frame and protruding through a first side of the electrically insulating housing to form an electrical connection interface outside the electrically insulating housing; and a plurality of vibration dampers attached to the lead frame or the clamp frame and protruding through the first side of the electrically insulating housing separately from the electrical connection interface, wherein the plurality of vibration dampers are configured to suppress vibrations at a circuit board designed to be mounted to the power semiconductor module and do not affect the electrical operation of the power semiconductor module.
[0068] Example 2. The power semiconductor module of Example 1, wherein the plurality of vibration dampers comprises a plurality of additional pins attached to the lead frame or the clamp frame and protruding through the first side of the electrically insulating housing.
[0069] Example 3. The power semiconductor module of Example 2, wherein the plurality of additional pins comprises press-fit pins.
[0070] Example 4. The power semiconductor module of Example 1, wherein the plurality of vibration dampers comprises a plurality of thread-type fasteners attached to the lead frame or clamp frame and protruding through the first side of the electrically insulating housing.
[0071] Example 5. The power semiconductor module according to any one of Examples 1 to 4, wherein the power semiconductor die are electrically interconnected inside the electrically insulating housing through the substrate and the lead frame or the clamp frame to form a low-side switch device and / or a high-side switch device of one or more half bridges.
[0072] Example 6. The power semiconductor module according to any one of Examples 1 to 5, wherein a portion of the lead frame or the clamp frame protrudes through the first side of the electrically insulating housing to form a power terminal of the power semiconductor module.
[0073] Example 7. A power semiconductor module according to any one of Examples 1 to 6, wherein each power semiconductor die has a source pad on a side of the power semiconductor die facing the lead frame or the clamp frame, and wherein the lead frame or the clamp frame provides an electrical connection to the source pad of each power semiconductor die.
[0074] Example 8. A power electronic device system, comprising: a power semiconductor module, the power semiconductor module comprising: an electrically insulating housing; a plurality of power semiconductor dies attached to a substrate inside the electrically insulating housing; a lead frame or a clamp frame disposed above the plurality of power semiconductor dies inside the electrically insulating housing and electrically connected to the plurality of power semiconductor dies; a plurality of pins attached to the lead frame or the clamp frame and protruding through a first side of the electrically insulating housing to form an electrical connection interface outside the electrically insulating housing; and a plurality of vibration dampers attached to the lead frame or the clamp frame and protruding through the first side of the electrically insulating housing separately from the electrical connection interface; and a circuit board, the circuit board comprising: a plurality of electronic components mounted thereon; a plurality of first openings accommodating the plurality of pins; and a plurality of second openings accommodating the plurality of vibration dampers, wherein the plurality of vibration dampers are configured to suppress vibrations at the circuit board and not affect the electrical operation of the power semiconductor module.
[0075] Example 9. The power electronics system of Example 8, wherein the plurality of vibration dampers comprises a plurality of additional pins attached to the lead frame or clamp frame and protruding through the first side of the electrically insulating housing and into the plurality of second openings in the circuit board.
[0076] Example 10. The power electronics system of Example 9, wherein the plurality of additional pins comprises press-fit pins that form a press-fit connection with the plurality of second openings in the circuit board.
[0077] Example 11. The power electronics system of Example 9 or 10, wherein the circuit board has a plurality of metal traces that electrically interconnect the plurality of pins of the power semiconductor module to one or more of the electronic components mounted on the circuit board, and wherein the plurality of additional pins are electrically insulated from the plurality of metal traces.
[0078] Example 12. The power electronics system of Example 8, wherein the plurality of vibration dampers comprises a plurality of thread-type fasteners attached to the lead frame or clamp frame and protruding through the first side of the electrically insulating housing to form a threaded connection with the plurality of second openings in the circuit board.
[0079] Example 13. The power electronics system of Example 12, wherein the circuit board has a plurality of metal traces that electrically interconnect the plurality of pins of the power semiconductor module to one or more of the electronic components mounted on the circuit board, and wherein the plurality of threaded fasteners are electrically insulated from the plurality of metal traces.
[0080] Example 14. A power electronic device system according to any one of Examples 8 to 13, wherein the power semiconductor die is electrically interconnected inside the electrically insulating housing via the substrate and the lead frame or the fixture frame to form a low-side switch device and / or a high-side switch device of one or more half-bridges, and wherein one or more of the electronic components mounted on the circuit board include a gate driver for the low-side switch device and / or the high-side switch device.
[0081] Example 15. The power electronics system of any one of Examples 8 to 14, wherein a portion of the lead frame or the clamp frame protrudes through the first side of the electrically insulating housing to form a power terminal of the power semiconductor module.
[0082] Example 16. The power electronic device system of any one of Examples 8 to 15, wherein each power semiconductor die included in the power semiconductor module has a source pad facing the lead frame or the clamp frame, and wherein the lead frame or the clamp frame provides an electrical connection to the source pad of each power semiconductor die.
[0083] Example 17 The power electronic device system according to any one of Examples 8 to 16 further includes: a heat sink mounted to a side of the power semiconductor module facing away from the circuit board.
[0084] Terms such as "first", "second", etc. are used to describe various elements, regions, parts, etc., and are not intended to be limiting. Throughout the description, like terms refer to like elements.
[0085] As used herein, the terms "having", "containing", "including", "comprising", etc. are open-ended terms indicating the presence of stated elements or features, but do not exclude additional elements or features. Unless the context clearly indicates otherwise, the terms "a", "an", and "the" are intended to include the plural as well as the singular.
[0086] Unless otherwise expressly stated, "and / or" should be interpreted as including all possible conjunctive and disjunctive combinations. For example, "A and / or B" should be interpreted as referring to only A, only B, or both A and B. Unless otherwise expressly stated, the expression "at least one" should be interpreted in the same manner as "and / or". For example, the expression "at least one of A and B" should be interpreted as referring to only A, only B, or both A and B.
[0087] It should be understood that the features of the various embodiments described herein may be combined with each other, unless specifically stated otherwise.
[0088] Although specific embodiments have been shown and described herein, it will be understood by those skilled in the art that various alternative and / or equivalent embodiments may be used to replace the specific embodiments shown and described without departing from the scope of the present invention. This application is intended to cover any adaptation or variation of the specific embodiments discussed herein. Therefore, it is intended that the present invention be limited only by the claims and their equivalents.
Claims
1. A power semiconductor module, characterized in that: The power semiconductor module comprises: Electrically insulating housing; a plurality of power semiconductor dies attached to the substrate inside the electrically insulating housing; a lead frame or a clip frame disposed over and electrically connected to the plurality of power semiconductor dies inside the electrically insulating housing; a plurality of contact pins attached to the lead frame or the fixture frame and protruding through the first side of the electrically insulating housing to form an electrical connection interface outside the electrically insulating housing; and a plurality of vibration dampers attached to the lead frame or fixture frame and protruding through the first side of the electrically insulating housing separately from the electrical connection interface, The plurality of vibration dampers are configured to suppress vibration at a circuit board, to which the circuit board is designed to be mounted, and not to affect electrical operation of the power semiconductor module.
2. The power semiconductor module according to claim 1, wherein: The plurality of vibration dampers include a plurality of additional pins attached to the lead frame or the clamp frame and protruding through the first side of the electrically insulating housing.
3. The power semiconductor module according to claim 2, wherein: The plurality of additional pins include press-fit pins.
4. The power semiconductor module according to claim 1, wherein: The plurality of vibration dampers include a plurality of thread-type fasteners attached to the lead frame or clamp frame and protruding through the first side of the electrically insulating housing.
5. The power semiconductor module according to claim 1, wherein: The power semiconductor dies are electrically interconnected inside the electrically insulating housing via the substrate and the lead frame or the fixture frame to form low-side switching devices and / or high-side switching devices of one or more half-bridges.
6. The power semiconductor module according to claim 1, wherein: A portion of the lead frame or the clip frame protrudes through the first side of the electrically insulating housing to form a power terminal of the power semiconductor module.
7. The power semiconductor module according to claim 1, wherein: Each power semiconductor die has a source pad on a side of the power semiconductor die facing the lead frame or the clamp frame, and wherein the lead frame or the clamp frame provides an electrical connection to the source pad of each power semiconductor die.
8. A power electronic device system, characterized in that: The power electronic device system comprises: A power semiconductor module, the power semiconductor module comprising: an electrically insulating housing; a plurality of power semiconductor dies attached to a substrate inside the electrically insulating housing; a lead frame or a clamp frame disposed above the plurality of power semiconductor dies inside the electrically insulating housing and electrically connected to the plurality of power semiconductor dies; a plurality of pins attached to the lead frame or the clamp frame and protruding through a first side of the electrically insulating housing to form an electrical connection interface outside the electrically insulating housing; and a plurality of vibration dampers attached to the lead frame or the clamp frame and protruding through the first side of the electrically insulating housing separately from the electrical connection interface; and A circuit board comprising: a plurality of electronic components mounted thereon; a plurality of first openings for accommodating the plurality of pins; and a plurality of second openings for accommodating the plurality of vibration dampers, The plurality of vibration dampers are configured to suppress vibration at the circuit board and not affect electrical operation of the power semiconductor module.
9. The power electronic device system according to claim 8, wherein: The plurality of vibration dampers include a plurality of additional pins attached to the lead frame or clamp frame and protruding through the first side of the electrically insulating housing and into the plurality of second openings in the circuit board.
10. The power electronic device system according to claim 9, wherein: The plurality of additional pins include press-fit pins that form a press-fit connection with the plurality of second openings in the circuit board.
11. The power electronic device system according to claim 9, wherein: The circuit board has a plurality of metal traces electrically interconnecting the plurality of pins of the power semiconductor module to one or more of the electronic components mounted on the circuit board, and wherein the plurality of additional pins are electrically insulated from the plurality of metal traces.
12. The power electronic device system according to claim 8, wherein: The plurality of vibration dampers include a plurality of thread-type fasteners attached to the lead frame or fixture frame and protruding through the first side of the electrically insulating housing to form threaded connections with the plurality of second openings in the circuit board.
13. The power electronic device system according to claim 12, wherein: The circuit board has a plurality of metal traces that electrically interconnect the plurality of pins of the power semiconductor module to one or more of the electronic components mounted on the circuit board, and wherein the plurality of threaded fasteners are electrically insulated from the plurality of metal traces.
14. The power electronic device system according to claim 8, wherein: The power semiconductor die is electrically interconnected inside the electrically insulating housing through the substrate and the lead frame or the clamp frame to form a low-side switching device and / or a high-side switching device of one or more half-bridges, and wherein one or more of the electronic components mounted on the circuit board include a gate driver for the low-side switching device and / or the high-side switching device.
15. The power electronic device system according to claim 8, wherein: A portion of the lead frame or the clip frame protrudes through the first side of the electrically insulating housing to form a power terminal of the power semiconductor module.
16. The power electronics system according to claim 8, wherein: Each power semiconductor die included in the power semiconductor module has a source pad facing the lead frame or the clip frame, and wherein the lead frame or the clip frame provides an electrical connection to the source pad of each power semiconductor die.
17. The power electronics system according to claim 8, wherein: The power electronics system further comprises: A heat sink is mounted on a side of the power semiconductor module facing away from the circuit board.