Semiconductor chip with annular groove packaging detection structure

Abstract

The utility model provides a semiconductor chip with an annular groove packaging detection structure. The semiconductor chip with the annular groove packaging detection structure comprises a bonding pad portion used for heat dissipation and electrical connection and a packaging portion used for packaging the bonding pad portion after electrical connection. An annular groove is formed in the face, away from the bonding pad part, of the packaging part, the circle center position of the annular groove coincides with the center position of the face, away from the bonding pad part, of the packaging part, three protruding points are arranged in the annular groove, the three protruding points are arranged on the bottom face of the annular groove and are irregularly distributed along the bottom face of the annular groove, and due to the arrangement of the positioning groove, the protruding points can be located in the annular groove. According to the technical scheme of the invention, the central position of the semiconductor chip can be quickly positioned through the positioning dots during the packaging identification of the semiconductor chip, then the position of the annular groove is identified, three salient points are found according to the position of the annular groove, and the three salient points are compared with the preset salient point positions, so that the packaging position of the semiconductor chip can be corrected. And therefore, the effect of quickly identifying the packaging condition of the semiconductor chip can be realized.

Description

Technical Field

[0001] The present application relates to the technical field of semiconductor chip packaging, and in particular to a semiconductor chip with an annular groove packaging detection structure. Background Art

[0002] With the rapid development of the electronics market, semiconductor chips are being used more and more widely, and the demand is also increasing. In order to adapt to and meet market demand, higher and higher requirements are put forward for semiconductor chips. However, the traditional chip packaging module detection method is difficult to meet the needs of high-speed and high-precision detection of surface mount chips. The appearance quality inspection of chip packaging mainly includes chip inclination detection, printed character detection, chip pin size detection, and pin electrical performance detection. For the above inspection items, companies initially used manual inspection. With the development and widespread application of computer technology and optoelectronic technology, machine vision systems have been widely recognized for their safety, reliability, non-contact and non-destructiveness. Especially in the semiconductor chip packaging and testing industry, machine vision systems have been gradually introduced for automated operation of semiconductor production lines, such as chip inclination detection, chip character printing quality detection, chip pin integrity detection and other links to ensure the reliability of chip factory quality.

[0003] In addition to software packaging improvements, chip packaging testing also requires hardware assistance with a packaged chip structure that is more suitable for detection to make detection more efficient and faster. Existing methods for detecting packaged chips mostly use cameras for recognition, but since it is difficult to extract the structural features of existing packaged chips, it takes a long time to process and occupies more computing power. Summary of the invention

[0004] An embodiment of the present invention provides a semiconductor chip with an annular groove packaging detection structure, so as to at least solve the problem of inaccurate positioning during packaging detection in the related art.

[0005] According to one embodiment of the present invention, there is provided a semiconductor chip with an annular groove packaging detection structure, the semiconductor chip comprising: a pad portion for heat dissipation and electrical connection and a packaging portion for packaging the pad portion after electrical connection;

[0006] An annular groove is provided on a side of the packaging part away from the pad part, the center position of the annular groove coincides with the center position of the side of the packaging part away from the pad part, three protrusions are provided in the annular groove, the three protrusions are provided on the bottom surface of the annular groove, and the three protrusions are irregularly distributed along the bottom surface of the annular groove.

[0007] Furthermore, a positioning groove is provided at the center of the annular groove.

[0008] Furthermore, a positioning dot is arranged at the center of the positioning groove.

[0009] Furthermore, the interval ratio between each two adjacent protrusions is 3:2:1.

[0010] Furthermore, the three protrusions are circular protrusions with a diameter of 1 mm.

[0011] Furthermore, the three protrusions are arranged as protrusions with color markings.

[0012] Through the present invention, the setting of the positioning groove can ensure that when performing semiconductor chip packaging identification, the center position of the semiconductor chip can be quickly located through the positioning dot. After that, the position of the annular groove is identified, and the three convex points therein are found according to the position of the annular groove. Since it is irregularly distributed, it is only necessary to find the three convex points and compare them with the pre-set convex point positions to correct the packaging position of the semiconductor chip, thereby achieving the effect of quickly identifying the packaging status of the semiconductor chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of this application. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0014] Figure 1 The overall structure diagram of the semiconductor chip provided in the embodiment of the present application;

[0015] Figure 2 A schematic plan view of a side of the packaging portion of the present application away from the pad portion provided in an embodiment of the present application;

[0016] Figure 3 A schematic diagram of the annular groove structure provided in an embodiment of the present application.

[0017] In the figure, 1, pad part; 2, packaging part; 3, annular groove; 4, bump; 6, positioning groove; 7, positioning dot. DETAILED DESCRIPTION

[0018] The following will describe the technical solutions in the embodiments of the present application in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0019] Embodiment: In this embodiment, the semiconductor chips described below are all QFN chips. Since QFN chips are prone to defects such as tilt and character printing position errors during the production process, which directly affect the chip detection efficiency and stability, in order to solve this problem, in this embodiment, a semiconductor chip with an annular groove packaging detection structure is proposed, such as Figure 1 As shown, the semiconductor chip includes a pad portion 1 for heat dissipation and electrical connection and a packaging portion 2 for packaging the pad portion 1 after electrical connection, wherein the pad portion 1 includes a large exposed pad at the bottom center for heat conduction, and conductive pads for electrical connection are arranged around the packaging periphery surrounding the large pad. The packaging portion 2 is a sealing portion for packaging the completed electrical connection.

[0020] Reference Figure 2 and Figure 3 As shown, in the present embodiment, an annular groove 3 is provided on the side of the packaging portion 2 away from the pad portion 1, and the center position of the annular groove 3 coincides with the center position of the side of the packaging portion 2 away from the pad portion 1. This setting is to ensure that the annular groove 3 is located at the center position of the entire semiconductor chip, and to ensure that the area to be identified can be quickly determined during identification. Three protrusions 4 are provided in the annular groove 3, and the three protrusions 4 are provided on the bottom surface of the annular groove 3. The three protrusions 4 are irregularly distributed along the bottom surface of the annular groove 3. The function of the three protrusions 4 is to accurately determine the position of the entire packaging portion 2 by positioning the three protrusions 4 when the camera is identifying. At the same time, since the three protrusions 4 are irregularly distributed, the direction of the packaging portion 2 can be directly determined by the three protrusions 4. Theoretically, as long as the three protrusions 4 are not arranged at equal intervals along the circumference of the annular groove 3, it will be sufficient. However, in the present embodiment, in order to facilitate the setting and identification, each adjacent protrusion 4 is arranged at equal intervals. The spacing ratio of the circumference between two bumps 4 is preferably 3:2:1, that is, the angles between the connecting lines of the center of the annular groove 3 and each bump 4 are 60 degrees, 120 degrees and 180 degrees respectively. At the same time, in order to facilitate the identification of the bump 4, in this embodiment, the bump 4 is preferably a circular bump 4 with a diameter of 1 mm. This setting does not affect the integrity of the package. At the same time, this length is convenient for production and camera recognition. At the same time, the bump 4 and the smaller occupied area are set to ensure the integrity and usability of the semiconductor chip, so that it is still suitable for most practical uses. The bump 4 can be set as a bump 4 with a color mark, such as spraying a color on the bottom of the bump 4, so that the camera can recognize its position more quickly, but in most applications, color marking cannot be applied. Only in a few cases, color marking can be used to speed up the recognition speed.

[0021] In this embodiment, in order to achieve faster identification, a positioning groove 6 is provided at the center of the annular groove 3, and a positioning dot 7 is provided at the center of the positioning groove 6, that is, the positioning dot 7 is located at the center position of the side of the packaging portion 2 away from the pad portion 1. The positioning groove 6 is provided to ensure that the positioning dot 7 is not higher than the highest point of the side of the packaging portion 2 away from the pad portion 1, and the positioning dot 7 is provided to quickly capture the position of the positioning dot 7 during camera detection, thereby more quickly determining the position of the annular groove 3 and achieving faster identification of the position of the bump 4.

[0022] Through the present application, the setting of the positioning groove 6 can ensure that when performing semiconductor chip packaging identification, the center position of the semiconductor chip can be quickly located through the positioning dot 7. After that, the position of the annular groove 3 is identified, and the three protrusions 4 therein are found according to the position of the annular groove 3. Since they are irregularly distributed, it is only necessary to find the three protrusions 4 and compare them with the pre-set positions of the protrusions 4 to correct the packaging position of the semiconductor chip, thereby achieving the effect of quickly identifying the packaging status of the semiconductor chip.

[0023] The terms "first", "second", etc. in the specification and claims of this application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the terms used in this way can be interchangeable under appropriate circumstances. This is just a way of distinguishing objects with the same attributes when describing the embodiments of this application.

[0024] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The singular forms of "a", "" and "the" used in the embodiments of the present application are also intended to include plural forms, unless the context clearly indicates other meanings. It should also be understood that in the description of the present application, unless otherwise specified, " / " indicates that the objects associated before and after are in an "or" relationship, for example, A / B can represent A or B; "and / or" in the present application is only a description of the association relationship of associated objects, indicating that three relationships can exist, for example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone, where A and B can be singular or plural.

[0025] As used herein, the words “if” or “if” may be interpreted as “at the time of” or “when” or “in response to determining” or “in response to detecting”, depending on the context. Similarly, the phrases “if it is determined” or “if (stated condition or event) is detected” may be interpreted as “when it is determined” or “in response to determining” or “when detecting (stated condition or event)” or “in response to detecting (stated condition or event)”, depending on the context.

[0026] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, a person of ordinary skill in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features thereof may be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A semiconductor chip with an annular groove packaging detection structure, characterized in that: The semiconductor chip comprises: a pad portion (1) for heat dissipation and electrical connection and a packaging portion (2) for packaging the pad portion (1) after electrical connection; An annular groove (3) is arranged on a side of the packaging part (2) away from the pad part (1); the center position of the annular groove (3) coincides with the center position of a side of the packaging part (2) away from the pad part (1); three protrusions (4) are arranged in the annular groove (3); the three protrusions (4) are arranged on the bottom surface of the annular groove (3); and the three protrusions (4) are irregularly distributed along the bottom surface of the annular groove (3).

2. A semiconductor chip with an annular groove packaging detection structure according to claim 1, characterized in that: A positioning groove (6) is provided at the center of the annular groove (3).

3. The semiconductor chip with an annular groove packaging detection structure according to claim 2, characterized in that: A positioning dot (7) is arranged at the center of the positioning groove (6).

4. The semiconductor chip with an annular groove packaging detection structure according to claim 1, characterized in that: The spacing ratio between any two adjacent protrusions (4) is 3:2:

1.

5. The semiconductor chip with an annular groove packaging detection structure according to claim 1, characterized in that: The three protruding points (4) are circular protruding points (4) with a diameter of 1 mm.

6. The semiconductor chip with an annular groove packaging detection structure according to claim 5, characterized in that: The three protruding points (4) are arranged as protruding points (4) with color markings.

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