Package structure

Abstract

A package structure includes an interposer, a control unit, a plurality of arithmetic units, a signal transmission layer and a photoelectric material. The control unit is bonded to the interposer, and the arithmetic unit is disposed around the control unit and connected to the control unit. The signal transmission layer is formed in the control unit and the operation unit, the photoelectric material is formed in the control unit and the operation unit, and the photoelectric material and the signal transmission layer are overlapped.

Description

Technical Field

[0001] The embodiments of the utility model relate to a packaging structure, and more particularly to a packaging structure provided with an optoelectronic material overlapping with a signal transmission layer. Background Art

[0002] The semiconductor industry continues to increase the integration density of various electronic components (e.g., transistors, diodes, resistors, capacitors, etc.) by continuously reducing the minimum feature size, which allows more components to be integrated into a given area. Individual dies are usually packaged separately. The package not only provides protection for the semiconductor device from environmental contamination, but also provides a connection interface for the semiconductor device packaged therein.

[0003] Three dimensional integrated circuit (3DIC) is the latest development in semiconductor packaging, in which multiple semiconductor dies are stacked on top of each other, such as package-on-package (PoP) and system-in-package (SiP) packaging technologies. Some 3D integrated circuits are prepared at the semiconductor wafer level by placing dies on top of dies. 3D integrated circuits offer improved integration density and other advantages, such as faster speed and higher bandwidth, due to, for example, shortened interconnect lengths between stacked dies. However, there are still many challenges associated with 3D integrated circuits. Utility Model Content

[0004] The purpose of the present invention is to provide a packaging structure to solve at least one of the above problems.

[0005] The present invention provides a packaging structure, including an interposer, a control unit, a plurality of computing units, a signal transmission layer, and an optoelectronic material. The control unit is bonded to the interposer. The computing unit is disposed around the control unit and connected to the control unit. The signal transmission layer is formed in the control unit and the computing unit. The optoelectronic material is formed in the control unit and the computing unit, and the optoelectronic material overlaps the signal transmission layer.

[0006] According to one embodiment of the present invention, the plurality of computing units are separated from the control unit by a bottom filler, and the plurality of computing units are connected to the control unit via another signal transmission layer in the intermediate layer.

[0007] According to one embodiment of the present invention, it further includes: a signal source connected to the intermediate layer, wherein the signal source is connected to the control unit or the plurality of the computing units through the signal transmission layer.

[0008] According to one embodiment of the present invention, it further includes: an optical element, which is disposed in the control unit and connected to the plurality of computing units through the signal transmission layer.

[0009] According to one embodiment of the present invention, a width of the photoelectric material is different from a width of the signal transmission layer.

[0010] The present invention provides a packaging structure, including an interposer, a signal transmission layer formed in the interposer, an optoelectronic material formed in the interposer, a control unit bonded to the interposer, and a plurality of computing units. The optoelectronic material overlaps with the signal transmission layer. The computing unit is bonded to the interposer and connected to the control unit through the signal transmission layer.

[0011] According to one embodiment of the present invention, the present invention further includes: a redistribution structure formed in the intermediate layer, wherein the redistribution structure is isolated from the signal transmission layer.

[0012] According to one embodiment of the present invention, the device further includes: a processor connected to the intermediate layer; and a memory device connected to the intermediate layer and adjacent to the processor, wherein the processor and the memory device are connected to the control unit via the redistribution structure.

[0013] According to one embodiment of the present invention, the control unit and the multiple computing units further include: a second signal transmission layer formed in the control unit and the multiple computing units; and a second photoelectric material formed in the control unit and the multiple computing units, wherein the second photoelectric material overlaps with the second signal transmission layer.

[0014] According to one embodiment of the present invention, a side wall of the photoelectric material is vertically aligned with a side wall of the signal transmission layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The following detailed description and the accompanying drawings provide a better understanding of the concepts of the embodiments of the present invention. It should be noted that, in accordance with standard practice in the industry, the various features in the drawings are not necessarily drawn to scale. In fact, the sizes of the various features may be arbitrarily enlarged or reduced to make the description clear. Similar features are indicated by similar reference numerals throughout the specification and drawings.

[0016] Figures 1A to 1D are cross-sectional views illustrating various stages of forming a package structure according to some embodiments of the present disclosure.

[0017] Figure 2 is a top view showing a packaging structure according to some embodiments of the present disclosure.

[0018] Figure 3is a cross-sectional view showing a package structure according to some embodiments of the present disclosure.

[0019] Figure 4A is a cross-sectional view showing a signal transmission layer and optoelectronic materials in a computing unit according to some embodiments of the present disclosure.

[0020] Figure 4B is a top view of a signal transmission layer and optoelectronic materials in a computing unit according to some embodiments of the present disclosure.

[0021] Figure 5 is a cross-sectional view showing a package structure according to some embodiments of the present disclosure.

[0022] Figure 6 is a top view showing a packaging structure according to some embodiments of the present disclosure.

[0023] Figure 7 is a cross-sectional view showing a package structure according to some embodiments of the present disclosure.

[0024] Figure 8 is a top view showing a packaging structure according to some embodiments of the present disclosure.

[0025] Fig. 9 is a cross-sectional view showing a package structure according to some embodiments of the present disclosure.

[0026] Fig.10 is a top view showing a packaging structure according to some embodiments of the present disclosure.

[0027] Fig.11 is a top view showing a packaging structure according to some embodiments of the present disclosure.

[0028] Fig.12 is a top view showing a packaging structure according to some embodiments of the present disclosure.

[0029] Fig.13 is a cross-sectional view showing a package structure according to some embodiments of the present disclosure.

[0030] The reference numerals are as follows:

[0031] 50: Base

[0032] 51: substrate through hole structure

[0033] 52: Base material

[0034] 53: Conductive characteristics

[0035] 55: Conductive pad

[0036] 57: Bump structure

[0037] 100: Packaging structure

[0038] 110: Intermediary layer

[0039] 115: Redistribution structure

[0040] 120: Control unit

[0041] 121: Integrated Circuits

[0042] 122:Internal connection structure

[0043] 123: Dielectric layer

[0044] 124:Semiconductor device

[0045] 125: Conductive characteristics

[0046] 130: Arithmetic unit

[0047] 131: Integrated Circuits

[0048] 132:Internal connection structure

[0049] 133: Dielectric layer

[0050] 134:Semiconductor device

[0051] 135: Conductive characteristics

[0052] 140,145:Signal transmission layer

[0053] 150,155: Optoelectronic Materials

[0054] 160: Bottom filler

[0055] 170:Signal source

[0056] 180: Processor

[0057] 185: Memory device

[0058] 190:Optical Components

[0059] 200,300,400,500,600,700,800:Package structure DETAILED DESCRIPTION

[0060] The following disclosure provides many different embodiments or examples to implement different features of the embodiments of the present utility model. Reference numerals and / or letters may be reused in the various examples described in the present disclosure. These repetitions are for the purpose of brevity and clarity and do not in themselves represent any relationship between the various embodiments and / or configurations disclosed. In addition, specific examples of components and configurations are described below to simplify the description of the embodiments of the present utility model. Of course, these specific examples are only exemplary and are not intended to limit the embodiments of the present utility model. For example, in the following description, it is mentioned that a first feature is formed on or above a second feature, which means that it may include an embodiment in which the first feature and the second feature are in direct contact, and may also include an additional feature formed between the first feature and the second feature, so that the first feature and the second feature may not be in direct contact.

[0061] Additionally, spatially relative terms may be used herein. For example, "below," "below," "lower," "above," "higher," and similar terms may be used to describe the relationship between one element or feature and another element or features shown in the accompanying drawings. These spatially relative terms are intended to include different orientations of the device in use or operation in addition to the orientation shown in the accompanying drawings. The device may be turned to different orientations (rotated 90 degrees or other orientations), and the spatially relative terms used herein may be interpreted similarly.

[0062] An embodiment of a packaging structure and a method for forming the same are provided. The packaging structure includes a control unit and a plurality of computing units surrounding the control unit. Therefore, the connection between the control unit and each computing unit can be shortened, and the manufacturing cost can be reduced. In addition, by adding an optoelectronic material overlapping the signal transmission layer to change the characteristics of the transmitted optical signal, the overall performance of the packaging structure can be improved. The optoelectronic material can be arranged in the intermediate layer or the control unit and the computing unit. In this way, a variety of packaging structure designs can be adopted.

[0063] Figures 1A to 1D 1 is a cross-sectional view showing various stages of forming a package structure 100 according to some embodiments of the present disclosure. Figure 1A , a substrate 50 is provided, and a plurality of through-substrate via (TSV) structures 51 may be formed in the substrate 50. In some embodiments, the substrate 50 may include a non-organic interposer material, such as a silicon-based dielectric material (e.g., silicon oxide, porous or non-porous organosilicate glass, silicon carbonitride, silicon nitride, or any other non-organic interconnect-level dielectric material).

[0064] In some embodiments, more than one non-organic interposer material layer may be deposited by spin coating and drying the corresponding non-organic dielectric material to form the substrate 50. For example, the substrate 50 may be formed in a series of steps, such as by sequentially forming a through-substrate via structure 51 in each layer of the substrate 50. The through-substrate via structure 51 may be initially formed as a through-hole structure within the substrate 50, wherein the vertical dimension of the through-substrate via structure 51 is less than the thickness of the substrate 50. Subsequently, the back side of the substrate 50 may be removed, so that the “through-silicon” configuration of the substrate 50 is as shown in FIG. Figure 1D shown.

[0065] In some embodiments, a hard mask layer (not shown, such as a silicon nitride layer and / or a borosilicate glass layer) and a patterned photoresist layer may be formed on and / or over the front side surface of the substrate 50. Anisotropic etching using the hard mask (and the patterned photoresist layer optionally used) as an etching mask may be performed to form a deep trench extending vertically from the front side surface of the substrate 50 to the back side of the substrate 50. The photoresist layer may be consumed during the anisotropic etching process, and the hard mask layer may be subsequently removed, for example, using a wet etching process. Thus, the deep trench may extend vertically from the front side surface of the substrate 50 to the back side surface of the substrate 50. Generally speaking, the lateral dimensions of the deep trench may be selected to be large enough to provide deep etching of the substrate 50, and may be selected to be small enough to provide filling of the deep trench for forming the substrate through hole structure 51. At least one conductive material (such as a metal material and / or a heavily doped semiconductor material) may be deposited in the deep trench and constitute the substrate through hole structure 51. For example, the conductive material may include copper, nickel, or a stack of copper and nickel. Other suitable materials are also contemplated by the present disclosure.

[0066] Reference Figure 1B, a substrate 52 and a conductive feature 53 may be formed over the substrate 50. In some embodiments, the substrate 52 may be deposited over the exposed surface of the substrate 50 by a suitable deposition process (e.g., chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), high-density plasma chemical vapor deposition (HDPCVD), metal-organic chemical vapor deposition (MOCVD), plasma-enhanced chemical vapor deposition (PECVD), sputtering, laser ablation, etc.). In some embodiments, the substrate 52 may include an organic material, such as a dielectric polymer material of polyimide (PI), benzocyclobutene (BCB), or polybenzobisoxazole (PBO).

[0067] In some embodiments, conductive features 53 may be formed in substrate material 52, and conductive features 53 include conductive materials (e.g., metal materials and / or heavily doped semiconductor materials). For example, the conductive material may include copper, nickel, or a stack of copper and nickel. However, other suitable materials are also within the scope of the present disclosure. In some embodiments, conductive features 53 may be formed using the same method or material as substrate through-hole structures 51.

[0068] In addition, a signal transmission layer 140 is formed in the base material 52, and an optoelectronic material 150 is formed on the signal transmission layer 140. The signal transmission layer 140 may include a nitride-based material, such as silicon nitride (SiN). The signal transmission layer 140 may be used for the control unit 120 and the operation unit 130 (e.g. Figure 1CThe photoelectric material 150 is used to transmit optical signals between the photoelectric material 150 and the signal transmission layer 140. In some embodiments, the photoelectric material 150 overlaps with the signal transmission layer 140 in a vertical direction (e.g., a direction parallel to the Z axis). For example, the photoelectric material 150 includes aluminum nitride, hexagonal boron nitride, graphene, or a combination of the foregoing materials. The provision of the photoelectric material 150 can change the characteristics of the signal transmitted in the signal transmission layer 140, thereby improving the operating quality or performance of the packaging structure 100. In the present embodiment, the signal transmission layer 140 is located below the photoelectric material 150 and contacts the photoelectric material 150, which means that the signal transmission layer 140 is formed before the photoelectric material 150. However, the present disclosure is not limited thereto. In some other embodiments, the signal transmission layer 140 is located above the photoelectric material 150 and contacts the photoelectric material 150.

[0069] Conductive pad 55 can be formed on substrate material 52 and include conductive material (e.g., metal material and / or heavily doped semiconductor material). For example, the conductive material can include copper, nickel, or a stack of copper and nickel. However, other suitable materials are also within the scope of the present disclosure. In some embodiments, conductive pad 55 can be formed using the same method or material as conductive feature 53 or substrate through hole structure 51.

[0070] As described above, the interposer 110 is formed, and a redistribution structure 115 consisting of the substrate through-hole structure 51, the conductive feature 53, and the conductive pad 55 is formed in the interposer 110. It should be noted that the redistribution structure 115 is isolated from the signal transmission layer 140 and the optoelectronic material 150. For the sake of brevity, some internal structures of the interposer 110 will not be marked in the following drawings, and will not be described in detail in the following paragraphs.

[0071] like Figure 1C As shown, the control unit 120 and the plurality of computing units 130 are bonded to the interposer 110. More specifically, the control unit 120 and the computing unit 130 are physically and electrically connected to the conductive pad 55. In some embodiments, the computing unit 130 is disposed around the control unit 120 and connected to the control unit 120. In some embodiments, the control unit 120 and the computing unit 130 are aligned with the area where the signal transmission layer 140 and the optoelectronic material 150 are located in the interposer 130. In other words, the control unit 120 and the computing unit 130 overlap with the signal transmission layer 140 and the optoelectronic material 150 in the interposer 110 in a vertical direction (e.g., parallel to the Z axis).

[0072] In some embodiments, the control unit 120 includes an integrated circuit 121 on an interconnect structure 122. The interconnect structure 122 includes a plurality of dielectric layers 123, a plurality of semiconductor devices 124 formed in the dielectric layers 123, and a conductive feature 125 electrically connected to the semiconductor device 124. The conductive feature 125 is aligned with the conductive pad 55 and electrically connected to the conductive pad 55. In addition, at least one signal transmission layer 145 is formed in the interconnect structure 122. The signal transmission layer 145 may include a nitride-based material, such as silicon nitride (SiN). The signal transmission layer 145 may be configured to transmit an optical signal to the control unit 120. In some embodiments, the signal transmission layer 145 may be formed using the same method or material as the signal transmission layer 140.

[0073] Similarly, each operation unit 130 includes an integrated circuit 131 on an interconnect structure 132. The interconnect structure 132 includes a plurality of dielectric layers 133, a plurality of semiconductor devices 134 formed in the dielectric layers 133, and conductive features 135 electrically connected to the semiconductor devices 134. The conductive features 135 are aligned with and electrically connected to the corresponding conductive pads 55. In addition, at least one signal transmission layer 145 is formed in the interconnect structure 132 and is configured to transmit an optical signal to the operation unit 130.

[0074] In addition, a plurality of signal sources 170 are also connected to the intermediate layer 110, wherein the signal sources 170 are respectively connected to the control unit 120 or the computing unit 130 via the signal transmission layer 140. In some embodiments, the signal source 170 is configured to receive an electrical signal and convert the received electrical signal into an optical signal, and transmit the optical signal to the control unit 120 or the computing unit 130 via the signal transmission layer 140. Therefore, the control unit 120 and the computing unit 130 can operate based on the transmitted optical signal to execute instructions.

[0075] After the control unit 120, the computing unit 130, and the signal source 170 are each positioned on the interposer 110, an underfill 160 may be dispensed on the interposer 110 to encapsulate the control unit 120, the computing unit 130, and the signal source 170. In some embodiments, the computing unit 130 is separated from the control unit 120 by the underfill 160. In some embodiments, the underfill 160 may be formed above the top surface of the control unit 120, the computing unit 130, and the signal source 170. Then, the portion of the underfill 160 that is higher than the control unit 120, the computing unit 130, and the signal source 170 (e.g., directly above the top surface of the control unit 120, the computing unit 130, and the signal source 170) may be removed by a suitable planarization process (e.g., chemical mechanical polishing (CMP)). Therefore, the top surface of the underfill 160 is substantially coplanar with the top surfaces of the control unit 120, the computing unit 130, and the signal source 170.

[0076] like Figure 1D As shown, the interposer 110 is thinned so that the substrate through-hole structure 51 is exposed to the back side of the interposer 110. In some embodiments, the bump structure 57 can be a conductive spherical structure (e.g., a ball grid array (BGA)), a conductive columnar structure, or a conductive paste structure that is mounted on the interposer 110 and electrically coupled to the interposer 110 during the bonding process. In an embodiment where the interposer 110 includes a controlled collapse chip connection (Controlled Collapse Chip Connection; C4) pad, the bump structure 57 can be a controlled collapse chip connection solder ball, that is, a spherical solder portion that can be used for controlled collapse chip connection bonding. In an embodiment where the interposer 110 includes a micro-bump array for chip connection (Chip connection; C2) bonding, the bump structure 57 can be a solder cap that wets the entire planar end surface of the corresponding micro-bump and has a roughly hemispherical shape. Although the present disclosure is described using an embodiment in which the bump structure 57 is represented by a spherical controlled collapse chip-attach solder ball, the present disclosure also expressly contemplates an embodiment in which the bump structure 57 is a solder cap having a hemispherical shape.

[0077] Figure 2 FIG. 1 is a top view of a package structure 100 according to some embodiments of the present disclosure. Figure 2As shown, the operation unit 130 is located on each side of the control unit 120. In other words, the control unit 120 is surrounded by the operation unit 130. However, the present disclosure is not limited thereto. In some embodiments, the operation units 130 are arranged linearly along the edge of the control unit 120. Since the control unit 120 is located at the center of the operation unit 130, the connection between the control unit 120 and the operation unit 130 (for example, the signal transmission layer 140 connecting the control unit 120 and the operation unit 130) can be shortened. Therefore, the manufacturing cost can be reduced, and the overall performance of the package structure 100 can be improved.

[0078] Figure 3 2 is a cross-sectional view showing a package structure 200 according to some embodiments of the present disclosure. It should be noted that the package structure 200 of this embodiment may include Figure 1D The same or similar elements of the package structure 100 shown in the figure will be represented by the same or similar reference numerals and will not be described in detail in the following paragraphs. Figure 3 As shown, the package structure 200 includes an interposer 110, a control unit 120, and a plurality of computing units 130. The control unit 120 and the computing unit 130 are bonded to the interposer 110. The signal transmission layer 140 is formed in the interposer 110. In this embodiment, a signal transmission layer 145 is formed in the control unit 120 and the computing unit 130, and an optoelectronic material 155 is formed in the control unit 120 and the computing unit 130. The optoelectronic material 155 overlaps with the signal transmission layer 145. The optoelectronic material 155 changes the characteristics of the signal transmitted in the signal transmission layer 145, thereby improving the operation quality or performance of the package structure 200.

[0079] Figure 4A 1 is a cross-sectional view showing the signal transmission layer 145 and the optoelectronic material 155 in the computing unit 130 according to some embodiments of the present disclosure. Figure 4A As shown, the width of the optoelectronic material 155 may be different from the width of the signal transmission layer 145. For example, the width of the optoelectronic material 155 may be longer than the width of the signal transmission layer 145. However, the present disclosure is not limited thereto. In some embodiments, the width of the optoelectronic material 155 may be less than or equal to the width of the signal transmission layer 145. In some embodiments, the sidewalls of the optoelectronic material 155 are vertically aligned with the sidewalls of the signal transmission layer 145.

[0080] Figure 4B is a top view showing the signal transmission layer 145 and the optoelectronic material 155 in the computing unit 130 according to some embodiments of the present disclosure. Figure 4BAs shown, a portion of the signal transmission layer 145 is annular, while the optoelectronic material 155 is rectangular. In some embodiments, the signal transmission layer 145 and / or the optoelectronic material 155 may be elongated, circular, rectangular, etc. with or without rounded corners. In a top view, the signal transmission layer 145 overlaps with the optoelectronic material 155. For example, the area of ​​the signal transmission layer 145 that overlaps with the optoelectronic material 155 does not exceed 5%. In some embodiments, the shapes of the signal transmission layer 145 and the optoelectronic material 155 may be similar or identical.

[0081] Figure 5 is a cross-sectional view showing a package structure 300 according to some embodiments of the present disclosure. Figure 6 FIG. 3 is a top view showing a package structure 300 according to some embodiments of the present disclosure. It should be noted that the package structure 300 of this embodiment may include Figure 3 The same or similar elements as those in the package structure 200 shown in the figure will be represented by the same or similar reference numerals and will not be described in detail in the following paragraphs. Figure 5 As shown, the package structure 300 includes an interposer 110, a plurality of control units 120, a plurality of computing units 130, and a plurality of signal sources 170. The control units 120 are respectively integrated with the computing units 130, and the signal sources 170 are respectively joined to be adjacent to the computing units 130. In this embodiment, a signal transmission layer 140 is formed in the interposer 110, a signal transmission layer 145 is formed in the control units 120 and the computing units 130, and an optoelectronic material 155 is formed in the control units 120 and the computing units 130. Since the control units 120 and the computing units 130 are respectively integrated into one body, the setting flexibility of the control units 120 and the computing units 130 can be improved.

[0082] like Figure 6 As shown, the operation units 130 are arranged in an array above the interposer 110, and the control unit 120 is located in the corresponding operation unit 130. In this way, the density of the operation unit 130 per unit area can be increased, thereby reducing the area occupied by the control unit 120 and the operation unit 130, so as to achieve the miniaturization of the package structure 300. The signal source 170 is respectively arranged to be adjacent to the operation unit 130, and is connected to the operation unit 130 through the signal transmission layer 140. In some embodiments, the signal source 170 is arranged between adjacent operation units 130.

[0083] Figure 7 is a cross-sectional view showing a package structure 400 according to some embodiments of the present disclosure. Figure 8 FIG. 4 is a top view showing a package structure 400 according to some embodiments of the present disclosure. It should be noted that the package structure 400 of this embodiment may include Figure 3The same or similar elements as those in the package structure 200 shown in the figure will be represented by the same or similar reference numerals and will not be described in detail in the following paragraphs. Figure 7 As shown, the package structure 400 includes an interposer 110, a control unit 120, and a plurality of computing units 130. The control unit 120 and the computing unit 130 are bonded to the interposer 110. The signal transmission layer 140 is formed in the interposer 110. In the present embodiment, a signal transmission layer 145 is formed in the control unit 120 and the computing unit 130, and an optoelectronic material 155 is formed in the control unit 120 and the computing unit 130.

[0084] In the present embodiment, the processor 180 and a plurality of memory devices 185 are bonded to the interposer, and the memory devices 185 are located near the processor 180. In some embodiments, the processor 180 and the memory devices 185 are connected to the control unit 120 via the redistribution structure 115 in the interposer 110. In some embodiments, the processor 180 may include a central processing unit, a graphics processing unit, a microprocessor, a controller, a microcontroller, a digital signal processor, a field programmable logic gate array, an application specific integrated circuit, and / or other types of processing elements. The processor 180 is implemented in hardware, firmware, or a combination of hardware and software. In some embodiments, the processor 180 includes one or more processors that can be programmed to perform one or more operations or processes described elsewhere in this disclosure.

[0085] In some embodiments, each memory device 185 includes vertically stacked static random access memory dies and provides high bandwidth defined under the JEDEC (Joint Electron Device Engineering Council) standard (i.e., a standard defined by the JEDEC Solid State Technology Association). Therefore, the memory device 185 can be referred to as a high bandwidth memory and stores information, instructions and / or software (e.g., one or more software applications) related to the operation of the package structure 400.

[0086] Fig. 9 is a cross-sectional view showing a package structure 500 according to some embodiments of the present disclosure. Fig.10 FIG. 5 is a top view showing a package structure 500 according to some embodiments of the present disclosure. It should be noted that the package structure 500 of this embodiment may include Figure 3 The same or similar elements as those in the package structure 200 shown in the figure will be represented by the same or similar reference numerals and will not be described in detail in the following paragraphs. Fig. 9 and Fig.10As shown, the package structure 500 includes an interposer 110, a control unit 120, and a plurality of computing units 130. The control unit 120 and the computing unit 130 are bonded to the interposer 110. A signal transmission layer 140 is formed in the interposer 110. In this embodiment, a signal transmission layer 145 is formed in the control unit 120 and the computing unit 130, and an optoelectronic material 155 is formed in the control unit 120 and the computing unit 130.

[0087] In some embodiments, the optical element 190 is bonded to the interposer 110, and is connected to the control unit 120 and the computing unit 130 via the signal transmission layer 140 and the redistribution structure 115. The optical element 190 may receive an optical signal (e.g., light) and convert the received optical signal into an electrical signal, and transmit the electrical signal to the control unit 120 or the computing unit 130 through the signal transmission layer 140 and the redistribution structure 115. Therefore, the control unit 120 and the computing unit 130 may operate based on the transmitted electrical signal to execute instructions.

[0088] Fig.11 FIG. 6 is a top view showing a package structure 600 according to some embodiments of the present disclosure. It should be noted that the package structure 600 of this embodiment may include Fig.10 The same or similar elements as those in the package structure 500 are shown in FIG. These elements will be represented by the same or similar reference numerals and will not be described in detail in the following paragraphs. Fig.11 As shown, the package structure 600 includes an interposer 110, a control unit 120, and a plurality of computing units 130. The control unit 120 and the computing unit 130 are bonded to the interposer 110. In some embodiments, a plurality of optical elements 190 are bonded to the interposer 110, and the optical elements 190 are connected to the control unit 120 and the computing unit 130 through the signal transmission layer 140 and the redistribution structure 115. The configuration of a plurality of optical elements 190 can increase the flexibility of designing the package structure 600, because the separated optical elements 190 can occupy less area than a single optical element 190. In some embodiments, the optical element 190 is located on a single side of the interposer 110. However, the present disclosure is not limited thereto. In some other embodiments, the optical element 190 is located on different sides or different corners of the interposer 110.

[0089] Fig.12 FIG. 7 is a top view of a package structure 700 according to some embodiments of the present disclosure. It should be noted that the package structure 700 of this embodiment may include Fig.10 The same or similar elements as those in the package structure 500 are shown in FIG. These elements will be represented by the same or similar reference numerals and will not be described in detail in the following paragraphs. Fig.12As shown, the package structure 700 includes an interposer 110, a control unit 120, and a plurality of computing units 130. The control unit 120 and the computing unit 130 are bonded to the interposer 110. In some embodiments, the optical element 190 is disposed in the control unit 120 and integrated with the control unit 120, and the optical element 190 is connected to the computing unit 130 via the signal transmission layer 140. In this way, the connection between the optical element 190 and the computing unit 130 (for example, the signal transmission layer 140 connected to the optical element 190 and the computing unit 130) can be shortened, and the signal transmission layer 140 connected to the optical element 190 and the control unit 120 can be omitted. Therefore, the manufacturing cost can be reduced, and the overall performance of the package structure 700 can be improved.

[0090] Fig.13 FIG. 8 is a cross-sectional view showing a package structure 800 according to some embodiments of the present disclosure. It should be noted that the package structure 800 of the present embodiment may include Figure 1D The same or similar elements as those in the package structure 100 shown in the figure will be represented by the same or similar reference numerals and will not be described in detail in the following paragraphs. Fig.13 As shown, the package structure 800 includes an interposer 110, a control unit 120, and a plurality of computing units 130. The control unit 120 and the computing unit 130 are bonded to the interposer 110. A signal transmission layer 140 and an optoelectronic material 150 are formed in the interposer 110. In addition, a signal transmission layer 145 is formed in the control unit 120 and the computing unit 130, and an optoelectronic material 155 is formed in the control unit 120 and the computing unit 130. The design flexibility of the package structure 800 can be improved by arranging the plurality of optoelectronic materials 150 and 155. For example, the control unit 120 and the computing unit 130 without the optoelectronic material 155 can also be bonded to the same interposer as the control unit 120 and the computing unit 130 with the optoelectronic material 155.

[0091] As described above, the present disclosure relates to a packaging structure and a method for forming the same. The packaging structure includes a control unit and a plurality of computing units surrounding the control unit. Therefore, the connection between the control unit and each computing unit can be shortened, thereby reducing the manufacturing cost. In addition, by adding optoelectronic materials overlapping the signal transmission layer to change the characteristics of the transmitted optical signal, the overall performance of the packaging structure can be improved. The optoelectronic material can be arranged in an interposer or in the control unit and the computing unit, so a diversified packaging structure design can be adopted. In addition, the signal source, processor, memory device and optical element can also be joined to the interposer with the control unit and the computing unit to perform more functions.

[0092] According to some embodiments, a packaging structure includes an interposer, a control unit, a plurality of computing units, a signal transmission layer, and an optoelectronic material. The control unit is bonded to the interposer. The computing unit is disposed around the control unit and connected to the control unit. The signal transmission layer is formed in the control unit and the computing unit. The optoelectronic material is formed in the control unit and the computing unit, and the optoelectronic material overlaps the signal transmission layer.

[0093] In some embodiments, the computing unit is separated from the control unit by an underfill, and the computing unit is connected to the control unit via another signal transmission layer in the interposer.

[0094] In some embodiments, the package structure further includes a signal source coupled to the intermediate layer, wherein the signal source is connected to the control unit or the computing unit through the signal transmission layer.

[0095] In some embodiments, the packaging structure further includes an optical element, which is disposed in the control unit and connected to the computing unit via a signal transmission layer.

[0096] In some embodiments, the width of the optoelectronic material is different than the width of the signal transmission layer.

[0097] In some embodiments, the optoelectronic material includes aluminum nitride, hexagonal boron nitride, graphene, or a combination of aluminum nitride, hexagonal boron nitride, and graphene.

[0098] According to some embodiments, a packaging structure includes an interposer, a signal transmission layer formed in the interposer, an optoelectronic material formed in the interposer, a control unit bonded to the interposer, and a plurality of computing units. The optoelectronic material overlaps the signal transmission layer. The computing unit is bonded to the interposer and connected to the control unit through the signal transmission layer.

[0099] In some embodiments, the computing unit is separated from the control unit by a bottom filler, and the computing unit is linearly arranged along the edge of the control unit.

[0100] In some embodiments, the signal transmission layer is located above and in contact with the optoelectronic material.

[0101] In some embodiments, the signal transmission layer is located below and in contact with the optoelectronic material.

[0102] In some embodiments, the package structure further includes a redistribution structure formed in the interposer, wherein the redistribution structure is isolated from the signal transmission layer.

[0103] In some embodiments, the package structure further includes a processor and a memory device. The processor is bonded to the interposer. The memory device is bonded to the interposer and adjacent to the processor, wherein the processor and the memory device are connected to the control unit via a redistribution structure.

[0104] In some embodiments, the package structure further includes an optical element bonded to the interposer and configured to be connected to the control unit and the computing unit through the signal transmission layer and the redistribution structure.

[0105] In some embodiments, the control unit and the computing unit further include a second signal transmission layer and a second photoelectric material formed in the control unit and the computing unit, wherein the second photoelectric material overlaps with the second signal transmission layer.

[0106] In some embodiments, sidewalls of the optoelectronic material are vertically aligned with sidewalls of the signal transmission layer.

[0107] According to some embodiments, a method for forming a package structure includes forming an interposer, which includes forming a plurality of through-substrate via (TSV) structures in a substrate, and forming a substrate above the substrate. Forming the interposer includes forming a plurality of conductive features in the substrate. The conductive features are electrically connected to the through-substrate via structures. Forming the interposer includes forming a signal transmission layer in the substrate. The signal transmission layer is isolated from the conductive features. Forming the interposer includes forming an optoelectronic material in the substrate. The optoelectronic material overlaps the signal transmission layer. The method includes bonding a control unit and a plurality of computing units to the interposer. The computing units are separated from the control unit, and the computing units are connected to the control unit through the signal transmission layer. The method includes filling a bottom filler in a gap between the control unit and the computing unit.

[0108] In some embodiments, the method further includes bonding a signal source to the interposer, wherein the signal source is adjacent to the computing unit and is surrounded by an underfill.

[0109] In some embodiments, the method further includes bonding an optical element to the interposer, wherein the optical element is adjacent to the signal source and is laterally surrounded by the underfill.

[0110] In some embodiments, forming the optoelectronic material in the interposer layer further comprises forming the optoelectronic material in contact with the signal transmission layer.

[0111] In some embodiments, bonding the control unit and the computing unit to the interposer further comprises aligning the control unit and the computing unit with a region of the interposer where the signal transmission layer and the optoelectronic material are located.

[0112] The features of many embodiments are summarized above so that those skilled in the art to which the present disclosure belongs can better understand the various embodiments of the present disclosure. Those skilled in the art to which the present disclosure belongs should understand that other processes and structures can be easily designed or changed based on the embodiments of the present disclosure to achieve the same purpose and / or achieve the same advantages as the embodiments introduced herein. Those skilled in the art to which the present disclosure belongs should also understand that these equivalent structures do not deviate from the spirit and scope of the present disclosure. Various changes, substitutions and modifications may be made to the embodiments of the present disclosure without departing from the spirit and scope of the appended claims.

Claims

1. A packaging structure, characterized in that: include: An intermediary layer; a control unit bonded to the interposer; a plurality of computing units arranged to be connected to the control unit, wherein the control unit is located between at least two of the plurality of computing units; a signal transmission layer, located in the control unit and the plurality of computing units; and A photoelectric material is located in the control unit and the plurality of computing units, wherein the photoelectric material overlaps with the signal transmission layer.

2. The packaging structure according to claim 1, characterized in that: The plurality of operation units are separated from the control unit by a bottom filler, and the plurality of operation units are connected to the control unit through another signal transmission layer in the intermediate layer.

3. The packaging structure according to claim 1, characterized in that: Also includes: A signal source is connected to the intermediate layer, wherein the signal source is connected to the control unit or the plurality of the computing units through the signal transmission layer.

4. The packaging structure according to claim 1, characterized in that: Also includes: An optical element is arranged in the control unit and connected to the plurality of computing units through the signal transmission layer.

5. The packaging structure according to claim 1, characterized in that: A width of the optoelectronic material is different from a width of the signal transmission layer.

6. A packaging structure, characterized in that: include: An intermediary layer; a signal transmission layer, located in the intermediate layer; an optoelectronic material disposed in the intermediate layer, wherein the optoelectronic material overlaps the signal transmission layer; a control unit bonded to the interposer; and A plurality of operation units are bonded to the intermediate layer and connected to the control unit through the signal transmission layer.

7. The packaging structure according to claim 6, characterized in that: Also includes: A redistribution structure is formed in the interposer layer, wherein the redistribution structure is isolated from the signal transmission layer.

8. The packaging structure according to claim 7, characterized in that: Also includes: a processor coupled to the interposer; as well as A memory device is bonded to the interposer and adjacent to the processor, wherein the processor and the memory device are connected to the control unit through the redistribution structure.

9. The packaging structure according to claim 7, characterized in that: The control unit and the plurality of computing units further include: a second signal transmission layer formed in the control unit and the plurality of computing units; and A second photoelectric material is formed in the control unit and the plurality of computing units, wherein the second photoelectric material overlaps with the second signal transmission layer.

10. The packaging structure according to claim 6, characterized in that: A sidewall of the optoelectronic material is vertically aligned with a sidewall of the signal transmission layer.

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