Differential IIC data transmission circuit of low-speed vehicle

Abstract

The utility model discloses a differential IIC data transmission circuit for a low-speed vehicle, and the circuit comprises a bidirectional data buffer circuit which is used for obtaining a signal and uploading the signal to a differential conversion output circuit; the differential conversion output circuit is used for performing differential signal transmission on the signal; the differential conversion output circuit comprises a chip U2, a chip U3, a resistor R7, a resistor R8, a resistor R9 and a resistor R10, pins 5 and 8 of the chip U2 are connected with the resistor R7, pins 7 and 6 of the chip U2 are connected with the resistor R8, pins 5 and 8 of the chip U3 are connected with the resistor R9, and pins 7 and 6 of the chip U2 are connected with the resistor R10. According to the differential IIC data transmission circuit of the low-speed vehicle, the 485 transceiver is used for expanding the I2C range from onboard to non-onboard through the transmission cable, then signals are converted back to the I2C, the data transmission distance of the IIC is prolonged, and compared with an I2C line expanded only through an I2C buffer, the differential signals can improve EMI suppression, reduce power consumption and reduce the problem of different grounding potentials between circuit boards. And in a noisy environment in which EMI factors need to be considered, the anti-interference capability is improved.

Description

Technical Field

[0001] The utility model relates to the technical field of data transmission, in particular to a differential IIC data transmission circuit for a low-speed vehicle. Background Art

[0002] IIC (inter-integrated circuit integrated circuit bus) bus supports short-distance communication between devices. It is suitable for occasions with small data volume and short transmission distance. IIC serial bus consists of two signal lines, one is a bidirectional data line SDA, and the other is a unidirectional clock line SCL. Differential transmission is a signal transmission technology. Different from the traditional method of one signal line and one ground line, differential transmission transmits signals on both lines. The amplitudes of the two signals are equal, the phase difference is 180 degrees, and the polarity is opposite. The signal transmitted on these two lines is a differential signal.

[0003] Currently, differential transmission has a short transmission distance, severe signal interference, signal distortion, and abnormal data transmission. Summary of the invention

[0004] The utility model aims to provide a low-speed vehicle differential IIC data transmission circuit.

[0005] To achieve the above purpose, the utility model provides the following technical solution: a low-speed vehicle differential IIC data transmission circuit, comprising:

[0006] A bidirectional data buffer circuit, used to acquire the signal and upload it to the differential conversion output circuit; and

[0007] The differential conversion output circuit is used for performing differential signal transmission on the signal.

[0008] Furthermore, the differential conversion output circuit includes chips U2 and U3, resistors R7, R8, R9, and R10, pins 5 and 8 of the chip U2 are connected to R7, pins 7 and 6 of the chip U2 are connected to R8, pins 5 and 8 of the chip U3 are connected to R9, and pins 7 and 6 of the chip U2 are connected to R10.

[0009] Furthermore, the bidirectional data buffer circuit includes a bidirectional data buffer U1; pin 1 of the bidirectional data buffer U1 is connected to the data line SDA for bidirectional data transmission, pin 2 of the bidirectional data buffer U1 outputs data through TX1, pin 3 of the bidirectional data buffer U1 inputs data through RX1, pin 7 of the bidirectional data buffer U1 is connected to the clock line SCL, and pin 5 of the bidirectional data buffer U1 outputs the clock line through TX2.

[0010] Furthermore, the model of the bidirectional data buffer U1 is P82B96D.

[0011] Furthermore, the chips U2 and U3 are both transceivers, and both are SIT3490EESA models.

[0012] Furthermore, the bidirectional data buffer circuit also includes resistors R1, R2, R3, R4, R5, and R6, one end of the resistors R1, R2, and R3 are respectively connected to pins 1, 2, and 3 of the bidirectional data buffer U1, one end of the resistors R4, R5, and R6 are respectively connected to pins 7, 5, and 6 of the bidirectional data buffer U1, and the resistors R4, R5, and R6 are connected in series and then connected to the series-connected resistors R1, R2, and R3.

[0013] It can be seen from the above technical solution that the utility model has the following beneficial effects:

[0014] This low-speed car differential IIC data transmission circuit uses a 485 transceiver (i.e., chips U2 and U3) to extend the I2C range from onboard to off-board through a transmission cable, and then converts the signal back to I2C, extending the data transmission distance of IIC. Due to the differential signaling of the 485 transceiver, this method helps improve signal integrity. Compared with using only I2C buffers to extend the I2C line, differential signals can improve EMI suppression, reduce power consumption, and reduce the problem of different ground potentials between circuit boards. This advantage is very useful in noisy environments where EMI factors need to be considered, and improves anti-interference capabilities. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 This is a bidirectional data buffer circuit diagram of the utility model;

[0016] Figure 2 This is the differential conversion output circuit diagram of the utility model. DETAILED DESCRIPTION

[0017] In the description of the present invention, it should be noted that the terms "upper", "lower", "inner", "outer", "front end", "rear end", "two ends", "one end", "the other end" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation, and therefore cannot be understood as a limitation on the present invention. In addition, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance.

[0018] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "provided with", "connected", etc. should be understood in a broad sense. For example, "connected" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be an indirect connection through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0019] The following will be combined with the drawings in the embodiments of the utility model to clearly and completely describe the technical solutions in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0020] See also Figure 1-2 The utility model provides a low-speed vehicle differential IIC data transmission circuit, including a bidirectional data buffer circuit and a differential conversion output circuit. The signal is obtained through the bidirectional data buffer circuit and uploaded to the differential conversion output circuit. The differential conversion output circuit performs differential signal transmission on the signal, wherein the bidirectional data buffer circuit includes a bidirectional data buffer U1, resistors R1, R2, R3, R4, R5, and R6. The model of the bidirectional data buffer U1 is P82B96D. Pin 1 of the bidirectional data buffer U1 is connected to the data line SDA for bidirectional data transmission; Pin 2 of the bidirectional data buffer U1 outputs data through TX1, and Pin 3 of the bidirectional data buffer U1 outputs data through RX 1 input data, one end of the resistors R1, R2, R3 are connected to the 1, 2, 3 pins of the bidirectional data buffer U1 respectively. Since IIC is an open collector output, pull-up resistors R1, R2, R3 are needed. Pin 7 of the bidirectional data buffer U1 is connected to the clock line SCL, and pin 5 of the bidirectional data buffer U1 outputs the clock line through TX2. Since the host sends a signal to the slave, it does not need to receive the signal. It is also an open collector output. The pull-up resistors are R4, R5, R6. One end of the resistors R4, R5, R6 are connected to the 7, 5, 6 pins of the bidirectional data buffer U1 respectively, and the resistors R4, R5, R6 are connected in series and then connected to the series resistors R1, R2, R3

[0021] The differential conversion output circuit includes chips U2 and U3, resistors R7, R8, R9, and R10. Chips U2 and U3 are transceivers, and the models of chips U2 and U3 are both SIT3490EESA. Pins 5 and 8 of chip U2 are connected to R7, pins 7 and 6 of chip U2 are connected to R8, pins 5 and 8 of chip U3 are connected to R9, and pins 7 and 6 of chip U2 are connected to R10. When the DI output of chips U2 and U3 is H (high level), A is H and B is L (low level); when the DI output is L, A is L and B is H, and the amplitudes of the two signals are the same but the phases are opposite. A is H and B is L, and RO is H at this time; A is L and B is H, and RO is L at this time. A and B are the IO ports of chips U2 and U3. R7, R8, R9, and R10 are line impedance matching resistors.

[0022] Using a 485 transceiver to extend the I2C range from onboard to offboard through a transmission cable, and then converting the signal back to I2C, extends the data transmission distance of IIC. Due to the differential signaling of the 485 transceiver, this method helps improve signal integrity. Compared with using only an I2C buffer to extend the I2C line, differential signals can improve EMI suppression, reduce power consumption, and reduce the problem of different ground potentials between circuit boards. This advantage is very useful in noisy environments where EMI factors need to be considered, and improves anti-interference capabilities.

[0023] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A low-speed vehicle differential IIC data transmission circuit, characterized in that: include: A bidirectional data buffer circuit, used to acquire the signal and upload it to the differential conversion output circuit; and A differential conversion output circuit is used for performing differential signal transmission on the signal; The differential conversion output circuit includes chips U2, U3, resistors R7, R8, R9, and R10, pins 5 and 8 of the chip U2 are connected to R7, pins 7 and 6 of the chip U2 are connected to R8, pins 5 and 8 of the chip U3 are connected to R9, and pins 7 and 6 of the chip U2 are connected to R10; The bidirectional data buffer circuit includes a bidirectional data buffer U1; pin 1 of the bidirectional data buffer U1 is connected to the data line SDA for bidirectional data transmission, pin 2 of the bidirectional data buffer U1 outputs data through TX1, pin 3 of the bidirectional data buffer U1 inputs data through RX1, pin 7 of the bidirectional data buffer U1 is connected to the clock line SCL, and pin 5 of the bidirectional data buffer U1 outputs the clock line through TX2.

2. A low-speed vehicle differential IIC data transmission circuit according to claim 1, characterized in that: The model of the bidirectional data buffer U1 is P82B96D.

3. A low-speed vehicle differential IIC data transmission circuit according to claim 1, characterized in that: The chips U2 and U3 are both transceivers, and both are SIT3490EESA models.

4. A low-speed vehicle differential IIC data transmission circuit according to claim 1, characterized in that: The bidirectional data buffer circuit also includes resistors R1, R2, R3, R4, R5, and R6. One end of the resistors R1, R2, and R3 are respectively connected to pins 1, 2, and 3 of the bidirectional data buffer U1, and one end of the resistors R4, R5, and R6 are respectively connected to pins 7, 5, and 6 of the bidirectional data buffer U1. The resistors R4, R5, and R6 are connected in series and then connected to the series-connected resistors R1, R2, and R3.

Images