Test structure for monitoring open circuit of metal layer
By designing a test structure for FinFET process, using a one-way test link to detect the M0 metal layer breakage, the problem of difficulty in monitoring the M0 layer breakage is solved, and effective detection and positioning of the M0 layer breakage is achieved.
Patent Information
- Application Number
- CN202420506461.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-03-15
- Publication Date
- 2025-02-14
- Estimated Expiration
- 2034-03-15
AI Technical Summary
In FinFET process, it is difficult to effectively monitor the circuit breaking problem of metal layer 0 (M0), resulting in process yield failure.
Design a test structure, including a test unit, which consists of an active region, a polysilicon layer, a first M0 metal layer, a second M0 metal layer and a M0 metal connecting layer, and is connected to the M0 metal connecting layer through a contact hole to form a single To the test link, to detect the M0 metal layer breakage.
When there is a current and the current path is flowing, it is possible to detect the circuit breaking of the M0 metal layer caused by the contact hole, the first M0 metal layer, and the M0 metal connection layer, to ensure the unidirectional flow of current and facilitate electrical positioning.
Smart Images
Figure CN222483382U_ABST
Abstract
Description
Technical Field
[0001] The utility model belongs to the field of semiconductor design and production, and in particular relates to a test structure for monitoring metal layer disconnection. Background Art
[0002] With the rapid development of integrated circuit technology, the size of transistors has become smaller and smaller, starting from the 10-micron node in the 1970s and following Moore's Law step by step to today's 5nm. When the feature size is less than 22nm, traditional planar transistors face problems such as significantly increased short channel effects, sharply increased leakage, and reduced mobility.
[0003] In this situation, new devices with various new structures and new materials have emerged. The most advanced integrated circuit processes use fin field effect transistors (FinFETs) instead of traditional planar MOSFETs because they have excellent resistance to short channel effects, reduce subthreshold leakage current, and can reduce the impact of process changes on device performance. They have become the mainstream structure of semiconductor devices in the past decade. In the FinFET process, the open (open circuit) of M0 has always been one of the important reasons for yield failure. M0 is the first layer of metal in the metal back-end process, usually called the key metal layer (some also refer to the first and second layers of metal: M0 and M1), because it is connected to the gate (MG) or active area (OD) through a contact hole (Contact), it is the interface between the front-end process and the back-end process, and it is one of the important test points for the process level of the process factory.
[0004] M0 is also called the metal 0 layer, which contains a variety of connection structures. When the metal 0 layer is filled with metal, holes or gaps may be formed due to the morphology or large aspect ratio, which may cause the M0 layer to break. Or ion sputtering may occur due to the existence of contact holes (V0), resulting in damage to the M0 layer. The above problems have always been difficult to monitor in the process. Utility Model Content
[0005] The purpose of the present utility model is to provide a test structure for monitoring metal layer disconnection in order to solve the above problems, and to monitor the connection structure of the metal 0 layer, namely the M0 metal layer, when there is current and the current path is flowing.
[0006] In order to achieve the above purpose, the technical solution adopted by the utility model is:
[0007] A test structure for monitoring metal layer disconnection, comprising:
[0008] A test unit; the test unit comprises: an active area, a polysilicon layer and a first M0 metal layer alternately arranged on the active area, and a second M0 metal layer located on one side of the active area;
[0009] The first M0 metal layer and the second M0 metal layer are connected via an M0 metal connecting layer. The first M0 metal layer and / or the second M0 metal layer are provided with a contact hole to be tested adjacent to the M0 metal connecting layer. Test pins are connected to the first M0 metal layer and the second M0 metal layer to form a test link including the contact hole to be tested, the first M0 metal layer, and the M0 metal connecting layer.
[0010] Preferably, the first M0 metal layer is connected to the M0 metal connection layer on both sides of the active area along its length extension direction, the contact hole to be tested is located between the M0 metal connection layer and the active area, and the test pins are located on different sides of the active area.
[0011] Preferably, an M0 metal cut-off layer is provided on the second M0 metal layer, and the connection point of the test pin is located between the M0 metal connection layer and the M0 metal cut-off layer.
[0012] Preferably, the test pin is a metal line of an M1 metal layer which is the first layer above the M0 metal layer.
[0013] Preferably, a polysilicon cutting layer for cutting off the polysilicon layer is provided between the active area and the M0 metal connection layer.
[0014] A test structure for monitoring metal layer disconnection, comprising:
[0015] Several test units;
[0016] Each of the test units comprises: an active area, a polysilicon layer and a first M0 metal layer alternately arranged on the active area, and a second M0 metal layer located on one side of the active area;
[0017] The first M0 metal layer and the second M0 metal layer are connected through the M0 metal connecting layer, and the first M0 metal layer and the second M0 metal layer are both provided with contact holes adjacent to the M0 metal connecting layer; the first M0 metal layer and the second M0 metal layer are connected to the M1 metal layer through the contact holes to form a test link including the contact holes to be tested, the first M0 metal layer, and the M0 metal connecting layer, and the adjacent test units share the same M1 metal layer to form a connection.
[0018] Preferably, the M0 metal connecting layer and the contact hole are arranged on both sides of the active area along the length extension direction of the first M0 metal layer, the contact hole is arranged between the active area and the M0 metal connecting layer, the M1 metal layer is connected to one side of the M0 metal layer below through the contact hole, and the adjacent M1 metal layers are located on different sides of the active area.
[0019] Preferably, an M0 metal cut-off layer is disposed above the second M0 metal layer of the odd-numbered test units and the first M0 metal layer of the even-numbered test units.
[0020] Preferably, the M0 metal cut-off layer is disposed between the active area and the contact hole.
[0021] Preferably, a polysilicon cutting layer is arranged above the polysilicon layer and vertically arranged thereto.
[0022] Preferably, the width of the first M0 metal layer and the second M0 metal layer is the same as that of the contact hole.
[0023] Preferably, the M1 metal layers located at the head and tail positions are set as test pins.
[0024] The beneficial effects of the utility model are:
[0025] The present application provides a test structure for monitoring metal layer short circuits, forming a unidirectional test link including a contact hole, a first M0 metal layer, and an M0 metal connection layer. When the contact hole exists and the current path flows through the contact hole, the first M0 metal layer, and the M0 metal connection layer, the M0 metal layer short circuit caused by the contact hole, the first M0 metal layer, and the M0 metal connection layer can be detected. In addition, the present structure introduces a metal layer cut-off layer and a polysilicon cut-off layer to ensure that the environment is relatively real, and to ensure unidirectional flow of current on the test link, so as to facilitate electrical positioning. The contact hole is arranged adjacent to the M0 metal connection layer to enhance the influence of the contact hole on the M0 metal layer.
[0026] In order to make the above and other purposes, features and advantages of the present invention more obvious and understandable, preferred embodiments are given below with reference to the accompanying drawings for detailed description as follows. BRIEF DESCRIPTION OF THE DRAWINGS
[0027] In order to more clearly illustrate the technical solutions in the specific embodiments of the present invention, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
[0028] Figure 1 A schematic diagram of a test structure for monitoring metal layer short circuits provided in Embodiment 1 of the utility model.
[0029] Figure 2 A schematic diagram of a test structure for monitoring metal layer short circuits provided in Embodiment 2 of the present utility model. DETAILED DESCRIPTION
[0030] The above and other technical contents, features and effects of the present invention will be clearly presented in the following detailed description of a preferred embodiment with reference to the drawings. The directional terms mentioned in the following embodiments, such as up, down, left, right, front or back, etc., are only referenced to the directions of the attached drawings. Therefore, the directional terms used are used to illustrate and not to limit the present invention.
[0031] The test structure involved in the utility model includes a test unit, wherein according to different test conditions, the test structure can be composed of one test unit or a combination of multiple test units, and two test units form a test group. The following two embodiments are used to illustrate the test structure of a single test unit and the test structure composed of multiple test units in combination with the drawings.
[0032] Embodiment 1:
[0033] Embodiment 1 describes the test structure of a test unit. The test unit of this embodiment consists of Figure 1 The complete structure of Figure 1 The active area on the left side of the center is used as a test unit, and forms a test structure with the M0 metal layer on the right side that does not cover the active area.
[0034] like Figure 1 The figure shows a schematic diagram of a test structure for monitoring metal layer short circuits provided in the first embodiment of the present utility model.
[0035] A test structure for monitoring metal layer disconnection, comprising: a test unit;
[0036] The test unit includes: an active area covering the test unit, a polysilicon layer and an M0 metal layer alternately arranged on the active area.
[0037] The M0 metal layer includes: a first M0 metal layer located on the active area and a second M0 metal layer located on one side of the active area and not covering the active area.
[0038] The first M0 metal layer and the second M0 metal layer are connected through the M0 metal connecting layer. The first M0 metal layer and / or the second M0 metal layer are provided with a contact hole to be tested adjacent to the M0 metal connecting layer. The first M0 metal layer and the second M0 metal layer are both connected with a test pin (M1 snakepin) to form a test link including the contact hole to be tested, the first M0 metal layer, and the M0 metal connecting layer.
[0039] Specifically, the polysilicon layer is set to extend in a first direction (eg Figure 1 The vertical direction of the polysilicon layer is perpendicular to the second direction (such as Figure 1The polysilicon layer and the first M0 metal layer present a strip structure and are arranged on the active area at equal intervals along the second direction.
[0040] The first M0 metal layer is connected to the M0 metal connection layer on both sides of the active area along its length extension direction (first direction), that is, the M0 metal connection layer is arranged on the upper and lower sides of the first M0 metal layer, and the first M0 metal layer and the second M0 metal layer are provided with contact holes to be tested at positions close to the M0 metal connection layer on the upper and lower sides, and the contact holes to be tested are located between the M0 metal connection layer and the active area, and the test pins are connected to the first M0 metal layer and the second M0 metal layer below through the contact holes to be tested, and the test pins connected to the first M0 metal layer and the second M0 metal layer are located on different sides of the active area, such as Figure 1 In the embodiment, the test pins on the first M0 metal layer are located at the lower side, and the test pins on the second M0 metal layer are located at the upper side.
[0041] To ensure unidirectional current flow and facilitate electrical positioning, an M0 metal cut-off layer is provided on the second M0 metal layer, and the connection point of the test pin is located between the M0 metal connection layer and the M0 metal cut-off layer, specifically between two contact holes to be tested on the second M0 metal layer, to prevent backflow through the two M0 metal connection layers, thereby realizing a unidirectional test circuit of the test pin, the contact hole to be tested, the first M0 metal layer, the M0 metal connection layer, the second M0 metal layer, the contact hole to be tested, and the test pin.
[0042] The test pin is a metal line of the M1 metal layer, which is the first layer above the M0 metal layer. In the first direction, a polysilicon cutting layer for cutting off the polysilicon layer is arranged between the active area and the M0 metal connecting layer. The M0 metal cutting layer is on a different side from the test pin on the second M0 metal layer, and is arranged between the contact hole to be tested and the polysilicon cutting layer. The size of the contact hole to be tested is the same as the size of the M0 metal layer, thereby enhancing the influence of the contact hole layer on the M0 metal layer.
[0043] The test structure in this embodiment is correspondingly provided with a current source for providing a test current.
[0044] Embodiment 2:
[0045] like Figure 2 The figure shows a schematic diagram of a test structure for monitoring metal layer short circuits provided in the second embodiment of the present utility model.
[0046] A test structure for monitoring metal layer disconnection, comprising: a plurality of test units;
[0047] Each test unit includes: an active area covering the test unit, a polysilicon layer and an M0 metal layer alternately arranged on the active area.
[0048] The M0 metal layer includes: a first M0 metal layer located on the active area and a second M0 metal layer located on one side of the active area and not covering the active area.
[0049] The first M0 metal layer and the second M0 metal layer are connected through the M0 metal connecting layer. The first M0 metal layer and / or the second M0 metal layer are provided with a contact hole to be tested adjacent to the M0 metal connecting layer. The first M0 metal layer and the second M0 metal layer are both connected with a test pin (M1 snakepin) to form a test link including the contact hole to be tested, the first M0 metal layer, and the M0 metal connecting layer. Adjacent test units share the same M1 metal layer to form a connection.
[0050] Specifically, the polysilicon layer is set to extend in a first direction (eg Figure 2 The vertical direction of the polysilicon layer is perpendicular to the second direction (such as Figure 2 left and right directions); the polysilicon layer and the first M0 metal layer present a strip structure, and are arranged on the active area at equal intervals along the second direction; multiple active areas on multiple test units are arranged at intervals along the second direction; the second M0 metal layer is located between two adjacent active areas and has a certain distance from the active areas on the left and right sides.
[0051] The first M0 metal layer is connected to the M0 metal connection layer on both sides of the active area along its length extension direction (first direction), that is, the M0 metal connection layer is arranged on the upper and lower sides of the first M0 metal layer, and the first M0 metal layer and the second M0 metal layer are provided with contact holes to be tested at positions near the M0 metal connection layer on the upper and lower sides, and the contact holes to be tested are located between the M0 metal connection layer and the active area, and adjacent test units share the same M1 metal layer to form a connection, and the M1 metal layer connected to the first M0 metal layer and the second M0 metal layer is located on different sides of the active area, such as Figure 2 In the figure, the upper side of the second M0 metal layer on the first test unit on the left is connected to the upper side of the first M0 metal layer on the second test unit on the left through the M1 metal layer. Then the M1 metal layer connecting the second M0 metal layer on the second test unit on the left and the first M0 metal layer on the first test unit on the right is located at the bottom. In addition, the M1 metal layers at the head and tail positions are set as test pins. Figure 2 As shown, the first M0 metal layer on the leftmost active area is connected to the test pin, and the second M0 metal layer on the right side of the leftmost active area that does not cover the active area is connected to the M1 metal layer.
[0052] Whether it is a test structure of a single test unit or multiple test units, in order to ensure that the environment is relatively real, in addition to setting the M0 metal cut-off layer, a polysilicon cut-off layer is set above the polysilicon layer and is perpendicular to it. The polysilicon cut-off layer is symmetrically set on the upper and lower sides of the active area in the first direction. The polysilicon cut-off layer has no overlapping coverage area with the M0 metal layer and the M1 metal layer and has a certain spacing setting.
[0053] Specifically, an M0 metal cut-off layer is disposed above the second M0 metal layer of the odd-numbered test unit and the first M0 metal layer of the even-numbered test unit. The M0 metal cut-off layer is disposed between the two sides of the active area and the contact hole.
[0054] Reference Figure 2 As shown, the model of 4 test units is taken as an example, and the details are as follows:
[0055] The polysilicon layer is composed of 12 equidistantly arranged strip structures, and there are 12 corresponding M0 metal layers, which can be defined as M0 metal layers 1-12. The active area of each square structure covers 3 strip-shaped polysilicon layers and 2 polysilicon layers of M0 metal layers, and is located in the middle.
[0056] like Figure 2 As shown, the M0 metal layers 1-2, 4-5, 7-8, 10-11 correspond to an active area respectively, wherein 2, 5, 8, 11 are the first M0 metal layers, and 3, 6, 9, 12 are the second M0 metal layers that do not cover the active area.
[0057] The first M0 metal layer and the second M0 metal layer on its right side that does not cover the active area are provided with contact holes on the upper and lower sides of the active area. The M0 metal layers 2 and 3, 5 and 6, 8 and 9, 11 and 12 are connected at the ends of the upper and lower sides through the M0 metal connecting layer. The contact hole is arranged adjacent to the M0 metal connecting layer and is located between the M0 metal connecting layer and the active area. The size of the contact hole is the same as the size of the M0 metal layer. The lower sides of the M0 metal layers 2 and 12 are connected to the test pins through the contact holes. The M0 metal layers 5 and 3, 11 and 9 are connected through the M1 metal layer and are located on the upper side of the active area. The two adjacent M1 metal layers are not on the same side relative to the active area. Therefore, the M1 metal layer connected between the M0 metal layers 8 and 6 is located on the lower side of the active area, and the M1 metal layer is connected to the M0 metal layer through the contact hole.
[0058] The M1 metal layers with odd numbers from left to right along the left-right direction are provided with an M0 metal cutting layer on the other side relative to the active area, that is, the M0 metal layers 3, 5, 9, and 11 are provided with an M0 metal cutting layer for cutting off the M0 metal layers, so that the current flow of the entire structure is unidirectional.
[0059] As a preferred embodiment of the present utility model, the test structure in this embodiment is correspondingly provided with a current source for providing a test current.
[0060] The utility model provides a test structure for monitoring metal layer short circuits, forming a unidirectional test link including a contact hole, a first M0 metal layer, and an M0 metal connecting layer. When the contact hole exists and the current path flows through the contact hole, the first M0 metal layer, and the M0 metal connecting layer, the M0 metal layer short circuit caused by the contact hole, the first M0 metal layer, and the M0 metal connecting layer can be detected. In addition, the structure introduces a metal layer cut-off layer and a polysilicon cut-off layer to ensure that the environment is relatively real, and to ensure that the current on the test link flows unidirectionally, so as to facilitate electrical positioning. The contact hole is arranged adjacent to the M0 metal connecting layer to enhance the influence of the contact hole on the M0 metal layer.
[0061] The above is a detailed introduction to a test structure for monitoring metal layer short circuits provided by the utility model. This article uses specific examples to illustrate the structure and working principle of the utility model. The description of the above embodiments is only used to help understand the method and core idea of the utility model. It should be pointed out that for ordinary technicians in this technical field, without departing from the principle of the utility model, the utility model can also be improved and modified, and these improvements and modifications also fall within the scope of protection of the claims of the utility model.
Claims
1. A test structure for monitoring metal layer disconnection, characterized in that: The test unit comprises an active area, a polysilicon layer and a first M0 metal layer alternately arranged on the active area, and a second M0 metal layer located on one side of the active area; The first M0 metal layer and the second M0 metal layer are connected via an M0 metal connecting layer. The first M0 metal layer and / or the second M0 metal layer are provided with a contact hole to be tested adjacent to the M0 metal connecting layer. Test pins are connected to the first M0 metal layer and the second M0 metal layer to form a test link including the contact hole to be tested, the first M0 metal layer, and the M0 metal connecting layer.
2. A test structure for monitoring metal layer disconnection according to claim 1, characterized in that: The first M0 metal layer is connected to the M0 metal connection layer on both sides of the active area along its length extension direction, the contact hole to be tested is located between the M0 metal connection layer and the active area, and the test pins are located on different sides of the active area.
3. A test structure for monitoring metal layer disconnection according to claim 2, characterized in that: An M0 metal cutting layer is disposed on the second M0 metal layer, and the connection point of the test pin is located between the M0 metal connecting layer and the M0 metal cutting layer.
4. A test structure for monitoring metal layer disconnection according to claim 1, characterized in that: The test pin is a metal line of the M1 metal layer which is the first layer above the M0 metal layer.
5. A test structure for monitoring metal layer disconnection according to claim 2, characterized in that: A polysilicon cutting layer for cutting off the polysilicon layer is arranged between the active area and the M0 metal connection layer.
6. A test structure for monitoring metal layer disconnection, characterized in that: Includes several test units; Each of the test units comprises: an active area, a polysilicon layer and a first M0 metal layer alternately arranged on the active area, and a second M0 metal layer located on one side of the active area; The first M0 metal layer and the second M0 metal layer are connected through the M0 metal connecting layer, and the first M0 metal layer and the second M0 metal layer are both provided with contact holes adjacent to the M0 metal connecting layer; the first M0 metal layer and the second M0 metal layer are connected to the M1 metal layer through the contact holes to form a test link including the contact holes to be tested, the first M0 metal layer, and the M0 metal connecting layer, and the adjacent test units share the same M1 metal layer to form a connection.
7. A test structure for monitoring metal layer disconnection according to claim 6, characterized in that: The M0 metal connecting layer and the contact hole are arranged on both sides of the active area along the length extension direction of the first M0 metal layer, the contact hole is arranged between the active area and the M0 metal connecting layer, the M1 metal layer is connected to one side of the M0 metal layer below through the contact hole, and the adjacent M1 metal layers are located on different sides of the active area.
8. A test structure for monitoring metal layer disconnection according to claim 7, characterized in that: An M0 metal cut-off layer is disposed above the second M0 metal layer of the odd-numbered test units and the first M0 metal layer of the even-numbered test units.
9. A test structure for monitoring metal layer disconnection according to claim 8, characterized in that: The M0 metal cut-off layer is disposed between the active area and the contact hole.
10. A test structure for monitoring metal layer disconnection according to claim 8, characterized in that: A polysilicon cutting layer is arranged above the polysilicon layer and vertically thereto.
11. A test structure for monitoring metal layer disconnection according to claim 6, characterized in that: The width of the first M0 metal layer and the second M0 metal layer is the same as that of the contact hole.
12. A test structure for monitoring metal layer disconnection according to claim 6, characterized in that: The M1 metal layers located at the head and tail positions are set as test pins.