Circuit for isolating and identifying EPB switching signal through double MCUs
By designing a circuit for EPB system and using signal channels to select components such as chips and composite transistors, the isolation of the EPB switching signals between the main MCU1 and the auxiliary MCU2 is achieved, solving the problem of signal identification errors and function degradation, and improving the problem of Functional safety of EPB system.
Patent Information
- Application Number
- CN202420798645.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-04-17
- Publication Date
- 2025-02-14
- Estimated Expiration
- 2034-04-17
AI Technical Summary
In the EPB system, there is interference in signal recognition between the main control MCU1 and the auxiliary control MCU2, resulting in signal recognition errors. When the main control MCU1 fails, the auxiliary MCU2 cannot correctly identify the EPB switch signal.
A circuit was designed to select chip U1, composite transistors Q1, U2 and transistors Q2, Q3 through signal channels to achieve isolation of EPB switching signals, ensuring that the main MCU1 and auxiliary MCU2 can be correctly identified and controlled in both normal and failure modes. EPB switch signal.
The signal interference between the main MCU1 and the auxiliary MCU2 is effectively isolated, ensuring the functional safety of the EPB system, avoiding signal recognition errors, and ensuring the correct control of the auxiliary MCU2 when the main MCU1 fails.
Smart Images

Figure CN222484687U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of an EPB switch circuit, in particular to a circuit used for isolating and identifying an EPB switch signal of a dual MCU. Background Art
[0002] With the release of the passenger car GB 26262 functional safety standard, higher functional safety requirements are put forward for automotive electronic products. As part of the chassis brake system, the safety of EPB is particularly important. The EPB electronic parking system allows the EPB chip to identify the need to clamp or release the caliper by toggling the EPB switch. Therefore, the correct recognition of the switch action by the parking chip is an important part of the EPB functional safety design.
[0003] In order to increase the functional safety of switch identification in the EPB system, redundant chips are used for signal identification. However, if the EPB switch signal is not isolated, the signal is directly connected in parallel to two redundant control chips. This method has the following two problems:
[0004] 1. The main control MCU1 may make signal recognition errors or fault diagnosis for the EPB switch signal due to signal interference from the auxiliary MCU2.
[0005] 2. The main control MCU1 fails, the system function is degraded, and the auxiliary control chip will recognize the EPB switch signal or diagnose the fault, which may lead to signal recognition errors due to the abnormal state of the main MCU1. Utility Model Content
[0006] In order to solve the problems existing in the background technology, the utility model discloses a circuit for isolating and identifying EPB switch signals of dual MCUs.
[0007] The technical solution of the utility model is achieved in this way:
[0008] The utility model includes four parts, namely a main microcontroller chip MCU1 and a main power management PM1 module, an auxiliary microcontroller chip MCU2 and an auxiliary power management PM2 module, an EPB switch signal switching and 5V power switching module and an EPB switch module; the main microcontroller chip MCU1 and the main power management PM1 module, the auxiliary microcontroller chip MCU2 and the auxiliary power management PM2 module are all connected to the EPB switch signal switching and 5V power switching module, and the EPB switch signal switching and 5V power switching module are connected to the EPB switch module.
[0009] The main microcontroller chip MCU1 and the main power management PM1 module include the main MCU1, and the general input and output ports EPB_SW1_M, EPB_SW4_M, EPB_SW3_M, and EPB_SW6_M of the main MCU1 are respectively connected to the 1B1 pin, 3B1 pin, 2B1 pin, and 4B1 pin of the signal channel selection chip U1 in the EPB switch signal switching and 5V power switching module; the ADC analog-to-digital conversion port M1_AD_5V_EPB_SW, the analog-to-digital conversion port M1_AD_VCC_5V, and the general input and output port M1_DRV_POWER_VCC_5V of the main MCU1 are connected to the EPB switch signal switching and 5V power switching module, and the power supply VBAT is connected via the main power management chip PM1 and the logic power supply port interface of the main MCU1.
[0010] The auxiliary microcontroller chip MCU2 and the auxiliary power management PM2 module include an auxiliary MCU2, and the general input and output ports EPB_SW1_S, EPB_SW4_S, EPB_SW3_S, and EPB_SW6_S of the auxiliary MCU2 are respectively connected to the 1B2 pin, 3B2 pin, 2B2 pin, and pin 4B2 pin of the signal channel selection chip U1 in the EPB switch signal switching and 5V power switching module; the general input and output port M2_DRV_EPB_SW, ADC analog-to-digital conversion port M2_AD_5V_EPB_SW, general input and output port M2_DRV_POWER_VCC_5V, and analog-to-digital conversion port M2_AD_VCC_5V of the auxiliary MCU2, and the power supply VBAT is connected through the auxiliary power management chip PM2 and the logic power supply port interface of the main MCU2.
[0011] The EPB switch signal switching and 5V power switching module includes a signal channel selection chip U1, a composite transistor Q1, a composite transistor U2, a transistor Q2 and a transistor Q3. The pin S of the signal channel selection chip U1 is grounded via a resistor R1, pin 1A is connected to the EPB switch signal line port EPB_SW1 pin of the EPB switch module, pin 2A is connected to the EPB switch signal line port EPB_SW3 pin of the EPB switch module, pin 3A is connected to the EPB switch signal line port EPB_SW4 pin of the EPB switch module, pin 4A is connected to the EPB switch signal line port EPB_SW6 pin of the EPB switch module, the GND pin and the OE pin are grounded, the pins are connected to the power supply voltage VCC_5V and are grounded via a capacitor C1 at the same time.
[0012] The composite transistor Q1 is composed of two transistors connected in reverse, wherein the emitter of the first transistor is grounded, the base pin of the first transistor is connected to the general input and output port 2_DRV_EPB_SW of the auxiliary MCU2 in the auxiliary micro-control chip MCU2 and the auxiliary power management PM2 module, the collector of the first transistor is connected to the base of the second transistor, the emitter of the second transistor is connected to the power supply voltage VDD2_5V, the collector of the second transistor is connected to the pin S of the signal channel selection chip U1, and is also connected to the ADC analog-to-digital conversion port M1_AD_5V_EPB_SW of the main MCU1 in the main micro-control chip MCU1 and the main power management PM1 module, and the ADC analog-to-digital conversion port M2_AD_5V_EPB_SW of the auxiliary MCU2 in the auxiliary micro-control chip MCU2 and the auxiliary power management PM2 module.
[0013] The composite transistor U2 is composed of two transistors connected in reverse, wherein the emitter of the first transistor is grounded, the base pin of the first transistor is connected to the general input and output port M1_DRV_POWER_VCC_5V of the main MCU1 in the main microcontroller chip MCU1 and the main power management PM1 module, the collector of the first transistor is connected to the base of the transistor Q3 via a resistor R6, the collector of the second transistor is connected to the base of the transistor Q2 via a resistor R7, the emitter of the second transistor is connected to the power supply voltage VDD2_5V, the collector of the second transistor is connected to the signal It is connected to pin S of the channel selection chip U1, and is also connected to the ADC analog-to-digital conversion port M1_AD_5V_EPB_SW of the main MCU1 in the main microcontroller chip MCU1 and the main power management PM1 module, and the ADC analog-to-digital conversion port M2_AD_5V_EPB_SW of the auxiliary MCU2 in the auxiliary power management PM2 module. The base of the second transistor is connected to the general input and output port M2_DRV_POWER_VCC_5V of the auxiliary MCU2 in the auxiliary microcontroller chip MCU2 and the auxiliary power management PM2 module.
[0014] The emitter of transistor Q2 is connected to the power supply VDD2_5V, the collector of transistor Q2 is connected to the collector of transistor Q3, the emitter of transistor Q3 is connected to the power supply VDD1_5V, the collector of transistor Q2 and the collector of transistor Q3 are connected to ground through resistors R4 and R2 in sequence, and the collector of transistor Q2 and the collector of transistor Q3 are connected to ground through resistors R5 and R3 in sequence, capacitor C2 and capacitor C3 are connected in parallel to resistor R2 and resistor R3 respectively, the lead between resistor R4 and resistor R2 is connected to the analog-to-digital conversion port M2_AD_VCC_5V of the auxiliary MCU2 in the auxiliary micro-control chip MCU2 and the auxiliary control power management PM2 module, and the lead between resistor R5 and resistor R3 is connected to the analog-to-digital conversion port M1_AD_VCC_5V of the main MCU1 in the main micro-control chip MCU1 and the main control power management PM1 module.
[0015] The EPB switch module contains a single-pole double-throw switch, which switches the connection relationship of the four switch signal line ports through the action of the switch. There are three specific situations:
[0016] Normal state: At this time, the connection relationship inside the EPB switch is that the switch signal line port EPB_SW1 is connected to the switch signal line port EPB_SW4, and the switch signal line port EPB_SW4 is connected to the switch signal line port EPB_SW3;
[0017] Pull up: At this time, the connection relationship inside the EPB switch is that the switch signal line port EPB_SW1, the switch signal line port EPB_SW4 and the switch signal line port EPB_SW3 are connected, and the switch signal line port EPB_SW6 is disconnected;
[0018] Release: At this time, the connection relationship inside the EPB switch is that the switch signal line port EPB_SW1, the switch signal line port EPB_SW3 and the switch signal line port EPB_SW6 are connected, and the switch signal line port EPB_SW4 is disconnected.
[0019] Beneficial effects of the utility model:
[0020] The utility model isolates the redundant MCUs from controlling the same load EPB switch through the signal channel selection chip, preventing the auxiliary MCU from affecting the control of the EPB switch when the main MCU fails, or the auxiliary MCU from interfering with the control of the EPB switch when the main MCU is working, affecting the control of the EPB switch by the main MCU. This circuit design improves the functional safety of the EPB electronic parking system. BRIEF DESCRIPTION OF THE DRAWINGS
[0021] Figure 1 The schematic diagram of a circuit for isolating and identifying EPB switch signals of dual MCUs.
[0022] In the figure: main microcontroller chip MCU1 and main power management module PM1 (1), auxiliary microcontroller chip MCU2 and auxiliary power management module PM2 (2), EPB switch signal switching and 5V power switching module (3), EPB switch module (4). DETAILED DESCRIPTION
[0023] The utility model is further described below in conjunction with the accompanying drawings and embodiments.
[0024] like Figure 1 As shown, it includes four parts, namely the main microcontroller chip MCU1 and the main power management PM1 module 1, the auxiliary microcontroller chip MCU2 and the auxiliary power management PM2 module 2, the EPB switch signal switching and 5V power switching module 3 and the EPB switch module 4; the main microcontroller chip MCU1 and the main power management PM1 module 1, the auxiliary microcontroller chip MCU2 and the auxiliary power management PM2 module 2 are all connected with the EPB switch signal switching and 5V power switching module 3, and the EPB switch signal switching and 5V power switching module 3 and the EPB switch module 4 are connected.
[0025] The main microcontroller chip MCU1 and the main power management PM1 module 1 include the main MCU1, and the general input and output ports EPB_SW1_M, EPB_SW4_M, EPB_SW3_M, and EPB_SW6_M of the main MCU1 are respectively connected to the No. 2 1B1 pin, No. 11 3B1 pin, No. 5 2B1 pin, and No. 14 4B1 pin of the signal channel selection chip U1 in the EPB switch signal switching and 5V power switching module 3; the ADC analog-to-digital conversion port M1_AD_5V_EPB_SW, the analog-to-digital conversion port M1_AD_VCC_5V, and the general input and output port M1_DRV_POWER_VCC_5V of the main MCU1 are connected to the EPB switch signal switching and 5V power switching module 3, and the power supply VBAT is connected to the 5V logic power supply port interface of the main MCU1 through the step-down output 5V of the main power management chip PM1; the power supply VBAT is stepped down and converted into VDD1_5V in the module to power the main microcontroller chip.
[0026] The auxiliary microcontroller chip MCU2 and the auxiliary power management PM2 module 2 include the auxiliary MCU2, and the general input and output ports EPB_SW1_S, EPB_SW4_S, EPB_SW3_S, and EPB_SW6_S of the auxiliary MCU2 are respectively connected to the 3rd 1B2 pin, the 10th 3B2 pin, the 6th 2B2 pin, and the 13th 4B2 pin of the signal channel selection chip U1 in the EPB switch signal switching and 5V power switching module 3; the general input and output port M2_DRV_EPB_SW, the ADC analog-to-digital conversion port M2_AD_5V_EPB_SW, the general input and output port M2_DRV_POWER_VCC_5V, and the analog-to-digital conversion port M2_AD_VCC_5V of the auxiliary MCU2, and the power supply VBAT is connected to the 5V logic power supply port interface of the main MCU2 through the step-down output 5V of the auxiliary power management chip PM2. In the module, the power supply VBAT is stepped down and converted into VDD2_5V to power the auxiliary MCU2 of the auxiliary microcontroller chip.
[0027] The EPB switch signal switching and 5V power supply switching module 3 includes a signal channel selection chip U1, a composite triode Q1, a composite triode U2, a triode Q2 and a triode Q3. Pin 1 S of the signal channel selection chip U1 is grounded via a resistor R1, pin 1A of pin 4 is connected to the EPB switch signal line port EPB_SW1 pin of the EPB switch module 4, pin 2A of pin 7 is connected to the EPB switch signal line port EPB_SW3 pin of the EPB switch module 4, pin 3A of pin 9 is connected to the EPB switch signal line port EPB_SW4 pin of the EPB switch module 4, pin 4A of pin 12 is connected to the EPB switch signal line port EPB_SW6 pin of the EPB switch module 4, GND pin 8 and OE pin 15 are grounded, and pin 16 is connected to the power supply voltage VCC_5V and is grounded via a capacitor C1 at the same time; the signal channel selection chip U1 is powered at pin 16 and connected to the power supply VCC_5V, and pin 15 OE and pin 8 are grounded.
[0028] The composite transistor Q1 is composed of two transistors connected in reverse, wherein emitter No. 1 of the first transistor is grounded, base pin No. 2 of the first transistor is connected to the general input and output port M2_DRV_EPB_SW of the auxiliary MCU2 in the auxiliary microcontroller chip MCU2 and the auxiliary power management PM2 module 2, collector No. 6 of the first transistor is connected to base No. 5 of the second transistor, emitter No. 4 of the second transistor is connected to the power supply voltage VDD2_5V, collector No. 3 of the second transistor is connected to pin No. 1 S of the signal channel selection chip U1, and is also connected to the ADC analog-to-digital conversion port M1_AD_5V_EPB_SW of the main MCU1 in the main microcontroller chip MCU1 and the main power management PM1 module 1, and the ADC analog-to-digital conversion port M2_AD_5V_EPB_SW of the auxiliary MCU2 in the auxiliary microcontroller chip MCU2 and the auxiliary power management PM2 module 2.
[0029] The composite transistor U2 is composed of two transistors connected in reverse, wherein the emitter No. 1 of the first transistor is grounded, the base pin No. 2 of the first transistor is connected to the general input and output port M1_DRV_POWER_VCC_5V of the main MCU1 in the main microcontroller chip MCU1 and the main power management PM1 module 1, the collector No. 6 of the first transistor is connected to the base of the transistor Q3 via the resistor R6, the collector No. 3 of the second transistor is connected to the base of the transistor Q2 via the resistor R7, the emitter No. 4 of the second transistor is connected to the power supply voltage VDD2_5V, and the emitter No. 3 of the second transistor is connected to the power supply voltage VDD2_5V. The collector is connected to pin S No. 1 of the signal channel selection chip U1, and is also connected to the ADC analog-to-digital conversion port M1_AD_5V_EPB_SW of the main MCU1 in the main microcontroller chip MCU1 and the main power management PM1 module 1, and the ADC analog-to-digital conversion port M2_AD_5V_EPB_SW of the auxiliary MCU2 in the auxiliary microcontroller chip MCU2 and the auxiliary power management PM2 module 2. The base of the second transistor is connected to the general input and output port M2_DRV_POWER_VCC_5V of the auxiliary MCU2 in the auxiliary microcontroller chip MCU2 and the auxiliary power management PM2 module 2.
[0030] The emitter of transistor Q2 is connected to the power supply VDD2_5V, the collector of transistor Q2 is connected to the collector of transistor Q3, the emitter of transistor Q3 is connected to the power supply VDD1_5V, the collector of transistor Q2 and the collector of transistor Q3 are connected to ground through resistors R4 and R2 in sequence, and the collector of transistor Q2 and the collector of transistor Q3 are connected to ground through resistors R5 and R3 in sequence, capacitor C2 and capacitor C3 are connected in parallel to resistor R2 and resistor R3 respectively, the lead between resistor R4 and resistor R2 is connected to the analog-to-digital conversion port M2_AD_VCC_5V of the auxiliary MCU2 in the auxiliary micro-control chip MCU2 and the auxiliary control power management PM2 module 2, and the lead between resistor R5 and resistor R3 is connected to the analog-to-digital conversion port M1_AD_VCC_5V of the main MCU1 in the main micro-control chip MCU1 and the main control power management PM1 module 1.
[0031] In the specific implementation, the signal channel selection chip U1 is CBT3257APW-Q100, the composite transistor Q1 is PUMD16-Q, the composite transistor U2 is PUMH9-Q, and the transistors Q2 and Q3 are MMBT5401-AU. The resistors R2, R3, R4, and R5 are all 100K, and the capacitance of the capacitors C2 and C3 is 100nF.
[0032] The EPB switch module 4 contains a single-pole double-throw switch, which switches the connection relationship of the four switch signal line ports through the action of the switch. There are three specific situations:
[0033] Normal state: At this time, the connection relationship inside the EPB switch is that the switch signal line port EPB_SW1 is connected to the switch signal line port EPB_SW4, and the switch signal line port EPB_SW4 is connected to the switch signal line port EPB_SW3.
[0034] Apple pulls up: At this time, the connection relationship inside the EPB switch is that the switch signal line port EPB_SW1, the switch signal line port EPB_SW4 and the switch signal line port EPB_SW3 are connected, and the switch signal line port EPB_SW6 is disconnected
[0035] Relrase release: At this time, the connection relationship inside the EPB switch is that the switch signal line port EPB_SW1, the switch signal line port EPB_SW3 and the switch signal line port EPB_SW6 are connected, and the switch signal line port EPB_SW4 is disconnected.
[0036] The specific working mode of the device of the utility model includes two modes: a normal mode and a failure mode.
[0037] Normal mode: The main MCU1 works normally to process the EPB switch signal, and the auxiliary MCU2 acts as a watchdog module and does not participate in the EPB switch signal processing.
[0038] The general input and output port M1_DRV_POWER_VCC_5V of the main MCU1 outputs a high level, which is transmitted through the compound triode U2 to turn on the transistor Q3. The general input and output port M1_DRV_POWER_VCC_5V of the auxiliary MCU2 outputs a low level, which is transmitted through the compound triode U2 to turn off the transistor Q2. The power supply VDD1_5V is loaded to VCC_5V and then supplies power to pin 16 VCC of the signal channel selection chip U1. The general input and output port M2_DRV_EPB_SW of the auxiliary MCU2 outputs a low level, and pin 1 S of the signal channel selection chip U1 is a low level.
[0039] In this way, through the signal channel selection chip U1, the EPB switch signal line port EPB_SW1 pin of the EPB switch module 4 is connected to EPB_SW1_M of the main MCU1, the EPB switch signal line port EPB_SW4 pin of the EPB switch module 4 is connected to EPB_SW4_M of the main MCU1, the EPB switch signal line port EPB_SW3 pin of the EPB switch module 4 is connected to EPB_SW3_M of the main MCU1, and the EPB switch signal line port EPB_SW6 pin of the EPB switch module 4 is connected to EPB_SW6_M of the main MCU1.
[0040] At the same time, the EPB switch signal line port EPB_SW1 pin of the EPB switch module 4 is disconnected from EPB_SW1_S of the auxiliary MCU2, the EPB switch signal line port EPB_SW4 pin of the EPB switch module 4 is disconnected from EPB_SW4_S of the auxiliary MCU2, the EPB switch signal line port EPB_SW3 pin of the EPB switch module 4 is disconnected from EPB_SW3_S of the auxiliary MCU2, and the EPB switch signal line port EPB_SW6 pin of the EPB switch module 4 is disconnected from EPB_SW6_M of the auxiliary MCU2, so that the main control MCU1 controls the switch signal.
[0041] Failure mode: The main MCU1 fails and cannot process the EPB switch signal normally. The auxiliary MCU2 serves as the processing unit of the EPB switch signal.
[0042] The general input and output port M2_DRV_POWER_VCC_5V of the main MCU1 will be changed to output high level, which is transmitted through the composite triode U2 to turn on the transistor Q2. The general input and output port M2_DRV_POWER_VCC_5V of the main MCU1 outputs low level, the transistor Q3 is disconnected, and the power supply VDD2_5V is loaded to VCC_5V to supply power to the 16th pin VCC of the signal channel selection chip U1. The general input and output port M2_DRV_EPB_SW of the auxiliary MCU2 outputs high level, and the 1st pin S of the signal channel selection chip U1 is high level.
[0043] Through the signal channel selection chip U1, the EPB switch signal line port EPB_SW1 pin of the EPB switch module 4 is disconnected from EPB_SW1_M of MCU1, the EPB switch signal line port EPB_SW4 pin of the EPB switch module 4 is disconnected from EPB_SW4_M of the main MCU1, the EPB switch signal line port EPB_SW3 pin of the EPB switch module 4 is disconnected from EPB_SW3_M of the main MCU1, and the EPB switch signal line port EPB_SW6 pin of the EPB switch module 4 is disconnected from EPB_SW6_M of the main MCU1.
[0044] At the same time, the EPB switch signal line port EPB_SW1 pin of the EPB switch module 4 is connected to the EPB_SW1_S of the auxiliary MCU2, the EPB switch signal line port EPB_SW4 pin of the EPB switch module 4 is connected to the EPB_SW4_S of the auxiliary MCU2, the EPB switch signal line port EPB_SW3 pin of the EPB switch module 4 is connected to the EPB_SW3_S of the auxiliary MCU2, and the EPB switch signal line port EPB_SW6 pin of the EPB switch module 4 is connected to the EPB_SW6_M of the auxiliary MCU2, so that the auxiliary control MCU2 controls the switch signal.
Claims
1. A circuit for isolating and identifying EPB switch signals of dual MCUs, characterized in that: The invention comprises four parts, namely a main microcontroller chip MCU1 and a main power management module PM1 (1), an auxiliary microcontroller chip MCU2 and an auxiliary power management module PM2 (2), an EPB switch signal switching and 5V power switching module (3) and an EPB switch module (4); the main microcontroller chip MCU1 and the main power management module PM1 (1), the auxiliary microcontroller chip MCU2 and the auxiliary power management module PM2 (2) are all connected to the EPB switch signal switching and 5V power switching module (3), and the EPB switch signal switching and 5V power switching module (3) is connected to the EPB switch module (4); The EPB switch signal switching and 5V power supply switching module (3) comprises a signal channel selection chip U1, a composite triode Q1, a composite triode U2, a triode Q2 and a triode Q3, a pin S of the signal channel selection chip U1 is grounded via a resistor R1, a pin 1A is connected to an EPB switch signal line port EPB_SW1 pin of the EPB switch module (4), a pin 2A is connected to an EPB switch signal line port EPB_SW3 pin of the EPB switch module (4), a pin 3A is connected to an EPB switch signal line port EPB_SW4 pin of the EPB switch module (4), a pin 4A is connected to an EPB switch signal line port EPB_SW6 pin of the EPB switch module (4), a GND pin and an OE pin are grounded, and the pins are connected to a power supply voltage VCC_5V and are grounded via a capacitor C1 at the same time; The composite transistor Q1 is composed of two transistors connected in reverse, wherein the emitter of the first transistor is grounded, the base pin of the first transistor is connected to the general input and output port 2_DRV_EPB_SW of the auxiliary MCU2 in the auxiliary microcontroller chip MCU2 and the auxiliary power management PM2 module (2), the collector of the first transistor is connected to the base of the second transistor, the emitter of the second transistor is connected to the power supply voltage VDD2_5V, the collector of the second transistor is connected to the pin S of the signal channel selection chip U1, and is also connected to the ADC analog-to-digital conversion port M1_AD_5V_EPB_SW of the main MCU1 in the main microcontroller chip MCU1 and the main power management PM1 module (1), and the ADC analog-to-digital conversion port M2_AD_5V_EPB_SW of the auxiliary MCU2 in the auxiliary microcontroller chip MCU2 and the auxiliary power management PM2 module (2); The composite transistor U2 is composed of two transistors connected in reverse, wherein the emitter of the first transistor is grounded, the base pin of the first transistor is connected to the general input and output port M1_DRV_POWER_VCC_5V of the main MCU1 in the main microcontroller chip MCU1 and the main power management PM1 module (1), the collector of the first transistor is connected to the base of the transistor Q3 via a resistor R6, the collector of the second transistor is connected to the base of the transistor Q2 via a resistor R7, the emitter of the second transistor is connected to the power supply voltage VDD2_5V, the collector of the second transistor is connected to the signal channel The pin S of the selection chip U1 is connected, and is also connected to the ADC analog-to-digital conversion port M1_AD_5V_EPB_SW of the main MCU1 in the main control power management PM1 module (1), and the ADC analog-to-digital conversion port M2_AD_5V_EPB_SW of the auxiliary MCU2 in the auxiliary control power management PM2 module (2). The base of the second transistor is connected to the general input and output port M2_DRV_POWER_VCC_5V of the auxiliary MCU2 in the auxiliary control power management PM2 module (2); The emitter of transistor Q2 is connected to power supply VDD2_5V, the collector of transistor Q2 is connected to the collector of transistor Q3, the emitter of transistor Q3 is connected to power supply VDD1_5V, the collector of transistor Q2 and the collector of transistor Q3 are connected to ground through resistors R4 and R2 in sequence, and the collector of transistor Q2 and the collector of transistor Q3 are connected to ground through resistors R5 and R3 in sequence, capacitor C2 and capacitor C3 are connected to resistor R2 and resistor R3 in parallel respectively, the lead between resistor R4 and resistor R2 is connected to the analog-to-digital conversion port M2_AD_VCC_5V of the auxiliary MCU2 in the auxiliary microcontroller chip MCU2 and the auxiliary control power management PM2 module (2), and the lead between resistor R5 and resistor R3 is connected to the analog-to-digital conversion port M1_AD_VCC_5V of the main MCU1 in the main microcontroller chip MCU1 and the main control power management PM1 module (1).
2. A circuit for isolating and identifying EPB switch signals of dual MCUs according to claim 1, characterized in that: The main microcontroller chip MCU1 and the main power management PM1 module (1) include the main MCU1, and the general input and output ports EPB_SW1_M, EPB_SW4_M, EPB_SW3_M, and EPB_SW6_M of the main MCU1 are respectively connected to the 1B1 pin, 3B1 pin, 2B1 pin, and 4B1 pin of the signal channel selection chip U1 in the EPB switch signal switching and 5V power switching module (3); the ADC analog-to-digital conversion port M1_AD_5V_EPB_SW, the analog-to-digital conversion port M1_AD_VCC_5V, and the general input and output port M1_DRV_POWER_VCC_5V of the main MCU1 are connected to the EPB switch signal switching and 5V power switching module (3), and the power supply VBAT is connected via the main power management chip PM1 and the logic power supply port interface of the main MCU1.
3. A circuit for isolating and identifying EPB switch signals of dual MCUs according to claim 1, characterized in that: The auxiliary microcontroller chip MCU2 and the auxiliary power management PM2 module (2) include the auxiliary MCU2, the general input and output ports EPB_SW1_S, EPB_SW4_S, EPB_SW3_S, and EPB_SW6_S of the auxiliary MCU2 are respectively connected to the 1B2 pin, the 3B2 pin, the 2B2 pin, and the 4B2 pin of the signal channel selection chip U1 in the EPB switch signal switching and 5V power switching module (3); the general input and output port M2_DRV_EPB_SW, the ADC analog-to-digital conversion port M2_AD_5V_EPB_SW, the general input and output port M2_DRV_POWER_VCC_5V, and the analog-to-digital conversion port M2_AD_VCC_5V of the auxiliary MCU2, and the power supply VBAT is connected to the logic power supply port interface of the auxiliary power management chip PM2 and the main MCU2.
4. A circuit for isolating and identifying EPB switch signals of dual MCUs according to claim 1, characterized in that: The EPB switch module (4) contains a single-pole double-throw switch, which switches the connection relationship of the four switch signal line ports through the action of the switch, which is specifically divided into three situations: Normal state: At this time, the connection relationship inside the EPB switch is that the switch signal line port EPB_SW1 is connected to the switch signal line port EPB_SW4, and the switch signal line port EPB_SW4 is connected to the switch signal line port EPB_SW3; Pull up: At this time, the connection relationship inside the EPB switch is that the switch signal line port EPB_SW1, the switch signal line port EPB_SW4 and the switch signal line port EPB_SW3 are connected, and the switch signal line port EPB_SW6 is disconnected; Release: At this time, the connection relationship inside the EPB switch is that the switch signal line port EPB_SW1, the switch signal line port EPB_SW3 and the switch signal line port EPB_SW6 are connected, and the switch signal line port EPB_SW4 is disconnected.