Injection probe for testing electrostatic discharge immunity of integrated circuit

Abstract

The utility model discloses an injection probe for an integrated circuit electrostatic discharge immunity test. The injection probe comprises an elastic probe, a low parasitic effect connecting port, a flexible connecting wire, a connecting equipment level ESD gun interface and a magnetic base. Wherein the connecting device-level ESD gun interface is connected to a device-level ESD gun in a low-impedance mode, the elastic probe, the low-parasitic-effect connecting port, the flexible connecting wire and the connecting device-level ESD gun interface jointly form a transmission channel for the device-level ESD gun to output ESD pulses, the injection probe is stably fixed through the magnetic base, and the shell is well grounded. ESD pulse injection with a high voltage grade and a high fine size is realized. Through verification, the output performance of the injection probe meets the standard requirement, the integrity of ESD pulses is ensured, and a reliable solution is provided for the requirement for accurate and reliable ESD immunity evaluation in the integrated circuit industry.

Description

Technical Field

[0001] The utility model relates to the technical field of electromagnetic compatibility testing, in particular to an injection probe for testing the electrostatic discharge immunity of integrated circuits. Background Art

[0002] The electromagnetic compatibility (IC EMC) problem of integrated circuits is a key factor in the electromagnetic compatibility of electronic equipment, and is also a key factor in determining the reliability of integrated circuits. With the rapid development of integrated circuit (IC) technology, its requirements for electromagnetic compatibility (EMC) are getting higher and higher. Electrostatic discharge (ESD) immunity test is an important test item in IC EMC testing. At present, the highest output level of commercial electrostatic generators is ±9kV, while the required level of integrated circuit R&D and production manufacturers has exceeded ±15kV. In addition, the existing commercial electrostatic generators are damaged very frequently and have high maintenance costs. The performance defects of electrostatic generators dedicated to integrated circuit testing have become one of the important issues that relevant testing agencies urgently need to solve. In addition, the output level of existing equipment-level test electrostatic generators is relatively high, which can exceed ±25kV, but it cannot meet the technical requirements of integrated circuit testing such as micro size and multi-pulse output. Utility Model Content

[0003] The purpose of the utility model is to provide an injection probe connected to the gun head interface of a device-level electrostatic generator, which is used for integrated circuit electrostatic discharge immunity testing, and can realize fine ICESD testing of high discharge voltage levels and tiny-sized probes, while maintaining the integrity of ESD pulses without obvious distortion of the ESD pulse waveform.

[0004] In order to achieve the above-mentioned object, the technical solution of the utility model is to provide an injection probe for electrostatic discharge immunity test of integrated circuits, characterized in that it includes an elastic probe, a low parasitic effect connection port, a flexible connecting wire, an interface for connecting a device-level ESD gun and a magnetic base, wherein:

[0005] The elastic probe is a metal probe with a wide rear end and a small front end, the front end of the elastic probe is used to contact the pin of the IC chip, and the rear end of the elastic probe is connected to the flexible connecting wire via a low parasitic effect connection port, wherein the low parasitic effect connection port is a fixed connection or a pluggable connection;

[0006] The flexible connecting wire is a metal wire with good radio frequency conductivity, and the flexible connecting wire is connected to the interface of the device-level ESD gun through the device-level ESD gun interface, so that the elastic probe is flexibly connected to the interface of the device-level ESD gun through the flexible connecting wire;

[0007] The elastic probe, the low parasitic effect connection port, the flexible connection wire and the interface for connecting the device-level ESD gun together constitute a transmission channel for the device-level ESD gun to output ESD pulses;

[0008] The magnetic base is a good conductor with magnetism. The injection probe is fixed on the metal table of the IC test system through the magnetic base and the external structure of the injection probe is grounded.

[0009] Preferably, the elastic probe is a gold-plated copper sheet with a thickness of 1 mm to 2 mm.

[0010] Preferably, the maximum diameter of the front end of the elastic probe is less than 1 mm.

[0011] Preferably, the flexible connecting wire is an oxidation-resistant coated copper wire with a diameter greater than 2 mm.

[0012] Preferably, the flexible connecting wire is a single-core metal conductor covered with an insulating protective sheath.

[0013] Preferably, the flexible connecting wire is a coaxial structure.

[0014] Preferably, the effective connection area of ​​the low parasitic effect connection port is greater than 4 mm 2 .

[0015] Preferably, the interface for connecting the equipment-level ESD gun is a nut interface, and the interface of the equipment-level ESD gun is a stud that matches the nut interface.

[0016] Preferably, the distance between the metal conductor of the transmission channel and other metal conductors is at least 5 mm.

[0017] Preferably, the metal conductor of the transmission channel is externally wrapped with a high dielectric constant insulating material.

[0018] The beneficial technical effect of the utility model is that the IC ESD test injection probe of the utility model is connected and used in conjunction with the existing device-level ESD generator to provide high-voltage level and high-precision size ESD pulse injection. It has been verified that the output performance of the injection probe meets the requirements of the IEC 61000-4-2 standard, ensuring the integrity of the ESD pulse without obvious distortion, and providing a reliable solution for the integrated circuit industry's demand for accurate and reliable ESD immunity evaluation. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 This is a schematic diagram of the structure of an injection probe for testing electrostatic discharge immunity of integrated circuits of the utility model;

[0020] Figure 2This is an ideal ESD pulse current waveform diagram taking 8kV as an example;

[0021] Figure 3 This is an example of ESD pulse current waveform test data directly output by the device-level ESD gun of the utility model, taking 8kV as an example;

[0022] Figure 4 This is an example of ESD pulse current waveform test data output by the injection probe, taking 8kV as an example of the utility model. DETAILED DESCRIPTION

[0023] The present invention is further described below in conjunction with specific embodiments. It should be understood that these embodiments are only used to illustrate the present invention and are not used to limit the scope of the present invention. In addition, it should be understood that after reading the content taught by the present invention, those skilled in the art can make various changes or modifications to the present invention, and these equivalent forms also fall within the scope defined by the claims attached to this application.

[0024] Embodiment 1

[0025] See also Figure 1 , an injection probe for electrostatic discharge immunity test of integrated circuits, comprising an elastic probe 1, a low parasitic effect connection port 2, a flexible connection wire 3, an interface for connecting a device-level ESD gun 4 and a magnetic base 5;

[0026] The elastic probe 1 is a metal probe with a wide rear end and a sharp front end. The wide rear end is to reduce the radio frequency impedance, and the sharp front end is to facilitate contact with the pins of the IC chip, so as to achieve precise injection of ESD pulses into the tested pins of the IC chip.

[0027] A preferred embodiment is that the elastic probe 1 is a gold-plated copper sheet with a thickness of 1 mm to 2 mm, the purpose of which is to prevent oxidation, achieve good conductivity and ensure the elasticity of the front end of the probe, so as to facilitate good contact between the front end of the probe and the measured pin of the IC chip and not cause physical mechanical stress damage to the IC chip.

[0028] A preferred embodiment is that the maximum diameter of the front end of the elastic probe 1 is less than 1 mm, so as to be suitable for testing smaller IC chip pins.

[0029] The flexible connecting wire 3 is a metal wire with good radio frequency conductivity, which is used to flexibly connect the elastic probe 1 to the interface of the device-level ESD gun (ie, the device-level electrostatic generator gun), so as to facilitate the low-stress movement of the injection probe provided by the utility model.

[0030] A preferred implementation is that the flexible connecting wire 3 is an oxidation-resistant coated copper wire with a diameter greater than 2 mm.

[0031] A preferred implementation is that the flexible connecting wire 3 should be a single-core metal conductor and covered with an insulating protective sheath.

[0032] In a preferred embodiment, the flexible connecting wire 3 can be configured as a coaxial structure to keep the radio frequency impedance of the core conductor of the flexible connecting wire 3 stable.

[0033] The low parasitic effect connection port 2 is a fixed connection or a pluggable connection, and is used to connect the elastic probe 1 to the flexible connecting wire 3 with low impedance.

[0034] A preferred embodiment is that the effective connection area of ​​the low parasitic effect connection port 2 should be greater than 4mm 2 .

[0035] The device-level ESD gun connection interface 4 is set according to the gun head interface type of the device-level ESD gun, typically a nut interface, which is used to connect the flexible connecting wire 3 to the stud of the device-level ESD gun with low impedance.

[0036] The magnetic base 5 is a good conductor with magnetism, and is used to stably fix the injection probe provided by the utility model on the metal table of the IC test system, and at the same time realize grounding of the external structure of the injection probe to reduce the influence of parasitic effects.

[0037] The elastic probe 1, the low parasitic effect connection port 2, the flexible connection wire 3 and the interface 4 for connecting the device-level ESD gun together constitute a transmission channel for the device-level ESD gun to output ESD pulses.

[0038] A preferred embodiment is that the metal conductor of the transmission channel is spaced at least 5 mm from other metals to ensure sufficient gap to prevent ESD pulse high voltage breakdown;

[0039] A preferred implementation is that the metal conductor of the transmission channel is wrapped with a high dielectric constant insulating material to more effectively prevent ESD pulse high voltage breakdown.

[0040] Based on the ideal ESD pulse current waveform diagram of the first embodiment taking 8kV as an example, Figure 2 As shown, its peak current I p The current I at 30ns is 30A. 30 is 16A, pulse rise time t r It is 0.8ns.

[0041] Based on the ESD pulse current waveform test data example directly output by the device-level ESD gun taking 8kV as an example in Example 1, Figure 3As shown, the peak current is 30.94A, the current at 30ns is 17.99A, and the pulse rise time is 0.89ns.

[0042] According to the relevant standards, the permissible deviation of the peak current is ±15%, the permissible deviation of the current at 30ns is ±30%, and the permissible deviation of the pulse rise time is ±25%, that is, the permissible ranges of the peak current, the current at 30ns, and the pulse rise time are (25.5~34.5)A, (11.2~20.8)A, and (0.6~1.0)ns, respectively. Therefore, the ESD pulse current waveform related measurement values ​​directly output by the device-level ESD gun, taking 8kV as an example, all meet the standard requirements.

[0043] Based on the first embodiment of the present invention, an example of ESD pulse current waveform test data output by the injection probe at 8kV is shown as follows: Figure 4 As shown, the peak current is 30.44A, the current at 30ns is 17.85A, and the pulse rise time is 0.90ns. These measured values ​​are close to the measured values ​​of the ESD pulse current waveform directly output by the equipment-level ESD gun and all meet the standard requirements.

[0044] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention shall be included in the scope of protection of the present invention.

Claims

1. An injection probe for testing electrostatic discharge immunity of integrated circuits, characterized in that: It includes a spring probe, a low parasitic effect connector, a flexible connecting wire, an interface for connecting a device-level ESD gun, and a magnetic base, wherein: The elastic probe is a metal probe with a wide rear end and a small front end, the front end of the elastic probe is used to contact the pin of the IC chip, and the rear end of the elastic probe is connected to the flexible connecting wire via a low parasitic effect connection port, wherein the low parasitic effect connection port is a fixed connection or a pluggable connection; The flexible connecting wire is a metal wire with good radio frequency conductivity, and the flexible connecting wire is connected to the interface of the device-level ESD gun through the device-level ESD gun interface, so that the elastic probe is flexibly connected to the interface of the device-level ESD gun through the flexible connecting wire; The elastic probe, the low parasitic effect connection port, the flexible connection wire and the interface for connecting the device-level ESD gun together constitute a transmission channel for the device-level ESD gun to output ESD pulses; The magnetic base is a good conductor with magnetism. The injection probe is fixed on the metal table of the IC test system through the magnetic base and the external structure of the injection probe is grounded.

2. The injection probe for testing electrostatic discharge immunity of integrated circuits as claimed in claim 1, characterized in that: The elastic probe is a gold-plated copper sheet with a thickness of 1 mm to 2 mm.

3. The injection probe for testing electrostatic discharge immunity of integrated circuits according to claim 1, characterized in that: The maximum diameter of the front end of the elastic probe is less than 1 mm.

4. The injection probe for testing electrostatic discharge immunity of integrated circuits according to claim 1, characterized in that: The flexible connecting wire is an anti-oxidation coated copper wire with a diameter greater than 2 mm.

5. The injection probe for testing electrostatic discharge immunity of integrated circuits as claimed in claim 1, characterized in that: The flexible connecting wire is a single-core metal conductor covered with an insulating protective sleeve.

6. The injection probe for testing electrostatic discharge immunity of integrated circuits as claimed in claim 1, characterized in that: The flexible connecting wire is a coaxial structure.

7. The injection probe for testing electrostatic discharge immunity of integrated circuits as claimed in claim 1, characterized in that: The effective connection area of ​​the low parasitic effect connection port is greater than 4 mm 2 .

8. The injection probe for testing electrostatic discharge immunity of integrated circuits as claimed in claim 1, characterized in that: The interface for connecting the equipment-level ESD gun is a nut interface, and the interface of the equipment-level ESD gun is a stud that matches the nut interface.

9. The injection probe for testing electrostatic discharge immunity of integrated circuits as claimed in claim 1, characterized in that: The distance between the metal conductor of the transmission channel and other metal conductors is at least 5 mm.

10. The injection probe for testing electrostatic discharge immunity of integrated circuits according to claim 1, characterized in that: The metal conductor of the transmission channel is wrapped with a high dielectric constant insulating material.

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