Computing server based on Feiteng S5000C-32 computing blade

Abstract

The utility model discloses a computing server based on a Feiteng S5000C-32 computing blade, which comprises a processor unit, and the processor unit is electrically connected with a BMC (Baseboard Management Controller) health management unit, a 40G network card unit, a front-out gigabit network card unit, a rear-out gigabit network card unit, a display unit, a serial port unit, a USB (Universal Serial Bus) / SATA (Serial Advanced Technology Attachment) interface unit, an IPMB (Intelligent Platform Management Bus) interface unit, a hot plug unit and a clock unit. A domestic Fengyun S5000C-32 core processor is used as a core, front-end data comprehensive processing is completed, and operation resource support is provided for achieving functions such as task management, system management, data fusion, comprehensive detection and comprehensive recognition. The processor can provide PCIE5.0, DDR5, a debugging serial port and other interfaces to the outside, the application scenarios of radar signal processing, data processing and the like needing high-speed intensive calculation can be met, and the module adopts a chip produced in China, so that the international competitiveness of the product is improved.

Description

Technical Field

[0001] The utility model relates to the technical field of computers, and in particular to a computing server based on a Feiteng S5000C-32 computing blade. Background Art

[0002] With the continuous improvement of modern technology, wireless communication technology has penetrated into all walks of life, bringing great technological innovation and improvement to all walks of life. In application scenarios that require high-speed and intensive computing, such as radar signal processing and data processing, the requirements for computer blades are getting higher and higher.

[0003] Existing computing blades need to provide 40G Ethernet (40GBase-KR4) interfaces and Gigabit Ethernet (SERDES) interfaces to carry business data, and provide external Gigabit Ethernet interfaces to carry management data, etc. Moreover, with the influence of the international situation, domestic chips have begun to gradually replace foreign chips.

[0004] In summary, a computing server based on Feiteng S5000C-32 computing blade is designed. Utility Model Content

[0005] In order to overcome the above-mentioned deficiencies, the utility model provides a computing server based on the Feiteng S5000C-32 computing blade.

[0006] The utility model achieves the above-mentioned purpose through the following technical solutions:

[0007] A computing server based on Feiteng S5000C-32 computing blades includes a processor unit, wherein the processor unit is electrically connected to a BMC health management unit, a 40G network card unit, a front-end gigabit network card unit, a rear-end gigabit network card unit, a display unit, a serial port unit, a USB / SATA interface unit, an IPMB interface unit, a hot-swap unit and a clock unit.

[0008] As a preferred embodiment, the Tengyun S5000C-32 core processor integrates 8 DDR5 memory controllers on the chip, and the 8 DDR5 memory controllers are fixed on the front and back of the core processor by means of board-mounted memory particles. The DDR5 memory particles MT60B2G8HB-56BIT:G are used as the DDR5 memory particles of the board. The DDR5 memory particles MT60B2G8HB-56B IT:G are selected as the DDR5 memory particles of the board. MT60B2G8HB-56B IT:G is a memory particle with a capacity of 16Gbit launched by Changxin. Because a channel requires a total of 8GB of capacity, each channel requires 5 memory particles (including 1pcs ECC particles). The module is designed using the onboard AST2500BMC chip, and the main frequency of AST2500 is 800MHz; it supports 1-way VGA, the display resolution can support up to 1920x1200, the video memory supports up to 512MB DDR4, and supports 2D graphics rendering. With multiple Gigabit Ethernet, I2C, SPI, VGA and other interfaces, the rich interface types can facilitate communication with various functional units of the system and are compatible with various sensors. The chip has been used in the server BMC field for many years, the system application is mature, and the power consumption is low. In order to facilitate users to remotely manage and monitor the universal dense universal control module without the need for users to operate in front of the machine, the AST2500 WEBSERVER management interface can support the KVM OVER IP function.

[0009] Preferably, the BMC health management unit is based on AST2500, the SPI and I2C interfaces of AST2500 are electrically connected to the processor unit, the NSCI interface of AST2500 is electrically connected to the WX1860AL2 network card, AST2500 is electrically connected to the display unit via a VGA, the display unit is a liquid crystal screen, and the BMC health status monitoring and management unit is based on AST2500 of Xinye Technology, which can collect and monitor data such as temperature, voltage, current, CPU unit status, etc., and can also realize remote status monitoring and management.

[0010] Preferably, the 40G network card unit adopts N10G-X8I chip, the front-end Gigabit network card unit adopts WX1860AL2 chip, and the rear-end Gigabit network card unit adopts WX1860AL4 chip. The upstream of WX1860AL4 is electrically connected to ZX-200 through PCIE3.0 X4, and the downstream of WX1860AL4 leads to a four-way Gigabit SERDES interface through the PHY chip YT8531.

[0011] Preferably, the serial port unit includes AT3243EEAI+, and S5000-C is electrically connected to AT3243EEAI+.

[0012] Preferably, the USB / SATA interface unit includes a ZX-200 chip. The module uses the domestic Zhaoxin ZX-200IO expansion chip to provide 6 USB interfaces and 4 SATA interfaces. The chipset is compatible with the PCIe 2.0 technical specification and supports up to 9-channel PCIe 2.0 transmission. At the same time, the chip has built-in SATA and USB controllers, which can support up to 11 USB expansion interfaces, and provide 2 USB 3.1Gen2 (supporting TYPE-C specification), 3 USB 3.1Gen1 and 6 USB 2.0 interfaces for data transmission. Compatible with SATA 3.0 technical specifications, it can support up to 4 SATA interfaces, has good IO expansion characteristics, and has the characteristics of strong versatility, flexible expansion, and low power consumption. It can meet the application needs of various markets and is widely used in desktop / portable terminals, servers, embedded and other market fields. It has 2 USB3.0 interfaces on the front panel and 4 USB2.0 interfaces on the back. There are 2 SATA ports on board, 1 of which is connected to a SATA solid state drive, and 1 is reserved for an MSata connector, which can be used to expand MSata SSD hard drives. There are also 2 SATA3.0 ports on the back.

[0013] Preferably, the IPMB interface unit includes an I2C isolation chip, and the model of the I2C isolation chip is AT9511ADP.

[0014] Preferably, the hot-swap unit includes a hot-swap circuit based on BT9352, and the clock unit includes a clock chip circuit based on GMD5411C clock.

[0015] A computing server based on the Feiteng S5000C-32 computing blade as described above includes a chassis, and the blade is fixed in a guide groove of the chassis through an air-cooled cold plate.

[0016] Preferably, the blade can be quickly plugged in and out via a front panel pull-out aid in the chassis.

[0017] The beneficial effect of the utility model is that the computing server based on Feiteng S5000C-32 computing blade takes the domestic Tengyun S5000C-32 core processor as the core, completes the front-end data comprehensive processing, and provides computing resource support for the realization of tasks management, system management, data fusion, comprehensive detection, comprehensive identification and other functions. The processor can provide interfaces such as PCIE5.0, DDR5, and debug serial port to the outside, which can meet the application scenarios that require high-speed intensive computing such as radar signal processing and data processing, and the module adopts domestically produced chips, which improves the international competitiveness of the product. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The present invention will be described by way of examples with reference to the accompanying drawings, in which:

[0019] Figure 1 It is a principle block diagram of the utility model;

[0020] Figure 2 It is a block diagram of the BMC health management unit of the utility model;

[0021] Figure 3 It is the design block diagram of the IPMB interface of the utility model;

[0022] Figure 4 It is the hot-swap design block diagram of the utility model;

[0023] Figure 5 It is a block diagram of the PCIE clock network of the utility model;

[0024] Figure 6 It is a system reset block diagram of the utility model;

[0025] Figure 7 This is the power-on timing relationship of the S5000C-32 of the utility model. DETAILED DESCRIPTION

[0026] Now the utility model is further described in detail with reference to the accompanying drawings. These drawings are simplified schematic diagrams, which only illustrate the basic structure of the utility model in a schematic manner, and therefore only show the components related to the utility model.

[0027] Definitions of Abbreviations and Key Terms

[0028] BMC: Baseboard Management Controller

[0029] CPLD: Complex Programmable Logic Device Complex Programmable Logic Device

[0030] PCIE: peripheral component interconnect express high-speed serial computer expansion bus standard

[0031] IPMB: Intelligent Platform Management Bus

[0032] like Figure 1 As shown, a computing server based on Feiteng S5000C-32 computing blade includes a processor unit, and the processor unit is electrically connected to a BMC health management unit, a 40G network card unit, a front-end gigabit network card unit, a rear-end gigabit network card unit, a display unit, a serial port unit, a USB / SATA interface unit, an IPMB interface unit, a hot-swap unit and a clock unit.

[0033] The module uses the domestically produced Tengyun S5000C-32 core processor as the core to complete the front-end data comprehensive processing and provide computing resource support for the realization of tasks management, system management, data fusion, comprehensive detection, comprehensive identification and other functions. The processor can provide external interfaces such as PCIE5.0, DDR5, and debug serial port.

[0034] Tengyun S5000C-32 core processor can lead to 2 PCIE X16 and 4 PCIE X1. The CPU's 1 PCIE X1 interface is used to connect to the BMC chip (AST2500) to expand the IPMB interface and display interface. The blade uses AST2500 as the management controller (BMC), which monitors and collects board-level temperature, voltage, current and other signals through sensors, analyzes position identification coding information, is responsible for system power-on and reset monitoring, and cooperates with the CPLD chip EF2L15BG256B to complete the power timing management of the entire board.

[0035] The CPU's PCIE X16 can be split into 2 PCIE X8s, supporting lane flipping. One PCIE X8 is used to connect a 40GbE network control chip to expand 2 40GBase-KR4 Ethernet interfaces; the second PCIE X8 is connected to the VPX connector, and the interface can be expanded through the rear plug-in board. Both PCIE X8 signals can be split into 2 PCIE X4 signals;

[0036] One PCIE X4 signal is connected to the ZX200 IO expansion chip to expand the USB and SATA interfaces. The PCIEX4 Netcom's WX1860AL4 can also be pulled out to expand two 1000GBase-X interfaces and then to the VPX connector.

[0037] One PCIE X8 signal is used to connect to the VPX connector, and the interface can be expanded through the rear board.

[0038] One PCIE X1 signal is used to connect WX1860AL2 and expand the front Gigabit Ethernet interface.

[0039] The slot number signals on the blades are uniformly pulled up, and the valid slot number information needs to be pulled down through the bottom board. The BMC obtains the slot number information through GPIO. The chassis number and cabinet number are sent to the blade through the IPMB interface, and the data is transmitted to the BMC chip after verification.

[0040] The board is equipped with LED indicators and test points for various power supplies or chips. For CPLD or FPGA chips, a JTAG programming interface is reserved to facilitate later debugging and maintenance.

[0041] As an example, the Tengyun S5000C-32 core processor integrates 8 DDR5 memory controllers on the chip, and the 8 DDR5 memory controllers are fixed on the front and back of the core processor by means of board-mounted memory particles. The DDR5 memory particles MT60B2G8HB-56BIT:G are used as the DDR5 memory particles of the board card, and the DDR5 memory particles MT60B2G8HB-56B IT:G are selected as the DDR5 memory particles of the board card. MT60B2G8HB-56B IT:G is a memory particle with a capacity of 16Gbit launched by Changxin. Because a channel requires a total of 8GB capacity, each channel requires 5 memory particles (including 1pcs ECC particles). The module is designed using the onboard AST2500BMC chip, and the main frequency of AST2500 is 800MHz; it supports 1-way VGA, the display resolution can support up to 1920x1200, the video memory supports up to 512MB DDR4, and supports 2D graphics rendering. With multiple Gigabit Ethernet, I2C, SPI, VGA and other interfaces, the rich interface types can facilitate communication with various functional units of the system and are compatible with various sensors. The chip has been used in the server BMC field for many years, the system application is mature, and the power consumption is low. In order to facilitate users to remotely manage and monitor the universal dense universal control module without the need for users to operate in front of the machine, the AST2500 WEBSERVER management interface can support the KVM OVER IP function.

[0042] As an example, Figure 2As shown in the figure, the BMC health management unit is mainly based on AST2500. The SPI and I2C interfaces of AST2500 are electrically connected to the processor unit. The NSCI interface of AST2500 is electrically connected to the WX1860AL2 network card. AST2500 is electrically connected to the display unit through a VGA. The display unit is an LCD screen. The BMC health monitoring and management unit is based on AST2500 of Xinye Technology. It can collect and monitor data such as temperature, voltage, current, CPU unit status, etc., and can also realize remote status monitoring and management. In order to monitor the system temperature, a digital temperature sensor is added to the system, which can monitor the temperature range of -55-+125℃ with an accuracy of ±2℃. The CPU temperature is collected and the information is sent to the BMC unit through I2C. In order to monitor the working status of the system, its own ADC channel is used to monitor the voltage and current status of each gear such as 5V, 3.3V, 2.5V, 1.2V, 1.1V, 1.0 and 12V. The system can read its output data through the I2C interface. If an abnormality occurs, an alarm and reset interrupt signal will be generated. The BMC unit has an NSCI interface, which is connected to the WX1860AL2 network card. Remote customers can monitor and capture the hardware status information of the local blade. At the same time, the BMC unit can also obtain the CPU main frequency, model, number of cores and other working status through I2C and report it to the system.

[0043] As an embodiment, the 40G network card unit adopts the N10G-X8I chip, the front-end gigabit network card unit adopts the WX1860AL2 chip, and the rear-end gigabit network card unit adopts the WX1860AL4 chip. The upstream of WX1860AL4 is electrically connected to ZX-200 through PCIE3.0 X4, and the downstream of WX1860AL4 leads to a four-way gigabit SERDES interface through the PHY chip YT8531.

[0044] The 2-way 40GBase-KR4 Ethernet optical interface design adopts the solution of Muchuang N10G-X8I, which uses reconfigurable processor technology, high security, cost-effective network controller chip, has completely independent intellectual property rights, supports dual-port 40G, 2 / 4 / 8-port 10G interface and 8-port 1G network applications. This chip is mainly used in servers, network security equipment, embedded and other network application fields, and its functions are as follows:

[0045] 1) Realize the function of 40G / 10G domestic universal network card chip;

[0046] 2) It has 40G cryptographic acceleration capability and realizes secure and controllable network card functions;

[0047] 3) It has programmable capabilities to realize intelligent unloading of user network protocols.

[0048] The 1-channel Gigabit Ethernet interface design adopts the WX1860AL2 solution, which supports dual-end Gigabit Ethernet design, has 2 fully integrated Gigabit Ethernet media access control (MAC), physical layer (PHY) modules and 2 RGMII interfaces that can be connected to external PHY. It can be used in PC servers and embedded network devices.

[0049] Key Features:

[0050] 1) Support 2-port 1GbE network interface;

[0051] 2)Support PCIe Gen2x4 host interface;

[0052] 3) Support 1000Base-T / 100Base-T / 10Base-T, RGMII;

[0053] 4) Module with integrated Gigabit MAC and PHY;

[0054] 5) Support network protocol acceleration (TCP / UDP, IP);

[0055] 6) Support 8 virtual machines (SRTOV);

[0056] 7) Support Wake-on-LAN (WoL);

[0057] 8)Support sideband management protocol;

[0058] 9) Support remote network boot protocol (PXE);

[0059] 10)Support flow control;

[0060] 11)Support tunneling protocol;

[0061] 12)Support SM2 / SM3 / SM4 algorithms.

[0062] The later Gigabit Ethernet interface design adopts the solution of WX1860AL4 of Netcom. WX1860AL4 is connected to the PCIE3.0 X4 of ZX-200 upstream, which can output four Gigabit Ethernet (RGMII). By using the PHY chip YT8531 of domestic Yutai Chetong, four Gigabit SERDES interfaces are brought out, which are mainly used for board-level interconnection. At the same time, this solution has the characteristics of low power consumption and easy software adaptation.

[0063] As an embodiment, the serial port unit includes AT3243EEAI+, S5000-C is electrically connected to AT3243EEAI+, and the module uses the corresponding level conversion chip to lead out 1 RS232 functional interface and 1 RS232 debugging interface respectively, which can be realized by using the UART interface of the Feiteng S5000-C chip. S2500 integrates 6 UARTs, 2 of which are 9-line full-function serial ports and 4 are 3-line serial ports. The serial port of Feiteng S5000-C supports a maximum baud rate of 115.2Kbps. The full-function RS232 conversion chip can use the domestic Wuhan Xinjing AT3243EEAI+, which supports 3V to 5.5V power supply, 0.1μA automatic shutdown current, 250kbps baud rate, 3 transmitters / 5 receivers, and an intelligent RS-232 transceiver with enhanced ESD protection.

[0064] As an embodiment, the USB / SATA interface unit includes a ZX-200 chip. The module uses the domestic Zhaoxin ZX-200IO expansion chip to provide 6 USB interfaces and 4 SATA interfaces. The chipset is compatible with the PCIe 2.0 technical specification and supports up to 9-channel PCIe 2.0 transmission. At the same time, the chip has built-in SATA and USB controllers, which can support up to 11 USB expansion interfaces, and provide 2 USB 3.1Gen2 (supporting TYPE-C specification), 3 USB 3.1Gen1 and 6 USB 2.0 interfaces for data transmission. Compatible with SATA 3.0 technical specifications, it can support up to 4 SATA interfaces, has good IO expansion characteristics, and has the characteristics of strong versatility, flexible expansion, low power consumption, etc. It can meet the application needs of various markets and is widely used in desktop / portable terminals, servers, embedded and other market fields. The front panel has 2 USB3.0 interfaces and the rear has 4 USB2.0 interfaces. There are 2 SATA ports on board, 1 of which is connected to a SATA solid state drive, and 1 is reserved for an MSata connector, which can be used to expand MSata SSD hard drives. There are also 2 SATA3.0 ports on the back.

[0065] As an example, Figure 3 As shown in the figure, the IPMB interface unit includes an I2C isolation chip, and the model of the I2C isolation chip is AT9511ADP. The sensors on the module monitor the temperature, voltage, fan working status, power supply and other information of each core component in real time. The BMC chip AST2500 obtains the data on the sensor, encapsulates it with the standard IPMI protocol, and sends it to the intelligent platform management bus through the I2C protocol of the physical layer. The I2C isolation chip is implemented using the domestic Wuhan Xinjing AT9511ADP.

[0066] As an example, Figure 4As shown, the hot-swap unit includes a hot-swap circuit based on BT9352, and the clock unit includes a clock chip circuit based on GMD5411C clock. The hot-swap unit is implemented using domestic BT9352, and the slow start time is set at about 2ms, which can suppress the surge current when the blade is powered on.

[0067] The BT9352 uses an external N-channel MOSFET to produce a nearly ideal diode. It replaces a high-power Schottky diode and the associated heat sink, saving power and board area. The ideal diode function enables low-loss power retention applications. Fast turn-on reduces the load voltage drop during power switching. If the input power fails or is shorted, the fast turn-off function minimizes reverse current. The controller can be powered from a 2.9V to 18V supply. When low voltage, an external power supply is required. In undervoltage or overvoltage conditions, the power path is disabled. The controller also has an open MOSFET detection circuit that will issue an indication signal if the voltage drop across the transmission MOSFET is too large in the on state.

[0068] The clock chip uses Chengdu Zhenxin GMD5411C clock buffer. GMD5411C has 10 LVPECL, CML, HCSL, LVDS and LVCMOS level clock outputs, which fully meet the needs of blade use.

[0069] The following table lists the main clock sources required in the general control module. The clock sources in the table can be divided into two different types of clock sources. The first type is the CORE clock and the DDR clock. The clocks they output are mainly used for processor core logic operations and DDR work.

[0070] The second category is the clocks of high-speed interfaces such as PCIE and SGMII. The clocks they output are mainly to provide low-frequency reference clocks for various high-speed interface blades.

[0071] Table 1 High-performance intensive general control module

[0072]

[0073]

[0074] The clock signal is crucial to the general control module, so most of the clocks required on the chip use differential clock inputs to obtain clock signals with stronger noise resistance and higher signal integrity.

[0075] The reference of Tengyun S5000C-32 core mainly includes 50M reference clock and 33M LPC clock. The 25MHz clock is the reference clock of Gigabit Ethernet PHY, which is realized by two 25MHz crystal oscillators. The PCIE channel related clock is realized by clock buffer, which can ensure the homology of PCIE reference clock. A 100MHz differential clock source is input to the clock buffer. The clock buffer chip uses Aola AU5411, and then generates PCIE reference clock and distributes it to various PCIE devices. GMD4511C supports 4 clock inputs and 10 clock outputs.

[0076] The PCIE clock topology of this module is as follows Figure 5 shown.

[0077] The following table lists the timing requirements of the reset signal for each device and the actual situation of the device.

[0078] Table 2 Time requirements of reset signals for each device

[0079]

[0080] The reset topology diagram of this module is as follows Figure 6 shown.

[0081] System reset can be triggered in two ways, one is the whole machine reset signal, and the other is the CPLD logic soft reset; when the BMC receives any of the reset triggers, it will send the PWR_BTN# signal to the CPLD. After the CPLD receives the PWR_BTN# signal, it sends a reset signal to the CPU. After the CPU internal reset is completed, it will reply to the CPLD with a Reset# signal. Finally, the CPLD is triggered by this signal to reset all peripheral devices. PCIE device reset is also performed by CPLD acquisition system reset, and the reset duration and timing are controllable.

[0082] like Figure 7 As shown, the module is based on the domestic Tengyun S5000C-32 core processor. The blade is provided with 12V and 3.3V power through the backplane by the chassis power blade, which is input into the blade from the P0 port of the blade VPX connector and is close to the regulator to ensure clean power supply.

[0083] Among them, VDD is the core voltage of 0.84V; GPIO_VDDH and AVDDNET are GPIO voltages of 1.8V; VDDQ is the DDR5 voltage; VDDA and AVDDH voltages are 0.8V and 1.8V respectively; VP and VPH voltages are 0.9V and 1.8V respectively; POR_N is the reset signal after the CPU is powered on.

[0084] In addition to the key Feiteng processor core unit, the general control module also includes a variety of peripheral interface chips such as graphics cards, IO expansion chips, Ethernet, etc., which require multiple voltage levels. The general control module as a whole is powered on in sequence by each power supply. After the processor is reset, each interface chip is reset to complete the initialization.

[0085] A computing server based on the Feiteng S5000C-32 computing blade as described above includes a chassis, and the blade is fixed in a guide groove of the chassis through an air-cooled cold plate.

[0086] As an embodiment, the blade realizes the function of quick plugging and unplugging of the blade through the front panel puller in the chassis.

[0087] The above is based on the enlightenment of this utility model. Through the above description, relevant staff can make various changes and modifications without deviating from the technical idea of ​​this utility model. The technical scope of this utility model is not limited to the content in the specification, and its technical scope must be determined according to the scope of the claims.

Claims

1. A computing server based on Feiteng S5000C-32 computing blade, characterized in that: It includes a processor unit, which is electrically connected to a BMC health management unit, a 40G network card unit, a front-end gigabit network card unit, a rear-end gigabit network card unit, a display unit, a serial port unit, a USB / SATA interface unit, an IPMB interface unit, a hot-swap unit and a clock unit.

2. The computing server based on the Feiteng S5000C-32 computing blade according to claim 1 is characterized in that: The processor unit includes a Tengyun S5000C-32 core processor, which integrates 8 DDR5 memory controllers on-chip. The 8 DDR5 memory controllers are fixed on the front and back of the core processor by means of board-mounted memory particles. The DDR5 memory particles MT60B2G8HB-56B IT:G are used as the DDR5 memory particles of the board.

3. The computing server based on the Feiteng S5000C-32 computing blade according to claim 1 is characterized in that: The BMC health management unit is mainly based on AST2500, the SPI and I2C interfaces of AST2500 are electrically connected to the processor unit, the NSCI interface of AST2500 is electrically connected to the WX1860AL2 network card, and AST2500 is electrically connected to the display unit through a VGA, and the display unit is a liquid crystal screen.

4. The computing server based on the Feiteng S5000C-32 computing blade according to claim 1 is characterized in that: The 40G network card unit adopts the N10G-X8I chip, the front-end gigabit network card unit adopts the WX1860AL2 chip, and the rear-end gigabit network card unit adopts the WX1860AL4 chip. The upstream of WX1860AL4 is electrically connected to ZX-200 through PCIE3.0 X4, and the downstream of WX1860AL4 leads to a four-way gigabit SERDES interface through the PHY chip YT8531.

5. The computing server based on the Feiteng S5000C-32 computing blade according to claim 1 is characterized in that: The serial port unit includes AT3243EEAI+, and S5000-C is electrically connected to AT3243EEAI+.

6. The computing server based on the Feiteng S5000C-32 computing blade according to claim 1 is characterized in that: The USB / SATA interface unit includes a ZX-200 chip.

7. The computing server based on the Feiteng S5000C-32 computing blade according to claim 1 is characterized in that: The IPMB interface unit includes an I2C isolation chip, and the model of the I2C isolation chip is AT9511ADP.

8. The computing server based on the Feiteng S5000C-32 computing blade according to claim 1 is characterized in that: The hot-swap unit includes a hot-swap circuit based on BT9352, and the clock unit includes a clock chip circuit based on GMD5411C clock.

9. The computing server based on the Feiteng S5000C-32 computing blade according to any one of claims 1 to 8, characterized in that: The utility model comprises a chassis, wherein the blade is fixed in a guide groove of the chassis through an air-cooled cold plate.

10. The computing server based on the Feiteng S5000C-32 computing blade according to claim 9, characterized in that: The blade can be quickly plugged in and out through the front panel pull-out aid in the chassis.

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