Chip packaging structure of composite through hole adapter plate

Abstract

The utility model discloses a chip packaging structure of a composite through hole adapter plate, and belongs to the technical field of semiconductor packaging. The metal rewiring layer III (430) comprises a silicon through hole pinboard monomer (10) and a low-density plastic package through hole (310) which form a composite through hole pinboard, and the metal rewiring layer II (420) is in telecommunication connection with the metal rewiring layer III (430) through a high-density silicon through hole (110) and the low-density plastic package through hole (310) respectively; the high-density pin chip (61) is packaged above the high-density silicon through hole (110), and the low-density pin chip I (63) and / or the low-density pin chip II (65) are / is packaged above the low-density plastic package through hole (310) and are / is fixedly connected with the metal rewiring layer III (430) in a telecommunication mode. The structure integrates the low-density pin chip and the high-density pin chip at the same time, and has good compatibility.

Description

Technical Field

[0001] The utility model relates to a chip packaging structure of a composite through-hole adapter plate, belonging to the technical field of semiconductor packaging. Background Art

[0002] At present, in 2.5D / 3D packaging structures, in order to achieve multi-chip, small size and high integration packaging, TSV Interposer is often used to stack packaging in the vertical direction. Patent CN105428260 discloses a fan-out 2.5D / 3D packaging structure based on a carrier, such as Figure 1 As shown. In the stacked structure, the interconnection length between chips is shortened, the parasitic capacitance and inductance associated with the interconnection are reduced, and thus the signal transmission delay is shortened. The current TSV Interposer size is getting larger and larger. Because the TSV Interposer is equipped with EMC (encapsulation material) on the upper side, the stress between the upper and lower sides is uneven, and the warping defects at both ends of the stacked packaging structure are getting larger and larger, which is difficult to control. In addition, due to the use of a temporary bonding solution, the TSV thickness cannot be made very thin during CMP (chemical mechanical polishing technology). If it is too thin, it will cause fragmentation or mechanical damage due to uneven stress, so the thickness of the Interposer is still maintained at about 100 microns.

[0003] The existing 2.5D Interposer package does not integrate passive components such as IPD, because the cost of integrating low-density pin chips such as IPD passive components in 2.5D Interposer is too high (generally speaking, low-density pin chips use conventional Pillar / Solder bumps of about 100um pitch, and can even be implanted if space permits). The existing SiP process (which can integrate passive components such as IPD) is based on substrate process, but the existing SiP cannot integrate high-density pin chips due to process capability limitations (generally speaking, high-density pin chips use ubumps (microbumps) of about 40 umpitch). Summary of the invention

[0004] In order to overcome the shortcomings of the existing methods, the utility model provides a chip packaging structure of an ultra-thin composite through-hole adapter plate, which integrates a low-density pin chip and a high-density pin chip at the same time.

[0005] The technical solution of the utility model is as follows:

[0006] The utility model discloses a chip packaging structure of a composite through-hole adapter plate, which comprises a through-silicon via adapter plate monomer, wherein the through-silicon via adapter plate monomer is provided with high-density through-silicon vias.

[0007] The back side of the through silicon via adapter plate monomer exposes the end face of the high-density through silicon via and is provided with UBMI, the front side of the through silicon via adapter plate monomer exposes the other end face of the high-density through silicon via and is provided with UBMII, the UBMI and UBMII are provided at both ends of the high-density through silicon via, and the UBMII is connected to the UBMI telecommunication through the high-density through silicon via;

[0008] It also includes low-density plastic-sealed through holes, a plurality of high-density pin chips, a plurality of low-density pin chips I and / or low-density pin chips II and BGA solder balls, and the silicon through hole adapter board monomer is plastic-sealed with a plastic-sealing material to form a plastic-sealing layer.

[0009] The low-density plastic-sealed through hole is arranged in the plastic-sealed layer beside the through silicon via adapter plate monomer and penetrates the plastic-sealed layer up and down. The low-density plastic-sealed through hole, the through silicon via adapter plate monomer and the plastic-sealed layer form a composite through-hole adapter plate;

[0010] A metal rewiring layer II is arranged on the UBMI side of the composite through-hole adapter, and a metal rewiring layer III is arranged on the UBMII side, wherein the metal rewiring layer II is electrically connected to the metal rewiring layer III through high-density silicon through vias and low-density plastic-encapsulated through vias;

[0011] The high-density pin chip is packaged above the high-density silicon through-hole, the low-density pin chip I and / or the low-density pin chip II are packaged above the low-density plastic-sealed through-hole, and the high-density pin chip and the low-density pin chip I and / or the low-density pin chip II are fixedly connected to the metal redistribution layer III and are electrically connected;

[0012] Also includes an encapsulation layer, wherein the encapsulation layer encapsulates all high-density pin chips and low-density pin chip I and / or low-density pin chip II;

[0013] The BGA solder ball is disposed below the metal redistribution layer II and is electrically connected thereto.

[0014] According to some embodiments of the present invention, the cross-section of the UBMI and UBMII is circular, elliptical, rectangular or hexagonal.

[0015] According to some embodiments of the present invention, the diameter or side length of the UBMI and UBMII is greater than the diameter of the high-density through silicon via.

[0016] According to some embodiments of the present invention, the diameter of the low-density plastic-encapsulated through-hole is larger than the diameter of the high-density silicon-through-hole.

[0017] According to some embodiments of the present invention, the metal rewiring layer III is a multi-layer rewiring metal.

[0018] According to some embodiments of the present invention, the high-density pin chip is an advanced process chip, which is fixedly connected to the metal redistribution layer III through solder balls.

[0019] According to some embodiments of the present invention, the low-density pin chip I is an IPD passive component, which is fixedly connected to the metal redistribution layer III by solder.

[0020] According to some embodiments of the present invention, the low-density pin chip II is a conventional process chip, which is fixedly connected to the metal redistribution layer III through solder balls.

[0021] According to some embodiments of the present invention, a filling layer is further included, and the filling layer is arranged between the high-density pin chip and the low-density pin chip I and / or the low-density pin chip II and the metal redistribution layer III.

[0022] According to some embodiments of the utility model, a heat sink and a substrate are also included. The chip packaging structure of the composite through-hole adapter board is fixedly connected to the substrate through BGA solder balls. The heat sink is cavity-type, and the chip packaging structure of the composite through-hole adapter board is inverted on the substrate. The edge of the heat sink is fixedly connected to the substrate through an adhesive, and the exposed back sides of the high-density pin chip and the low-density pin chip I of the chip packaging structure of the composite through-hole adapter board are bonded to the heat sink through TIM.

[0023] Beneficial Effects

[0024] The utility model proposes a chip packaging structure of a composite through-hole adapter plate, which uses a wafer-level process with plastic packaging materials, bottom fillers, etc. as support, and a grinding process can make the thickness of the silicon through-hole adapter plate monomer very thin, thereby obtaining higher performance and smaller loss;

[0025] UBMI and UBMII are set at the upper and lower ends of the high-density silicon via, which can easily lead out the metal copper in the high-density silicon via, simplify the packaging process, and at the same time, balance the stress between the packaging structures;

[0026] A wafer-level process is used to set a low-density plastic-sealed through hole on the side of the silicon via adapter plate monomer to form a composite through-hole adapter plate, and then a fan-out process is used to combine it into a new carrier. The high-density pin chip and the low-density pin chip I and / or the low-density pin chip II can be integrated and packaged on the new carrier (including Interposer) at the same time. The high-density pin chip is interconnected using the silicon via adapter plate monomer; the low-density pin chip I and / or the low-density pin chip II are interconnected using low-density plastic-sealed through holes (Through Molding Via, plastic-sealed glue through holes), and they are assembled into a whole with better compatibility. The chip packaging structure of the composite through-hole adapter plate formed by this forming process has a smaller overall packaging area than the SiP based on the substrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 It is a schematic diagram of an existing TSV Interposer;

[0028] Figures 2 to 5 This is a schematic diagram of an embodiment of a chip packaging structure of a composite through-hole adapter plate of the utility model;

[0029] In the figure: Through Silicon Via adapter board monomer 10

[0030] High-density through silicon via 110

[0031] UBMI130

[0032] UBMII150

[0033] Low density plastic encapsulated through hole 310

[0034] Metal redistribution layer II420

[0035] Metal redistribution layer III430

[0036] High-density pin chip 61

[0037] Low-density pin chip I63

[0038] Low density pin chip II65

[0039] Encapsulation layer 700

[0040] BGA solder ball 800

[0041] Substrate 900

[0042] Heat sink 910

[0043] TIM 911

[0044] Adhesive 921. DETAILED DESCRIPTION

[0045] The present application will be further described in detail below in conjunction with the accompanying drawings and embodiments. It will be appreciated that the specific embodiments described herein are only used to explain the relevant inventions, rather than to limit the inventions. It should also be noted that, for ease of description, only portions related to the relevant inventions are shown in the accompanying drawings. It should be noted that, in the absence of conflict, the embodiments in the present application and the features in the embodiments may be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in conjunction with the embodiments.

[0046] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and understandable, the specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0047] The present invention provides a chip packaging structure of a composite through-hole adapter plate, such as Figures 2 to 4 As shown. It includes a through silicon via adapter plate monomer 10, a low-density plastic-sealed through hole 310, a plurality of high-density pin chips 61, a plurality of low-density pin chips I63 and / or low-density pin chips II65 and a BGA solder ball 800 (BGA is Ball Grid Array, full name: ball grid array structure), and the through silicon via adapter plate monomer 10 includes UBMI130, high-density through silicon via 110 and UBMII150 (UBM is Under Bump Metallization, full name: under-bump metallization micro-bump structure) from bottom to top. The through silicon via adapter plate monomer 10 is manufactured by wafer-level technology, and the high-density through silicon vias 110 are distributed in a 6-inch to 12-inch silicon wafer and arranged in an array, and the diameter of the through silicon via (TSV) is 1 micron to 10 microns. The number of high-density through silicon vias 110 is determined according to actual needs. A passivation layer and a seed layer (the passivation layer and the seed layer are not shown in the figure) are sequentially deposited on the inner surface of the high-density silicon via 110, and then electroplated with metal, preferably copper. The passivation layer is silicon oxide or silicon nitride, or the passivation layer is formed by thermal oxidation, and the thickness of the passivation layer ranges from 10 nanometers to 1 micron. The seed layer is made on the insulating layer by physical sputtering, magnetron sputtering or evaporation process, and the thickness of the seed layer ranges from 1 nanometer to 1 micron. It can be a single layer or multiple layers. The metal material of the seed layer can be one or a combination of titanium, copper, aluminum, silver, palladium, gold, thallium, tin, nickel, etc.

[0048] The back of the through silicon via adapter plate monomer 10 is thinned to expose the lower end of the high-density through silicon via 110, and UBMI130 is set at the lower end of the high-density through silicon via 110. The back of the through silicon via adapter plate monomer 10 is thinned to expose the upper end of the high-density through silicon via 110, and UBMII150 is set. UBMII150 is connected to UBMI130 through the high-density through silicon via 110. The cross-sections of UBMI130 and UBMII150 are circular, elliptical, rectangular or hexagonal. The diameter or side length of UBMI130 and UBMII150 is larger than the diameter of the high-density through silicon via 110, which can easily lead out the metal copper in the high-density through silicon via 110, simplify the process, and at the same time, balance the stress between the packaging structures.

[0049] The upper and lower parts of the TSV adapter plate monomer 10 are ground and thinned by CMP (Chemical Mechanical Planarization) process, so that the thickness of the TSV adapter plate monomer 10 is 50±5 microns, wherein the thickness of the high-density TSV 110 is 20±3 microns, thereby obtaining higher performance and lower loss. The TSV adapter plate monomer 10 is encapsulated with a plastic encapsulation material to form a plastic encapsulation layer 300.

[0050] The low-density plastic-encapsulated through hole 310 is arranged in the plastic-encapsulated layer 300 beside the through-silicon via adapter plate monomer 10, and penetrates the plastic-encapsulated layer 300 up and down. A metal seed layer (the metal seed layer is not shown in the figure) is deposited in the low-density plastic-encapsulated through hole 310, and then electroplated with metal, preferably copper. The metal material of the metal seed layer can be one or a combination of titanium, copper, aluminum, silver, palladium, gold, thallium, tin, nickel, etc.

[0051] The low-density plastic-encapsulated through-hole 310, the silicon via adapter plate monomer 10, and the plastic-encapsulated layer 300 form a composite through-hole adapter plate; the diameter of the low-density plastic-encapsulated through-hole 310 is larger than the diameter of the high-density silicon via 110, and is close to the diameter or side length of the UBMI 130 and the UBMII 150. The low-density plastic-encapsulated through-hole 310 is arranged in an array, and the number thereof is determined according to actual needs.

[0052] The embodiment of the utility model uses a wafer-level fan-out process to form a new carrier, on which a high-density pin chip and a low-density pin chip I63 and / or a low-density pin chip II65 can be integrated simultaneously.

[0053] The chip packaging structure of a composite through-hole adapter board in the embodiment of the utility model is specifically as follows:

[0054] The metal rewiring layer II420 is set by a rewiring process on the UBMI130 side of the composite through-hole adapter, and the metal rewiring layer III430 is set by a rewiring process on the UBMII150 side. The metal rewiring layer II420 and the metal rewiring layer III430 can be multi-layer rewiring metals, and the bottom layer and the top layer thereof are both provided with output pads (not shown in the figure) to fully coordinate the telecommunication connection relationship between the high-density pin chip 61 and the low-density pin chip I63 and / or the low-density pin chip II65.

[0055] The metal rewiring layer II 420 is electrically connected to the metal rewiring layer III 430 through high-density through silicon vias 110 and low-density plastic vias 310 .

[0056] The high-density pin chip 61 is an advanced process chip, such as a high-end chip such as a CPU, GPU, and Memory, which is packaged above the high-density silicon through-hole 110 and mounted to the metal rewiring layer III 430 through a FC (Flip chip, full name: flip chip) flip chip process, and is fixedly connected to the metal rewiring layer III 430 through solder balls and telecommunication connections. The high-density pin chip 61 can be a plurality of chips with different functions. Two high-density pin chips 61 are shown in the figure.

[0057] In an exemplary embodiment, as shown in FIG. 2 , the low-density pin chip I63 is a conventional process chip, which is packaged above the low-density plastic package through hole 310 , and the low-density pin chip I63 is mounted to the metal redistribution layer III430 through the FC flip-chip process.

[0058] In the exemplary embodiment, as shown in FIG. 3 , the low-density pin chip II65 is an IPD passive component, which is packaged above the low-density plastic package through hole 310. The low-density pin chip II65 is mounted on the metal rewiring layer III430 through the SMT (Surface Mount Technology, full name: surface assembly technology) mounting process, and is fixedly connected to the metal rewiring layer III430 through solder and telecommunication connection. This structure can integrate passive components such as IPD, can be assembled to form a system, and has better compatibility.

[0059] In an exemplary embodiment, as shown in FIG. 4 , low-density pin chip I63 and low-density pin chip II65 may include both IPD passive components and conventional process chips to enrich the functionality of the packaging structure. At the same time, this structure has a smaller overall packaging area than a substrate-based SiP.

[0060] The filling material is disposed between the high-density pin chip 61 , the low-density pin chip I 63 and / or the low-density pin chip II 65 and the metal redistribution layer III 430 to form a filling layer 601 .

[0061] Above the metal rewiring layer III430, all high-density pin chips 61, low-density pin chips I63 and / or low-density pin chips II65 are encapsulated with encapsulation material to form an encapsulation layer 700. The encapsulation layer 700 is ground and thinned to expose the top of the high-density pin chip 61, so as to facilitate heat dissipation during the operation of the high-density pin chip 61. Experiments have shown that the distribution amount of the encapsulation material of the encapsulation layer 700 is balanced with the distribution amount of the plastic encapsulation material of the plastic-encapsulated composite through-hole adapter, which effectively balances the internal stress of the packaging structure and overcomes the warping of the packaging structure.

[0062] The BGA solder ball 800 is disposed below the metal rewiring layer II 420 and is connected to the metal rewiring layer II 420. The BGA solder ball 800 is used to connect to a substrate 900 such as a PCB board and to be underfilled with a filler, such as Figure 5 As shown, a cavity-type heat sink 910 is used to invert the chip packaging structure of the composite through-hole adapter board, and the edge of the heat sink 910 is fixedly connected to the substrate 900 by an adhesive 921. The exposed back surfaces of the high-density pin chip 61 and the low-density pin chip I63 of the chip packaging structure of the composite through-hole adapter board are bonded to the heat sink 910 by TIM (Thermal Interface Materials, full name: thermal interface materials) 911. The heat emitted by the high-density pin chip 61 and the low-density pin chip I63 during operation is transferred to the heat sink 910 through TIM911 for heat dissipation, so as to further improve the performance of the chip packaging structure of the composite through-hole adapter board.

[0063] The above is only a preferred specific implementation of the utility model, but the protection scope of the utility model is not limited thereto. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed in the embodiment of the utility model should be included in the protection scope of the utility model. Therefore, the protection scope of the utility model should be based on the protection scope of the claims.

Claims

1. A chip packaging structure of a composite through-hole adapter plate, comprising a through-silicon via adapter plate monomer (10), characterized in that: The through silicon via adapter plate monomer (10) is provided with high-density through silicon vias (110). The back side of the through silicon via adapter plate monomer (10) exposes the end face of the high-density through silicon via (110) and is provided with a UBMI (130), the front side of the through silicon via adapter plate monomer (10) exposes the other end face of the high-density through silicon via (110) and is provided with a UBMII (150), and the UBMII (150) is connected to the UBMI (130) via the high-density through silicon via (110); It also includes a low-density plastic-sealed through hole (310), a plurality of high-density pin chips (61), a plurality of low-density pin chips I (63) and / or low-density pin chips II (65) and a BGA solder ball (800). The silicon through via adapter plate unit (10) is encapsulated with a plastic encapsulation material to form a plastic encapsulation layer (300). The low-density plastic-sealed through hole (310) is arranged in the plastic-sealed layer (300) beside the through-silicon via adapter plate monomer (10) and penetrates the plastic-sealed layer (300) from top to bottom; the through-silicon via adapter plate monomer (10), the low-density plastic-sealed through hole (310) and the plastic-sealed layer (300) form a composite through-hole adapter plate; A metal rewiring layer II (420) is arranged on the UBMI (130) side of the composite through-hole adapter plate, and a metal rewiring layer III (430) is arranged on the UBMII (150) side, wherein the metal rewiring layer II (420) is electrically connected to the metal rewiring layer III (430) via a high-density silicon through-hole via (110) and a low-density plastic-encapsulated through-hole via (310); The high-density pin chip (61) is packaged above the high-density silicon through-hole (110), the low-density pin chip I (63) and / or the low-density pin chip II (65) are packaged above the low-density plastic-sealed through-hole (310), the high-density pin chip (61) is fixedly connected to the metal rewiring layer III (430) and is electrically connected, and the low-density pin chip I (63) and / or the low-density pin chip II (65) is fixedly connected to the metal rewiring layer III (430) and is electrically connected; It also includes an encapsulation layer (700), wherein the encapsulation layer (700) encapsulates all high-density pin chips (61), low-density pin chips I (63) and / or low-density pin chips II (65); The BGA solder ball (800) is disposed below the metal redistribution layer II (420) and is electrically connected thereto.

2. The chip packaging structure of the composite through-hole adapter plate according to claim 1, characterized in that: The cross-section of the UBMI (130) and the UBMII (150) is circular, elliptical, rectangular or hexagonal.

3. The chip packaging structure of the composite through-hole adapter plate according to claim 2, characterized in that: The diameter or side length of the UBMI (130) and the UBMII (150) is greater than the diameter of the high-density through silicon via (110).

4. The chip packaging structure of the composite through-hole adapter plate according to claim 1, characterized in that: The diameter of the low-density plastic-encapsulated through hole (310) is greater than the diameter of the high-density silicon through hole (110).

5. The chip packaging structure of the composite through-hole adapter plate according to claim 1, characterized in that: The metal rewiring layer III (430) is a multi-layer rewiring metal.

6. The chip packaging structure of the composite through-hole adapter plate according to claim 1, characterized in that: The high-density pin chip (61) is an advanced process chip, which is fixedly connected to the metal redistribution layer III (430) via solder balls.

7. The chip packaging structure of the composite through-hole adapter plate according to claim 1, characterized in that: The low-density pin chip I (63) is an IPD passive component, which is fixedly connected to the metal redistribution layer III (430) through solder.

8. The chip packaging structure of the composite through-hole adapter plate according to claim 1, characterized in that: The low-density pin chip II (65) is a conventional process chip, which is fixedly connected to the metal redistribution layer III (430) through solder balls.

9. The chip packaging structure of the composite through-hole adapter plate according to any one of claims 1 to 8, characterized in that: It also includes a filling layer (601), which is arranged between the high-density pin chip (61), the low-density pin chip I (63) and / or the low-density pin chip II (65) and the metal redistribution layer III (430).

10. The chip packaging structure of the composite through-hole adapter plate according to claim 9, characterized in that: The invention also comprises a heat sink (910) and a substrate (900); the chip packaging structure of the composite through-hole adapter board is fixedly connected to the substrate (900) via a BGA solder ball (800); the heat sink (910) is of a cavity type, and the chip packaging structure of the composite through-hole adapter board is reversely buckled on the substrate (900); the edge of the heat sink (910) is fixedly connected to the substrate (900) via an adhesive (921); and the exposed back surfaces of the high-density pin chip (61) and the low-density pin chip I (63) of the chip packaging structure of the composite through-hole adapter board are bonded to the heat sink (910) via a TIM (911).

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