Novel planarization clamp voltage surge suppression circuit and integrated circuit chip

Abstract

The utility model discloses a novel planarization clamp voltage surge suppression circuit and an integrated circuit chip, the circuit is connected in parallel with two ends of a protected device, and the circuit comprises a plurality of voltage stabilizing diodes connected in series, a power MOS tube and a resistor; the drain electrode of the power MOS tube is connected with the cathode of the voltage stabilizing diode and serves as the power supply end of the surge suppression circuit, the grid electrode of the power MOS tube is connected with the anode of the voltage stabilizing diode and the first end of the resistor, and the source electrode of the power MOS tube is connected with the second end of the resistor and serves as the grounding end of the surge suppression circuit. According to the utility model, the surge suppression voltage can be kept flat and does not change along with the surge current and temperature, so that a proper voltage-withstanding device can be selected more easily during system design.

Description

Technical Field

[0001] The utility model relates to the technical field of integrated circuits, in particular to a novel flattening clamping voltage surge suppression circuit and an integrated circuit chip. Background Art

[0002] Surge suppressors are widely used in power management and automation equipment. In electronic devices, external factors such as lightning strikes, power switching, load fluctuations, etc. may cause spike currents or voltages. These spike currents or voltages are called surge currents or surge voltages. They pose a serious threat to electronic devices and can cause direct damage. Surge suppressors can absorb surge currents in a very short time, thereby protecting electronic devices from damage.

[0003] Traditional TVS (Transient Voltage Suppressor) is usually used in electronic devices to suppress damage to equipment caused by surge current. Its basic working principle is: the reverse breakdown voltage of TVS is lower than the working voltage of the protected device. When the device is working normally, TVS is in a high-resistance state and does not affect the normal operation of the system; when the reverse end of TVS detects that the system voltage exceeds its breakdown voltage, the impedance of TVS decreases rapidly, and the excess surge current passes through the TVS device, thereby keeping the system voltage below the maximum voltage of the protected device.

[0004] When used for surge suppression, the clamping voltage of traditional TVS will increase with the increase of surge current due to its own device characteristics, and the clamping overcurrent capacity will also decrease as the temperature of the chip increases. Under normal conditions, the requirement for TVS in system applications is that the clamping voltage (Vclamp) needs to be less than the maximum withstand voltage (Vmax) of the protected device and greater than the normal operating voltage (Vmax) of the system. When the TVS device is suppressing surge current, the clamping voltage (Vclamp) will increase, which requires the normal operating voltage (Vmax) of the protected device to be larger, and thus the withstand voltage requirements of the device in the system design are higher, increasing the design difficulty and cost.

[0005] To sum up, when traditional TVS is used for surge suppression, its clamping voltage will increase, which in turn increases the withstand voltage requirements of other components in the system. This is a technical problem that needs to be solved urgently. Utility Model Content

[0006] In order to solve the above problems, the utility model proposes a novel flattening clamping voltage surge suppression circuit, which can keep the surge suppression voltage flat and will not change with the surge current size and temperature, so that it is easier to select suitable voltage-resistant components when designing the system.

[0007] The utility model achieves the above-mentioned purpose through the following technical solutions:

[0008] According to the first aspect, the utility model proposes a novel flattening clamping voltage surge suppression circuit, which is connected in parallel at both ends of the protected device, including: a plurality of voltage-stabilizing diodes, a power MOS tube and a resistor connected in series; the drain of the power MOS tube is connected to the cathode of the voltage-stabilizing diode and serves as the power supply end of the surge suppression circuit, the gate of the power MOS tube is connected to the anode of the voltage-stabilizing diode and the first end of the resistor, and the source of the power MOS tube is connected to the second end of the resistor and serves as the ground end of the surge suppression circuit.

[0009] Furthermore, among the plurality of zener diodes connected in series, the bias states of all the zener diodes are the same, and when a forward voltage is applied to the power supply end, all the zener diodes are in a reverse bias state.

[0010] Furthermore, the plurality of voltage-stabilizing diodes are all Zener diodes.

[0011] Furthermore, the power MOS tube is an N-channel power MOS tube.

[0012] According to a first aspect, the utility model provides an integrated circuit chip, comprising a novel flattening clamping voltage surge suppression circuit as described in the first aspect above.

[0013] The beneficial effects of the utility model are:

[0014] (1) The utility model can flexibly select the surge clamping voltage by selecting Zener diodes with different breakdown voltages and increasing or decreasing the number of Zener diodes; the original device involved in the embodiment of the utility model can be produced using the traditional BCD (Bipolar-CMOS-DMOS) process and can be integrated with a conventional silicon-based chip;

[0015] (2) Due to the strong overcurrent capability of the power MOS tube, the clamping voltage does not change significantly with the surge current, and the clamping voltage is flatter. Through the embodiments of the utility model, the clamping voltage or the withstand voltage of the protected device can be selected more flexibly during system design, and the appropriate withstand voltage device can be selected more easily. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 It is a schematic diagram of the principle of an embodiment of the utility model;

[0017] Figure 2 It is a schematic diagram comparing the surge suppression voltage using the traditional TVC tube and the solution of the utility model. DETAILED DESCRIPTION

[0018] In order to make the purpose, technical scheme and advantages of the embodiments of the present invention clearer, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings here can be arranged and designed in various different configurations.

[0019] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the present invention to be protected, but merely represents selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0020] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.

[0021] In the description of the present utility model, it should be understood that the terms "upper", "lower", "inside", "outside", "left", "right", etc. indicate directions or positional relationships based on the directions or positional relationships shown in the accompanying drawings, or are directions or positional relationships in which the utility model product is usually placed when in use, or are directions or positional relationships that are usually understood by those skilled in the art. These directions or positional relationships are only for the convenience of describing the present utility model and simplifying the description, and do not indicate or imply that the device or component referred to must have a specific direction, be constructed and operated in a specific direction, and therefore should not be understood as a limitation on the present utility model.

[0022] Furthermore, the terms “first”, “second”, etc. are merely used for distinguishing descriptions and should not be understood as indicating or implying relative importance.

[0023] In the description of the present invention, it is also necessary to explain that, unless otherwise clearly specified and limited, the terms such as "setting" and "connection" should be understood in a broad sense. For example, "connection" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or an indirect connection through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0024] The specific implementation of the utility model is described in detail below in conjunction with the accompanying drawings.

[0025] like Figure 1As shown, the utility model proposes a novel embodiment of a flattened clamping voltage surge suppression circuit 100. In a specific implementation, the surge suppression circuit 100 is connected in parallel to both ends of the protected device 200, and specifically includes: a plurality of voltage regulator diodes (D1, D2, ..., DN) connected in series, a power MOS tube M1 and a resistor R1. The drain of the power MOS tube M1 is connected to the cathode of the voltage regulator diode DN and serves as the power supply terminal Vdd of the surge suppression circuit 100, the gate of the power MOS tube M1 is connected to the anode of the voltage regulator diode D1 and the first end of the resistor R1, and the source of the power MOS tube M1 is connected to the second end of the resistor R1 and serves as the ground terminal GND of the surge suppression circuit.

[0026] Furthermore, among the multiple series-connected Zener diodes (D1, D2, ..., DN), the bias states of all the Zener diodes (D1, D2, ..., DN) are the same, and when a forward voltage is applied to the power supply terminal Vdd, all the Zener diodes (D1, D2, ..., DN) are in a reverse bias state.

[0027] Furthermore, the plurality of voltage-stabilizing diodes (D1, D2, ..., DN) are all Zener diodes.

[0028] Furthermore, the power MOS tube M1 is an N-channel power MOS tube.

[0029] The working principle of the embodiment of the utility model is as follows:

[0030] The power supply terminal Vdd of the surge suppression circuit 100 is connected to the positive terminal of the system power supply. When the normal working voltage of the power supply terminal Vdd is less than the clamping voltage Vclamp of the surge suppression circuit, the multiple series-connected voltage regulator diodes (D1, D2, ..., DN) do not reach the breakdown voltage and thus will not be turned on. The gate voltage Vg of the power MOS tube M1 is pulled down to the ground voltage by the resistor R1, so the power MOS tube M1 is in the off state. The surge suppression circuit 100 does not affect the normal operation of the system power supply and the protected device 200.

[0031] When a surge voltage comes, the voltage of the power supply terminal Vdd exceeds the clamping voltage Vclamp, and multiple series-connected voltage zener diodes (D1, D2, ..., DN) break down and conduct, and current flows from the multiple series-connected voltage zener diodes through the resistor R1, and the gate voltage Vg of the power MOS tube M1 is pulled up, so that the channel of the power MOS tube M1 is turned on, and the surge current of the power supply terminal Vdd is discharged to the ground terminal GND, thereby achieving the purpose of limiting the surge voltage. When the surge voltage on Vdd drops below the clamping voltage Vclamp, the voltage zener diode is turned off, and the gate voltage Vg of the power MOS tube M1 is pulled down to the ground voltage by the resistor R1, and the power MOS tube M1 is in the off state, and the surge suppression circuit 100 exits the clamping current limiting state.

[0032] When the surge voltage increases, the voltage of the power supply terminal Vdd increases, and the gate voltage Vg of the power MOS tube M1 also increases. The channel conduction capability of the power MOS tube M1 increases with the increase of its gate-source voltage Vgs. The channel conduction capability of the power MOS tube M1 is very strong, and the drain current I is calculated by formula (1):

[0033] (1),

[0034] In the formula, is the electron mobility, is the gate oxide capacitance per unit area, W and L are the width and length of the power MOS respectively, and Vth is the threshold voltage of the power MOS tube M1, which refers to the gate voltage when there is a specified current between the source and the drain.

[0035] From formula (1), it can be seen that the drain current I is in a square relationship with the gate-source voltage Vgs. When the gate voltage Vg of the power MOS tube M1 increases a little bit, its ability to conduct current increases a lot. The result is that the clamping voltage Vclamp changes very little with the surge current and is almost flat.

[0036] The clamping voltage of the surge suppression circuit can be adjusted by increasing or decreasing the number of Zener diodes. The clamping voltage Vclamp is calculated by formula (2):

[0037] (2),

[0038] In the formula, k is the number of Zener diodes connected in series, Vz is the breakdown voltage of the Zener diode, and Vgs is the gate-source voltage of the power MOS tube M1. The breakdown voltage Vz of the Zener diode is related to the process parameters. As an example, assuming that the breakdown voltage Vz of the Zener diode is 6V, 6 Zener diodes are connected in series, and the gate-source voltage Vgs of the MOS tube M1 is generally 3-4V, the maximum value of the clamping voltage Vclmap is calculated to be 40V. Therefore, by adjusting the number of Zener diodes connected in series, the clamping voltage Vclmap of the surge suppression circuit 100 can be flexibly selected, and adjusting the length and width of the power MOS tube M1 can adjust the over-surge current capability of the surge suppression circuit.

[0039] In the embodiment of the utility model, by selecting Zener diodes with different breakdown voltages and increasing or decreasing the number of Zener diodes, the surge clamping voltage can be selected more flexibly. The original device involved in the embodiment of the utility model can be produced using the traditional BCD (Bipolar-CMOS-DMOS) process and can be integrated with conventional silicon-based chips. However, the avalanche breakdown voltage of the traditional TVS tube is basically fixed in one process, and there is no plan to adjust the clamping voltage when it is integrated with other chips.

[0040] In the embodiment of the utility model, due to the strong overcurrent capability of the power MOS tube, the clamping voltage does not change significantly with the surge current, and the clamping voltage is flatter. The traditional TVS tube is realized by using the avalanche breakdown characteristics of the PN junction, and the breakdown voltage is basically linearly related to the current. Figure 2 The figure shows the comparison of surge suppression voltages using the traditional TVC tube and the scheme of the present invention. Curve 001 is the surge suppression voltage using the traditional TVC tube, and curve 002 is the surge suppression voltage using the scheme of the present invention. It can be seen that the scheme of the present invention can keep the surge suppression voltage flat and will not change with the size of the surge current and the temperature. Therefore, the embodiment of the present invention can more flexibly select the clamping voltage or the withstand voltage of the protected device during system design, and can more easily select the appropriate withstand voltage device.

[0041] The utility model also provides an integrated circuit chip embodiment, including the aforementioned novel flattening clamping voltage surge suppression circuit embodiment.

[0042] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the technical principle of the present invention. These improvements and modifications should also be regarded as the protection scope of the present invention.

Claims

1. A novel flattening clamping voltage surge suppression circuit, connected in parallel to both ends of the protected device, characterized in that: include: A plurality of voltage-stabilizing diodes, power MOS tubes and resistors are connected in series; the drain of the power MOS tube is connected to the cathode of the voltage-stabilizing diode and serves as the power supply end of the surge suppression circuit, the gate of the power MOS tube is connected to the anode of the voltage-stabilizing diode and the first end of the resistor, and the source of the power MOS tube is connected to the second end of the resistor and serves as the ground end of the surge suppression circuit.

2. A novel flattening clamping voltage surge suppression circuit according to claim 1, characterized in that: Among the multiple series-connected Zener diodes, the bias states of all the Zener diodes are the same. When a forward voltage is applied to the power supply end, all the Zener diodes are in a reverse bias state.

3. A novel flattening clamping voltage surge suppression circuit according to claim 1, characterized in that: The plurality of voltage-stabilizing diodes are all Zener diodes.

4. A novel flattening clamping voltage surge suppression circuit according to claim 1, characterized in that: The power MOS tube is an N-channel power MOS tube.

5. An integrated circuit chip, characterized in that: The invention comprises a novel flattening clamping voltage surge suppression circuit as claimed in any one of claims 1 to 4.

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