Power supply protection circuit and power supply

Abstract

The utility model provides a power supply protection circuit and a power supply, the circuit comprises a bus current limiting circuit, the input end of the bus current limiting circuit is connected with the power grid voltage input end, and the output end of the bus current limiting circuit is electrically connected with a sampling circuit; the sampling circuit is used for collecting a power grid bus voltage value; the relay circuit is used for short-circuiting the bus current limiting circuit or connecting the bus current limiting circuit into the power supply protection circuit; and the control circuit is in control connection with the relay circuit and is used for controlling the working state of the relay circuit according to the power grid bus voltage value acquired by the sampling circuit, so that the bus current limiting circuit is short-circuited or connected into the power supply protection circuit. According to the utility model, the problem of circuit abnormity caused by peak voltage and current generated on the bus capacitor at the power-on moment is solved, and normal operation of components is protected.

Description

Technical Field

[0001] The utility model relates to the technical field of power supply protection, in particular to a power supply protection circuit and a power supply. Background Art

[0002] In the power supply circuit, due to design requirements, the power supply is divided into energy storage filter circuit and drive circuit. With the development of science and technology and keeping pace with the times, there are many protections in the drive circuit, including self-protection of devices and protection design of peripheral circuits, while the switching power supply has no protection measures for grid fluctuations and rapid power-off and power-on. When the switching power supply is powered off, the electric energy stored in the capacitor is discharged to supply power to the load. Because it takes a certain time interval for the capacitor to be fully discharged, the relay is not disconnected and continues to work. The current limiting resistor is short-circuited, and the voltage and current spikes are directly applied to the busbar. The cement resistor that absorbs the peak voltage and current is lost, and a large dv / dt and di / dt are generated on the driving rectifier bridge and the filter circuit, which affects the stability of the entire equipment and even causes some devices to fail to work properly, resulting in a shortened power supply life. A hardware adaptive protection circuit design for grid drop and rapid power-off is urgently needed.

[0003] Therefore, the prior art needs to be further developed. Summary of the invention

[0004] The purpose of the utility model is to overcome the above technical deficiencies and provide a power supply protection circuit and a power supply to solve the problems existing in the prior art that after a grid drop or rapid power-off, a certain time interval is required for the complete discharge of the capacitor, and voltage and current spikes are directly applied to the bus, resulting in a large dv / dt and di / dt on the driving rectifier bridge and the filter circuit, affecting the stability of the entire equipment, and even causing some devices to fail to work properly, resulting in a shortened power supply life.

[0005] In order to achieve the above technical objectives, according to a first aspect of the present utility model, the present utility model provides a power supply protection circuit, the circuit comprising:

[0006] A bus current limiting circuit, wherein the input end of the bus current limiting circuit is connected to the grid voltage input end, and the output end of the bus current limiting circuit is electrically connected to the sampling circuit;

[0007] A sampling circuit, wherein the sampling circuit is used to collect a power grid bus voltage value;

[0008] Relay circuit, used to short-circuit the bus current limiting circuit or connect the bus current limiting circuit to the power protection circuit;

[0009] The control circuit is connected to the relay circuit and is used to control the working state of the relay circuit according to the grid bus voltage value collected by the sampling circuit, thereby short-circuiting the bus current limiting circuit or connecting the bus current limiting circuit to the power protection circuit.

[0010] Specifically, the control circuit includes:

[0011] A voltage comparator circuit is used to control the relay circuit to connect the bus current limiting circuit to the power supply protection circuit when the bus voltage value is lower than the reference voltage, or to control the relay circuit to short-circuit the bus current limiting circuit when the bus voltage value is greater than the reference voltage.

[0012] Specifically, the circuit further includes:

[0013] A timer circuit, the timer circuit includes a timer, the timer includes an input end and an output end, the voltage comparator circuit includes a voltage comparator, the voltage comparator includes an output end, the relay circuit includes a relay, the relay includes a control contact, the input end of the timer is electrically connected to the output end of the voltage comparator circuit, and the output end of the timer is electrically connected to the control contact of the relay circuit.

[0014] Specifically, the circuit further includes:

[0015] A reference voltage generating circuit, wherein the reference voltage generating circuit is used to generate a reference voltage, the reference voltage generating circuit includes a reference voltage output terminal, the sampling circuit includes an input terminal and an output terminal, the voltage comparator includes a positive input terminal and an inverting input terminal, the output terminal of the sampling circuit is connected to the positive input terminal of the voltage comparator, and the inverting input terminal is connected to the reference voltage output terminal.

[0016] Specifically, the sampling circuit includes a tenth resistor, an eleventh resistor, a twelfth resistor and a thirteenth resistor, the tenth resistor, the eleventh resistor, the twelfth resistor and the thirteenth resistor are connected in series, the free end of the thirteenth resistor is the input end of the sampling circuit, and the free end of the tenth resistor is the output end of the sampling circuit.

[0017] Specifically, the relay includes a first normally closed contact and a second normally closed contact, the bus voltage input terminal is electrically connected to the input terminal of the bus current limiting circuit and the first normally closed contact, and the input terminal of the sampling circuit is electrically connected to the output terminal of the bus current limiting circuit and the second normally closed contact, respectively.

[0018] Specifically, the delay circuit includes:

[0019] A voltage input terminal, a first transistor, a seventh capacitor, a fifth resistor, a sixth resistor, a seventh resistor and an eighth resistor, the collector of the first transistor is electrically connected to the voltage input terminal through the seventh resistor, the collector of the first transistor is also electrically connected to the control contact of the relay through the eighth resistor, the base of the first transistor is electrically connected to the output terminal of the delay device through the sixth resistor, the output terminal of the delay device is also electrically connected to the control contact of the relay through the fifth resistor and the seventh capacitor connected in series, and the emitter of the first transistor is grounded.

[0020] Specifically, the bus current limiting circuit includes a fourteenth resistor R14 and a fifteenth resistor R15 connected in series.

[0021] Specifically, the circuit further includes:

[0022] A rectifier bridge, the rectifier bridge comprising an input end and an output end, the input end of the rectifier bridge being electrically connected to the bus voltage input end, and the input end of the bus current limiting circuit being electrically connected to the output end of the rectifier bridge and the second normally closed contact respectively;

[0023] The inverter bridge comprises an input end and an output end, and the output end of the bus current limiting circuit is electrically connected to the input end of the inverter bridge.

[0024] According to a second aspect of the utility model, a power supply is provided, which adopts the above-mentioned power supply protection circuit.

[0025] Beneficial effects:

[0026] 1. The utility model solves the problem of abnormal circuit operation caused by rapid power off and power grid drop.

[0027] 2. The utility model solves the problem that at the moment of power-on, the peak voltage and current generated on the bus capacitor are directly applied to the bus, generating a large dv / dt and di / dt on the driving rectifier bridge and the filter circuit, affecting the stability of the entire equipment, and even causing some devices to malfunction and shorten the life of the power supply. It avoids the damage of the switching power supply components and the IPM module caused by the peak voltage and peak current generated on the bus due to fast power-on and grid drop, and protects the normal operation of the components.

[0028] 3. The utility model realizes adaptive protection of the mainboard power components at the moment of power-on and power grid drop by applying hardware protection circuit, which can be completed without any software control, thus greatly improving the circuit response speed, improving the circuit operation stability and reducing after-sales cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 It is a circuit principle diagram of a power protection circuit provided in a specific embodiment of the utility model. DETAILED DESCRIPTION

[0030] In order to enable those skilled in the art to better understand the technical solution of the present invention, the technical solution of the present invention is clearly and completely described below in conjunction with the drawings of the present invention. Based on the embodiments in this application, other similar embodiments obtained by ordinary technicians in this field without making creative work should all fall within the scope of protection of this application. In addition, the directional words mentioned in the following embodiments, such as "up", "down", "left", "right", etc., are only referenced to the directions of the drawings. Therefore, the directional words used are used to illustrate rather than limit the creation of the present invention.

[0031] The utility model is further described below in conjunction with the accompanying drawings and preferred embodiments.

[0032] See also Figure 1 The utility model provides a power protection circuit, comprising:

[0033] A bus current limiting circuit, wherein the input end of the bus current limiting circuit is connected to the grid voltage input end, and the output end of the bus current limiting circuit is electrically connected to the sampling circuit.

[0034] Specifically, the bus current limiting circuit includes a fourteenth resistor R14 and a fifteenth resistor R15 connected in series.

[0035] Preferably, the fourteenth resistor R14 and the fifteenth resistor R15 are cement resistors, which are used to limit surge voltage and current peak after power-on.

[0036] The sampling circuit is used to collect the bus voltage value of the power grid.

[0037] Relay circuit, used to short-circuit the bus current limiting circuit or connect the bus current limiting circuit to the power protection circuit;

[0038] The control circuit is connected to the relay circuit and is used to control the working state of the relay circuit according to the grid bus voltage value collected by the sampling circuit, thereby short-circuiting the bus current limiting circuit or connecting the bus current limiting circuit to the power protection circuit.

[0039] Specifically, the control circuit includes:

[0040] A voltage comparator circuit is used to control the relay circuit to connect the bus current limiting circuit to the power supply protection circuit when the bus voltage value is lower than the reference voltage, or to control the relay circuit to short-circuit the bus current limiting circuit when the bus voltage value is greater than the reference voltage.

[0041] Specifically, the circuit further includes:

[0042] A timer circuit, the timer circuit includes a timer, the timer includes an input end and an output end, the voltage comparator circuit includes a voltage comparator U1, the voltage comparator U1 includes an output end, the relay circuit includes a relay K1, the relay K1 includes a control contact, the input end of the timer is electrically connected to the output end of the voltage comparator circuit, and the output end of the timer is electrically connected to the control contact of the relay circuit.

[0043] Specifically, the circuit further includes:

[0044] A reference voltage generating circuit, wherein the reference voltage generating circuit is used to generate a reference voltage, wherein the reference voltage generating circuit comprises a reference voltage output terminal, wherein the sampling circuit comprises an input terminal and an output terminal, wherein the voltage comparator U1 comprises a positive input terminal and a negative input terminal, wherein the output terminal of the sampling circuit is connected to the positive input terminal of the voltage comparator U1, and the negative input terminal is connected to the reference voltage output terminal.

[0045] Specifically, the sampling circuit includes a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12 and a thirteenth resistor R13, the tenth resistor R10, the eleventh resistor R11, the twelfth resistor R12 and the thirteenth resistor R13 are connected in series, the free end of the thirteenth resistor R13 is the input end of the sampling circuit, and the free end of the tenth resistor R10 is the output end of the sampling circuit.

[0046] Specifically, the relay K1 also includes a first normally closed contact and a second normally closed contact, the bus voltage input end is electrically connected to the input end of the bus current limiting circuit and the first normally closed contact, and the input end of the sampling circuit is electrically connected to the output end of the bus current limiting circuit and the second normally closed contact.

[0047] Specifically, the delay circuit includes:

[0048] A voltage input terminal, a first transistor Q1, a seventh capacitor C5, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7 and an eighth resistor, the collector of the first transistor Q1 is electrically connected to the voltage input terminal through the seventh resistor R7, the collector of the first transistor Q1 is also electrically connected to the control contact of the relay through the eighth resistor, the base of the first transistor Q1 is electrically connected to the output terminal of the delay device through the sixth resistor R6, the output terminal of the delay device is also electrically connected to the control contact of the relay through the fifth resistor R5 and the seventh capacitor C5 connected in series, and the emitter of the first transistor Q1 is grounded.

[0049] Specifically, the circuit further includes:

[0050] A rectifier bridge and an inverter bridge, wherein the rectifier bridge comprises an input end and an output end, the input end of the rectifier bridge is electrically connected to the bus voltage input end, and the input end of the bus current limiting circuit is electrically connected to the output end of the rectifier bridge and the second normally closed contact respectively.

[0051] Specifically, the inverter bridge includes an input end and an output end, the output end of the bus current limiting circuit is electrically connected to the input end of the inverter bridge, and the output end of the inverter bridge is electrically connected to an electrical device for supplying power to the electrical device.

[0052] Specifically, the circuit further includes:

[0053] Bus energy storage filter circuit.

[0054] The busbar energy storage filter circuit comprises:

[0055] A first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, and a sixth capacitor C6.

[0056] The first capacitor C1 and the sixth capacitor C6 are connected in series, the third capacitor C3 and the fourth capacitor C4 are connected in series, and the fifth capacitor C5 and the second capacitor C2 are connected in series. One end of the seventh capacitor C7 is connected to one end of the fourth capacitor C4, the fifth capacitor C5, and the sixth capacitor C6 respectively, and one end of the first capacitor C1, the second capacitor C2, and the third capacitor C3 is connected to the output end of the bus current limiting circuit respectively.

[0057] The first capacitor C1, the second capacitor C2, the third capacitor C3, the fourth capacitor C4, the fifth capacitor C5, and the sixth capacitor C6 are bus energy storage filter capacitors.

[0058] It is understandable that the circuit loop state when the power supply is working normally is:

[0059] The power supply is divided into energy storage filter circuit and drive circuit. Taking the drive of three-phase electricity as an example, when the power supply is working normally, the grid voltage input terminal inputs the three-phase 220V voltage of the mains. After rectification by the rectifier bridge, the bus voltage is 540V. After the surge voltage and current spike are limited by the cement resistor, the bus energy storage filter capacitor is charged. After charging, it supplies power to the switching power supply and module. The voltage for the relay to work normally is 12V.

[0060] It is understandable that after power failure / bus voltage drop, the working state of the device circuit in the circuit is:

[0061] When it is detected that the grid bus voltage value is lower than the reference voltage (i.e. power off or bus voltage drops), the calculation formula of the reference voltage is: (R4*3.3V) / (R3+R4). At this time, U1 outputs a low level, and the delay device delays the output of the low level signal for the first time. The base value of the first transistor Q1 is a low level, and the first transistor Q1 is not conducting. At this time, the control contact given to the relay K1 is a high level, and the first normally closed contact and the second normally closed contact of the K1 relay are disconnected. At this time, by connecting the bus current limiting circuit to the power protection circuit, surge voltage and current spikes are limited, and the bus energy storage filter capacitor discharges to continue to supply power to the load, thereby ensuring the normal operation of the switching power supply.

[0062] It should be noted here that the delay device is equivalent to a 555 timer. The first time is obtained according to the ratio of external capacitors and resistors. When the ratio is different, the first time is also different. The calculation formula of the first time T is:

[0063] T=RC.

[0064] It can be understood that the first time in the present invention is 2S. The above setting is obtained by the technicians of the present invention through a large number of experiments. It can better prevent the switching state of the relay from changing back and forth due to circuit noise or fluctuations, and further improve the circuit stability and reliability of the present invention.

[0065] It is understandable that when the circuit is powered on after power failure / bus voltage drops, the normal voltage circuit working state is restored:

[0066] When the bus voltage returns to normal voltage after power-on / bus voltage drops, the relay is disconnected, that is, the bus current limiting circuit is still connected to the power protection circuit, that is, the line where the cement resistor is short-circuited is cut off, and the grid voltage input terminal inputs the three-phase 220V voltage of the mains, which can only be charged through the rectifier bridge and cement resistor to limit the surge voltage and current peak. The bus energy storage filter capacitor is charged to supply power to the switching power supply and module. When the input power is stable, the relay is powered by 12V. When the bus voltage value is detected to be higher than the reference voltage (that is, after power-on / bus voltage drops and returns to normal voltage), the voltage comparator U1 outputs a high level, and the high level signal is output for the first time after the delay device delays. The base of the first transistor Q1 is at a high level, and the first transistor Q1 is turned on. At this time, the control contact given to the relay K1 is at a low level, and the relay K1 is energized, short-circuiting the bus current limiting circuit, and the switching power supply works normally.

[0067] It can be understood that the utility model has the following technical effects:

[0068] 1. The utility model solves the problem of abnormal circuit operation caused by rapid power off and power grid drop.

[0069] 2. The utility model solves the problem that at the moment of power-on, the peak voltage and current generated on the bus capacitor are directly applied to the bus, generating a large dv / dt and di / dt on the driving rectifier bridge and the filter circuit, affecting the stability of the entire equipment, and even causing some devices to malfunction and shorten the life of the power supply. It avoids the damage of the switching power supply components and the IPM module caused by the peak voltage and peak current generated on the bus due to fast power-on and grid drop, and protects the normal operation of the components.

[0070] 3. The utility model realizes adaptive protection of the mainboard power components at the moment of power-on and power grid drop by applying hardware protection circuit, which can be completed without any software control, thus greatly improving the circuit response speed, improving the circuit operation stability and reducing after-sales cost.

[0071] In a preferred embodiment, the present application also provides a power supply, which adopts the above-mentioned power protection circuit.

[0072] It can be understood that the utility model has the following technical effects:

[0073] 1. The utility model solves the problem of abnormal circuit operation caused by rapid power off and power grid drop.

[0074] 2. The utility model solves the problem that at the moment of power-on, the peak voltage and current generated on the bus capacitor are directly applied to the bus, generating a large dv / dt and di / dt on the driving rectifier bridge and the filter circuit, affecting the stability of the entire equipment, and even causing some devices to malfunction and shorten the life of the power supply. It avoids the damage of the switching power supply components and the IPM module caused by the peak voltage and peak current generated on the bus due to fast power-on and grid drop, and protects the normal operation of the components.

[0075] 3. The utility model realizes adaptive protection of the mainboard power components at the moment of power-on and power grid drop by applying hardware protection circuit, which can be completed without any software control, thus greatly improving the circuit response speed, improving the circuit operation stability and reducing after-sales cost.

[0076] The various technical features described above can be combined arbitrarily. Although all possible combinations of these technical features are not described, any combination of these technical features should be considered to be covered by this specification as long as there is no contradiction in such combination.

[0077] The specific implementation methods of the utility model described above do not constitute a limitation on the protection scope of the utility model. Any other corresponding changes and modifications made according to the technical concept of the utility model should be included in the protection scope of the claims of the utility model.

Claims

1. A power protection circuit, characterized in that: The circuit comprises: A bus current limiting circuit, wherein the input end of the bus current limiting circuit is connected to the grid voltage input end, and the output end of the bus current limiting circuit is electrically connected to the sampling circuit; A sampling circuit, wherein the sampling circuit is used to collect a power grid bus voltage value; Relay circuit, used to short-circuit the bus current limiting circuit or connect the bus current limiting circuit to the power protection circuit; The control circuit is connected to the relay circuit and is used to control the working state of the relay circuit according to the grid bus voltage value collected by the sampling circuit, thereby short-circuiting the bus current limiting circuit or connecting the bus current limiting circuit to the power protection circuit.

2. The power protection circuit according to claim 1, characterized in that: The control circuit comprises: A voltage comparator circuit is used to control the relay circuit to connect the bus current limiting circuit to the power supply protection circuit when the bus voltage value is lower than the reference voltage, or to control the relay circuit to short-circuit the bus current limiting circuit when the bus voltage value is greater than the reference voltage.

3. The power protection circuit according to claim 2, characterized in that: The circuit further comprises: A timer circuit, the timer circuit includes a timer, the timer includes an input end and an output end, the voltage comparator circuit includes a voltage comparator, the voltage comparator includes an output end, the relay circuit includes a relay, the relay includes a control contact, the input end of the timer is electrically connected to the output end of the voltage comparator circuit, and the output end of the timer is electrically connected to the control contact of the relay circuit.

4. The power protection circuit according to claim 2, characterized in that: The circuit further comprises: A reference voltage generating circuit, wherein the reference voltage generating circuit is used to generate a reference voltage, the reference voltage generating circuit includes a reference voltage output terminal, the sampling circuit includes an input terminal and an output terminal, the voltage comparator includes a positive input terminal and an inverting input terminal, the output terminal of the sampling circuit is connected to the positive input terminal of the voltage comparator, and the inverting input terminal is connected to the reference voltage output terminal.

5. The power protection circuit according to claim 4, characterized in that: The sampling circuit includes a tenth resistor, an eleventh resistor, a twelfth resistor and a thirteenth resistor, wherein the tenth resistor, the eleventh resistor, the twelfth resistor and the thirteenth resistor are connected in series, a free end of the thirteenth resistor is an input end of the sampling circuit, and a free end of the tenth resistor is an output end of the sampling circuit.

6. The power protection circuit according to claim 3, characterized in that: The relay includes a first normally closed contact and a second normally closed contact, the bus voltage input end is electrically connected to the input end of the bus current limiting circuit and the first normally closed contact respectively, and the input end of the sampling circuit is electrically connected to the output end of the bus current limiting circuit and the second normally closed contact respectively.

7. The power protection circuit according to claim 3, characterized in that: The delay circuit comprises: A voltage input terminal, a first transistor, a seventh capacitor, a fifth resistor, a sixth resistor, a seventh resistor and an eighth resistor, the collector of the first transistor is electrically connected to the voltage input terminal through the seventh resistor, the collector of the first transistor is also electrically connected to the control contact of the relay through the eighth resistor, the base of the first transistor is electrically connected to the output terminal of the delay device through the sixth resistor, the output terminal of the delay device is also electrically connected to the control contact of the relay through the fifth resistor and the seventh capacitor connected in series, and the emitter of the first transistor is grounded.

8. The power protection circuit according to claim 1, characterized in that: The bus current limiting circuit includes a fourteenth resistor R14 and a fifteenth resistor R15 connected in series.

9. The power protection circuit according to claim 6, characterized in that: The circuit further comprises: A rectifier bridge, the rectifier bridge comprising an input end and an output end, the input end of the rectifier bridge being electrically connected to the bus voltage input end, and the input end of the bus current limiting circuit being electrically connected to the output end of the rectifier bridge and the second normally closed contact respectively; The inverter bridge comprises an input end and an output end, and the output end of the bus current limiting circuit is electrically connected to the input end of the inverter bridge.

10. A power supply, characterized in that: A power protection circuit as described in any one of claims 1 to 9 is adopted.

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