High-density cam-shaped micro-column structure silicon capacitor

Abstract

The utility model discloses a high-density silicon capacitor with a cam-shaped micro-column structure, which comprises a substrate sheet provided with a bonding pad avoiding position and cam micro-columns arranged in an array, and two adjacent rows of cam micro-columns are arranged in a staggered manner; the first deposition layer covers the upper surface of the substrate slice; the first metal electrode layer covers the surface of the first deposition layer; and the second metal electrode layer covers the lower surface of the substrate slice. Compared with the prior art, the utility model solves the problems that the capacitance density of the silicon capacitor is insufficient and the silicon micro-column and the dielectric layer in the bonding pad area are easy to damage.

Description

Technical Field

[0001] The utility model relates to the technical field of silicon capacitors, in particular to a high-density cam-shaped micro-column structure silicon capacitor. Background Art

[0002] Silicon capacitors are an indispensable and important component in the fields of optical communications, radio frequency, integrated circuits, etc. Silicon capacitors use silicon dioxide, silicon nitride or hafnium oxide as dielectric layers. Because of their strong material stability, they have excellent high-frequency and temperature characteristics, as well as low bias characteristics and high reliability. The operating temperature of silicon capacitors can reach 250°C, making them suitable for a wide range of environments.

[0003] Silicon capacitors basically use silicon oxide, silicon nitride or silicon oxynitride as the dielectric layer. Growing directly on silicon can increase the lattice matching between the film and the substrate silicon and reduce the number of dangling bonds and defects. Existing silicon capacitors are mainly divided into two structural types: 2D structured silicon capacitors and 3D structured silicon capacitors. 2D structured silicon capacitors are usually called planar silicon capacitors, which are mainly composed of metal-insulator / oxide dielectric-semiconductor silicon. However, the capacitance density of planar structured silicon capacitors is low; 3D structured capacitors refer to capacitors prepared by depositing an insulator dielectric film on a semiconductor silicon substrate with a 3D structure. This type of capacitor has a higher capacitance density and experimental high-frequency applications.

[0004] In the processing of silicon capacitors, the etching of deep pits and trenches with high aspect ratios is a key process step. Whether it is a dry or wet etching process, the verticality of the etched trenches or deep pits must be guaranteed, and the size of the opening and bottom must be consistent, which requires a more sophisticated and mature semiconductor process. Based on the definition and formula of capacitor physics, how to increase capacitance within a limited area has become the main research direction.

[0005] For example, patent number CN 106024765 A changes the traditional vertical method to a method with a larger top and a smaller bottom. Under the same groove degree, the relative area of ​​the capacitor is increased by tilting, thereby achieving the effect of increasing the capacitance, but the consistency of the tilt degree cannot be ensured, resulting in difficulty in guaranteeing the actual capacitance. Patent number CN 207303087U uses a cross-shaped groove structure to achieve a higher capacitance density through a higher aspect ratio, but the higher process difficulty will increase the cost per unit capacitance.

[0006] In addition, since silicon capacitors with high capacitance density require the preparation of a large number of silicon micro-column structures, if the micro-columns are not completely filled, the micro-columns or dielectric layers in the pad area will crack and fail during subsequent wire bonding at the pads. Utility Model Content

[0007] The utility model aims to provide a high-density cam-shaped micro-column structure silicon capacitor to solve the problem of insufficient capacitance density of silicon capacitors and easy damage of silicon micro-columns and dielectric layers in pad areas.

[0008] In order to achieve the above-mentioned purpose, the utility model adopts the following technical scheme: a high-density cam-shaped micro-column structure silicon capacitor, comprising:

[0009] A substrate sheet is provided with pad avoidance positions and array-arranged cam micro-pillars, and two adjacent rows of cam micro-pillars are staggered;

[0010] A first deposition layer covering the upper surface of the substrate sheet;

[0011] A first metal electrode layer covering the surface of the first deposition layer;

[0012] The second metal electrode layer covers the lower surface of the substrate.

[0013] As a further description of the above technical solution:

[0014] The substrate is a low-resistance silicon wafer.

[0015] As a further description of the above technical solution:

[0016] The height of the CAM micropillars ranged from 1 to 50 μm.

[0017] As a further description of the above technical solution:

[0018] The pitch of the CAM micropillars is 0-5 μm.

[0019] As a further description of the above technical solution:

[0020] The first deposition layer is a silicon oxide layer or a silicon nitride layer.

[0021] As a further description of the above technical solution:

[0022] The first deposition layer is a silicon oxide layer and a silicon nitride layer arranged in sequence from bottom to top.

[0023] In summary, due to the adoption of the above technical solution, the beneficial effects of the utility model are:

[0024] 1. In the present invention, in order to greatly increase the surface area of ​​silicon capacitors and thus improve the capacitance density, cam-shaped micro-pillars are made on the substrate. The cam micro-pillars on the substrate are columnar structures with concave and convex edge structures and intervals of 60°. The two adjacent rows of cam micro-pillars are staggered to increase the number of micro-pillars per unit area, thereby increasing the unit surface area. Canceling the micro-pillar design in the pad area can avoid the use of more complex high aspect ratio trench filling processes such as polysilicon or metal, reduce manufacturing difficulty, reduce costs, and improve yield.

[0025] 2. In the utility model, the silicon micro-column structure is not formed in the pad position area of ​​the chip, and the silicon micro-column structure is formed in other areas outside the pad area. The silicon micro-column is a cam micro-column. This ensures that when the wire is welded, the silicon micro-columns and the dielectric layer will not be damaged due to ultrasonic action when the silicon columns are not completely filled with each other, thereby ensuring the effectiveness of the silicon capacitor. At the same time, it can avoid the use of complex processes such as polysilicon or metal-filled grooves, thereby ensuring the easy manufacturability and low-cost characteristics of the silicon capacitor. The silicon micro-column avoids the use of an inclined structure with poor process consistency, and adopts a cam-like vertical micro-column structure with high process consistency and large unit surface area, thereby improving the capacitance density. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the technical solutions of the embodiments of the utility model, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the utility model and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without paying creative work.

[0027] Figure 1 This is a schematic diagram of the structure of a high-density cam-shaped micro-column structure silicon capacitor.

[0028] Figure 2 for Figure 1 A partial enlarged view of point A in the middle.

[0029] Figure 3 Schematic diagram of the structure of the cam micro-column in a high-density cam-shaped micro-column structure silicon capacitor Figure 1 .

[0030] Figure 4 Schematic diagram of the structure of the cam micro-column in a high-density cam-shaped micro-column structure silicon capacitor Figure 2 .

[0031] Figure 5 Schematic diagram of step S2 in a method for processing a high-density cam-shaped micro-pillar structure silicon capacitor.

[0032] Figure 6 Schematic diagram of step S4 in a method for processing a high-density cam-shaped micro-pillar structure silicon capacitor.

[0033] Legend:

[0034] 1. substrate sheet; 11. cam micro-column; 12. pad avoidance position; 2. first deposition layer; 3. first metal electrode layer; 4. second metal electrode layer. DETAILED DESCRIPTION

[0035] The following will be combined with the drawings in the embodiments of the utility model to clearly and completely describe the technical solutions in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments of the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0036] Example 1

[0037] See also Figure 1-6 The utility model provides a technical solution: a high-density cam-shaped micro-column structure silicon capacitor, comprising:

[0038] A substrate sheet 1 is provided with a pad avoidance position 12 and cam micro-pillars 11 arranged in an array, and two adjacent rows of cam micro-pillars 11 are arranged in a staggered manner;

[0039] A first deposition layer 2, which covers the upper surface of the substrate sheet 1;

[0040] A first metal electrode layer 3, which covers the surface of the first deposition layer 2;

[0041] The second metal electrode layer 4 covers the lower surface of the substrate 1 .

[0042] The substrate wafer 1 is a low-resistance silicon wafer.

[0043] The height of the cam micro-pillars 11 is 1-50 μm, and the pitch of the cam micro-pillars 11 is 0-5 μm.

[0044] The first deposition layer 2 is a silicon oxide layer or a silicon nitride layer, or the first deposition layer 2 is a silicon oxide layer and a silicon nitride layer sequentially arranged from bottom to top.

[0045] The processing method of the high-density cam-shaped micro-column structure silicon capacitor comprises the following steps:

[0046] S1, taking a low-resistance silicon wafer with a thickness of one hundred microns to several hundred microns as substrate 1;

[0047] S2, photolithography and etching of cam micro-pillars 11 on the substrate 1, the depth of the grooves between the cam micro-pillars 11 is one micron to several tens of microns, and the spacing between the cam micro-pillars 11 is several microns;

[0048] S3, depositing silicon oxide on the patterned substrate 1 using an oxidation process, or depositing silicon nitride using PECVD or LPCVD, or depositing silicon oxide and silicon nitride materials in sequence, wherein the thickness of the silicon oxide or silicon nitride is tens of nanometers to hundreds of nanometers;

[0049] S4, depositing a first metal electrode layer 3 on the front side of the substrate 1 by electron beam evaporation or sputtering, and performing photolithography and etching on the first metal electrode layer 3 to form a specific pattern. The first metal electrode layer 3 may be made of materials such as Ti, Au, Cr, Au, Ti, and AL, and has a thickness of several hundred nanometers to several micrometers;

[0050] S5, removing the dielectric layer on the back side of the substrate 1 by etching or thinning process, and making the substrate 1 reach a specific thickness, which may be from one hundred microns to several hundred microns;

[0051] S6. Deposit a second metal electrode layer 4 on the back side of the substrate sheet 1 using electron beam evaporation or sputtering technology. The second metal electrode layer 4 can be made of materials such as Ti, Au, Cr, Au, Ti, Ni, Au, Ti, Ni, Ag, etc., and its thickness can be from several hundred nanometers to several microns.

[0052] Working principle: In order to greatly increase the surface area of ​​silicon capacitors and thus improve the capacitance density, cam-shaped micro-pillars are made on the substrate sheet 1. The cam micro-pillars 11 on the substrate sheet 1 are columnar structures with concave and convex edge structures and intervals of 60°. The two adjacent rows of cam micro-pillars 11 are staggered to increase the number of micro-pillars per unit area, thereby increasing the unit surface area. No silicon micro-pillar structure is made in the pad position area of ​​the chip, and silicon micro-pillar structures are made in other areas outside the pad area. The silicon micro-pillar is the cam micro-pillar 11. This ensures that when the wire is bonded, the silicon micro-pillars and the dielectric layer will not be damaged due to ultrasonic action when the silicon pillars are not completely filled, thereby ensuring the effectiveness of the silicon capacitor. At the same time, it can avoid the use of complex processes such as polysilicon or metal-filled grooves, thereby ensuring the manufacturability and low-cost characteristics of the silicon capacitor.

[0053] Silicon micro-pillars avoid using tilted structures with poor process consistency and adopt cam-like vertical micro-pillar structures with high process consistency and large unit surface area, thereby improving capacitance density. Canceling the micro-pillar design in the pad area can avoid using more complex high aspect ratio trench filling processes such as polysilicon or metal, reduce manufacturing difficulty, reduce costs, and improve yield.

[0054] The above description is only a preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can make equivalent replacements or changes within the technical scope disclosed by the present invention according to the technical scheme and the utility model concept of the present invention, which should be covered by the protection scope of the present invention.

Claims

1. A high-density cam-shaped micro-pillar structure silicon capacitor, characterized in that: include: A substrate sheet, on which pad avoidance positions and array-arranged cam micro-pillars are provided, and the cam micro-pillars in two adjacent rows are staggered; A first deposition layer covering the upper surface of the substrate sheet; A first metal electrode layer covering the surface of the first deposition layer; The second metal electrode layer covers the lower surface of the substrate.

2. The high-density cam-shaped micro-pillar structure silicon capacitor according to claim 1, characterized in that: The substrate wafer is a low-resistance silicon wafer.

3. The high-density cam-shaped micro-pillar structure silicon capacitor according to claim 1, characterized in that: The height of the cam micro-column is 1-50 μm.

4. The high-density cam-shaped micro-pillar structure silicon capacitor according to claim 1, characterized in that: The pitch of the cam micro-pillars is 0-5 μm.

5. The high-density cam-shaped micro-pillar structure silicon capacitor according to claim 1, characterized in that: The first deposition layer is a silicon oxide layer or a silicon nitride layer.

6. The high-density cam-shaped micro-pillar structure silicon capacitor according to claim 1, characterized in that: The first deposition layer is a silicon oxide layer and a silicon nitride layer arranged in sequence from bottom to top.

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