Demodulation circuit and wireless charging device thereof

Abstract

The utility model relates to a demodulation circuit and a wireless charging device thereof. The demodulation circuit comprises a signal reduction module, a signal extraction module and a bias adjustment module, the first end of the signal reduction module is connected with an external direct-current power supply and an external receiver, and is used for receiving a signal to be demodulated; the second end of the signal reduction module is connected with the first end of the signal extraction module, and the signal reduction module is used for outputting reduced signals to be demodulated to the signal extraction module; the signal extraction module is provided with an analog switch; the second end of the signal extraction module is connected with the first end of the bias adjustment module, and the signal extraction module is used for extracting the signal to be demodulated as a demodulation signal according to the switching frequency of the analog switch and outputting the demodulation signal to the bias adjustment module; and the second end of the bias adjustment module is connected with an external microcontroller and is used for converting the demodulation signal into a recognizable signal of the microcontroller.

Description

Technical Field

[0001] The utility model relates to the technical field of electronic circuits, in particular to a demodulation circuit and a wireless charging device thereof. Background Art

[0002] Wireless charging technology, also known as contactless charging, is a technology that transmits electrical energy from a power supply device to an electrical device by utilizing the principles of electromagnetic induction, magnetic resonance, and electromagnetic wave radiation.

[0003] In recent years, in-car wireless chargers have become widely popular. While charging mobile phones, these wireless chargers need to communicate to obtain the mobile phone's identity code, real-time charging information and other information to prevent charging of foreign objects or charging the mobile phone with excessive power.

[0004] However, as the charging power increases, the communication between the wireless charger and the mobile phone is easily interfered, resulting in inaccurate acquisition of the mobile phone's identity code, real-time charging information and other information, thus causing safety hazards.

[0005] Therefore, there is an urgent need for a demodulation circuit with strong anti-interference ability to solve the above technical defects. Summary of the invention

[0006] In order to solve the above technical problems, an embodiment of the utility model provides a demodulation circuit with strong anti-interference ability.

[0007] The present invention provides the following technical solution: a demodulation circuit, the system comprising:

[0008] A signal reduction module, a signal extraction module and a bias adjustment module;

[0009] The first end of the signal reduction module is connected to an external DC power supply and an external receiver, and is used to receive the signal to be demodulated; the second end of the signal reduction module is connected to the first end of the signal extraction module, and is used to output the reduced signal to be demodulated to the signal extraction module;

[0010] The signal extraction module is provided with the analog switch; the second end of the signal extraction module is connected to the first end of the bias adjustment module, and is used to extract the signal to be demodulated as a demodulated signal according to the switching frequency of the analog switch, and output it to the bias adjustment module;

[0011] The second end of the bias adjustment module is connected to an external microcontroller and is used to convert the demodulated signal into a signal recognizable by the microcontroller.

[0012] Optionally, in the demodulation circuit, the signal reduction module includes a signal input unit and a signal reduction unit; the first input end of the signal input unit is connected to the external DC power supply for obtaining the working voltage; the second input end of the signal input unit is connected to the external receiver for receiving the signal to be demodulated; the first output end of the signal input unit is connected to the first input end of the signal reduction unit; the second output end of the signal input unit is connected to the second input end of the signal reduction unit; the output end of the signal reduction unit is connected to the first end of the signal extraction module for outputting the reduced signal to be demodulated.

[0013] Optionally, in the demodulation circuit, the signal input unit includes: a first resistor, a second resistor, a third resistor, a fourth resistor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor and a fifth capacitor; the first end of the first resistor is connected to the external DC power supply; the second end of the first resistor is connected to the first end of the first capacitor and the first end of the second capacitor; the second end of the first capacitor is grounded; the first end of the second resistor is connected to the external receiver; the second end of the second resistor is connected to the second end of the second capacitor and the first end of the third capacitor; the second end of the third capacitor is grounded; the first end of the fourth capacitor is connected to the first end of the second capacitor; the second end of the fourth capacitor is connected to the first input end of the signal reduction unit through the third resistor; the first end of the fifth capacitor is connected to the second end of the second capacitor; the second end of the fifth capacitor is connected to the second input end of the signal reduction unit through the fourth resistor.

[0014] Optionally, in the demodulation circuit, the signal reduction unit includes: a first operational amplifier, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a sixth capacitor, a seventh capacitor, an eighth capacitor, a ninth capacitor and a tenth capacitor; the inverting input terminal of the first operational amplifier is connected to the first output terminal of the signal input unit, the first end of the fifth resistor and the first end of the sixth capacitor; the non-inverting input terminal of the first operational amplifier is connected to the second output terminal of the signal input unit and the first end of the sixth resistor; the negative power supply pin of the first operational amplifier is grounded; the positive power supply pin of the first operational amplifier is connected to the first end of the seventh capacitor and the first end of the eighth capacitor; the output terminal of the first operational amplifier is connected to the first end of the signal extraction module; the second end of the fifth resistor is connected to the output terminal of the first operational amplifier; the second end of the sixth capacitor is connected to the output terminal of the first operational amplifier; the second end of the sixth resistor is connected to the first end of the seventh capacitor, the first end of the eighth capacitor, the second end of the seventh resistor and the first end of the eighth resistor; the second end of the seventh capacitor is connected to the second end of the first eight capacitors and the second end of the eighth resistor; the second end of the eighth resistor is grounded; and the first end of the seventh resistor is connected to the external DC power supply.

[0015] Optionally, in the demodulation circuit, the signal extraction module includes: a signal conversion unit and a signal extraction unit; the first end of the signal conversion unit is connected to the second end of the signal reduction module; the second end and the third end of the signal conversion unit are connected to the first end and the second end of the signal extraction unit, for converting the reduced signal to be demodulated from a single-ended signal to a double-ended signal and outputting it to the signal extraction unit; the third end of the signal extraction unit is connected to the first end of the bias adjustment module, for outputting the demodulated signal.

[0016] Optionally, in the demodulation circuit, the signal conversion unit includes: a second operational amplifier, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a thirteenth resistor, an eleventh capacitor, a twelfth capacitor and a thirteenth capacitor; the inverting input terminal of the second operational amplifier is connected to the second end of the ninth resistor, the first end of the tenth resistor and the first end of the twelfth capacitor; the non-inverting input terminal of the second operational amplifier is connected to the second end of the eleventh resistor and the first end of the thirteenth capacitor; the output terminal of the second operational amplifier is connected to the second end of the signal extraction unit through the thirteenth resistor; the second end of the tenth resistor is connected to the output terminal of the second operational amplifier; the second end of the twelfth capacitor is connected to the output terminal of the second operational amplifier; the first end of the eleventh resistor is connected to the external DC power supply; the second end of the thirteenth capacitor is grounded; the first end of the ninth resistor is connected to the second end of the eleventh capacitor; the first end of the eleventh capacitor is connected to the first end of the twelfth resistor and the second end of the signal reduction module; the second end of the twelfth resistor is connected to the first end of the signal extraction unit.

[0017] Optionally, in the demodulation circuit, the signal extraction unit includes: an analog switch, a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, a fourteenth capacitor and a fifteenth capacitor; the first end of the analog switch is connected to the second end of the signal conversion unit; the second end of the analog switch is connected to the third end of the signal conversion unit; the third end of the analog switch is connected to the first end of the fourteenth capacitor and the external DC power supply; the fourth end of the analog switch is grounded; the fifth end of the analog switch is connected to the first end of the bias adjustment module through the fourteenth resistor; the sixth end of the analog switch is connected to the first end of the fifteenth resistor; the second end of the fourteenth capacitor is grounded; the second end of the fifteenth resistor is connected to the first end of the sixteenth resistor and the first end of the seventeenth resistor; the second end of the sixteenth resistor is connected to an external pulse modulation source, for controlling the switching frequency of the analog switch according to the pulse modulation signal of the pulse modulation source; the second end of the seventeenth resistor is grounded; the first end of the fifteenth capacitor is connected to the first end of the bias adjustment module; the second end of the fifteenth capacitor is grounded.

[0018] Optionally, in the demodulation circuit, the bias adjustment module includes: a third operational amplifier, an eighteenth resistor, a nineteenth resistor, a twentieth resistor, a twenty-first resistor, a sixteenth capacitor, a seventeenth capacitor, an eighteenth capacitor and a nineteenth capacitor; the inverting input terminal of the third operational amplifier is connected to the second end of the eighteenth resistor, the first end of the nineteenth resistor and the first end of the sixteenth capacitor; the non-inverting input terminal of the third operational amplifier is connected to the second end of the twentieth resistor and the first end of the seventeenth capacitor; the output terminal of the third operational amplifier is connected to the first end of the twenty-first resistor, the second end of the nineteenth resistor and the second end of the sixteenth capacitor; the first end of the eighteenth resistor is connected to the second end of the signal extraction module through the eighteenth capacitor; the second end of the twentieth resistor is connected to the external DC power supply; the second end of the seventeenth capacitor is grounded; the second end of the twenty-first resistor is grounded through the nineteenth capacitor.

[0019] Optionally, in the demodulation circuit, the bias adjustment module also includes: a fourth operational amplifier, a twenty-second resistor, a twenty-third resistor, a twenty-fourth resistor, a twenty-fifth resistor, a twenty-sixth resistor, a twenty-seventh resistor, a twentieth capacitor and a twenty-first capacitor; the inverting input terminal of the fourth operational amplifier is connected to the second end of the twenty-second resistor; the non-inverting input terminal of the fourth operational amplifier is connected to the second end of the twenty-third resistor and the first end of the twenty-fourth resistor; the output terminal of the fourth operational amplifier is connected to the second end of the twenty-fourth resistor and the first end of the twenty-fifth resistor; the first end of the twenty-second resistor is connected to the second end of the twenty-first resistor; the first end of the twenty-fourth resistor is connected to the external DC power supply through the twenty-sixth resistor; the first end of the twenty-fourth resistor is grounded through the twenty-tenth capacitor; the second end of the twenty-fifth resistor is grounded through the twenty-seventh resistor; the second end of the twenty-fifth resistor is grounded through the twenty-first capacitor; and the second end of the twenty-fifth resistor is connected to the external microcontroller.

[0020] To solve the above problems, an embodiment of the present application further provides a wireless charging device, including: the demodulation circuit as described above.

[0021] The demodulation circuit provided by the utility model can realize linear regulation of laser power and closed-loop control of motor current by providing different driving circuits for the laser and the motor, so as to solve the technical defects that the instantaneous optical power becomes unadjustable and the transient electrical noise generated cannot be effectively suppressed. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] One or more embodiments are exemplarily described by pictures in the corresponding drawings, and these exemplified descriptions do not constitute limitations on the embodiments. Elements with the same reference numerals in the drawings represent similar elements, and unless otherwise stated, the figures in the drawings do not constitute proportional limitations.

[0023] Figure 1 It is a structural schematic diagram of a demodulation circuit provided by an embodiment of the utility model;

[0024] Figure 2 It is a structural schematic diagram of a signal reduction module provided in an embodiment of the utility model;

[0025] Figure 3 It is a structural schematic diagram of a signal extraction module provided by an embodiment of the utility model;

[0026] Figure 4 It is a structural schematic diagram of a bias adjustment module provided in an embodiment of the utility model. DETAILED DESCRIPTION

[0027] The utility model is described in detail below in conjunction with specific embodiments. The following embodiments will help those skilled in the art to further understand the utility model, but do not limit the utility model in any form. It should be pointed out that for those of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the utility model. These all fall within the scope of protection of the utility model.

[0028] In order to make the purpose, technical solution and advantages of the utility model more clear, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present application and are not used to limit the present application.

[0029] It should be noted that, if there is no conflict, the various features in the embodiments of the present utility model can be combined with each other, and all are within the scope of protection of the present application. In addition, although the functional modules are divided in the device schematic diagram and the logical order is shown in the flow chart, in some cases, the steps shown or described can be performed in a different order than the module division in the device or the order in the flow chart.

[0030] Unless otherwise defined, all technical and scientific terms used in this specification have the same meaning as those commonly understood by those skilled in the art in the technical field of the present invention. The terms used in this specification are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used in this specification includes any and all combinations of one or more of the related listed items.

[0031] In addition, the technical features involved in each embodiment of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0032] Figure 1 The structure diagram of the demodulation circuit provided by the embodiment of the utility model is shown as follows: Figure 1 As shown:

[0033] The demodulation circuit 1 includes: a signal reduction module 10 , a signal extraction module 20 and a bias adjustment module 30 .

[0034] The first end of the signal reduction module 10 is connected to an external DC power supply and an external receiver for receiving the signal to be demodulated; the second end of the signal reduction module 10 is connected to the first end of the signal extraction module 20 for outputting the reduced signal to be demodulated to the signal extraction module 20.

[0035] The signal extraction module 20 is provided with an analog switch SW1 ; the second end of the signal extraction module 20 is connected to the first end of the bias adjustment module 30 , for extracting the demodulated signal as a demodulated signal according to the switching frequency of the analog switch SW1 , and outputting it to the bias adjustment module 30 .

[0036] The second end of the bias adjustment module 30 is connected to an external microcontroller and is used to convert the demodulated signal into a signal that can be recognized by the microcontroller.

[0037] In actual use, the external DC power supply can use dry batteries, storage batteries, DC generators and other constant voltage supply devices; the external receiver uses any type of receiver to maximize the extraction of the signal output by the transmitter from the interfered signal; the analog switch SW1 is provided with a pulse modulation port for obtaining a pulse modulation signal to control the switching frequency of the analog switch SW1.

[0038] Specifically, the analog switch SW1 is provided with a first channel and a second channel; when the pulse modulation signal is at a low level, the analog switch SW1 is turned to the first channel to obtain the signal of the first channel; at this time, the first channel is a conductive channel; when the pulse modulation signal is at a high level, the analog switch SW1 is turned to the second channel to obtain the signal of the second channel; at this time, the second channel is a conductive channel.

[0039] Figure 2 The structure diagram of the signal reduction module provided by the embodiment of the utility model is shown as follows: Figure 2 As shown:

[0040] The signal reduction module 10 comprises a signal input unit 101 and a signal reduction unit 102;

[0041] The first input end of the signal input unit 101 is connected to an external DC power supply for obtaining a working voltage; the second input end of the signal input unit 101 is connected to an external receiver for receiving a signal to be demodulated; the first output end of the signal input unit 101 is connected to the first input end of the signal reduction unit 102; the second output end of the signal input unit 101 is connected to the second input end of the signal reduction unit 102.

[0042] The output end of the signal reduction unit 102 is connected to the first end of the signal extraction module 20 for outputting the reduced signal to be demodulated.

[0043] The signal input unit 101 includes: a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4 and a fifth capacitor C5.

[0044] A first end of the first resistor R1 is connected to an external DC power source; a second end of the first resistor R1 is connected to a first end of the first capacitor C1 and a first end of the second capacitor C2.

[0045] A second terminal of the first capacitor C1 is grounded.

[0046] A first end of the second resistor R2 is connected to an external receiver; a second end of the second resistor R2 is connected to a second end of the second capacitor C2 and a first end of the third capacitor C3.

[0047] A second terminal of the third capacitor C3 is grounded.

[0048] A first end of the fourth capacitor C4 is connected to a first end of the second capacitor C2 ; a second end of the fourth capacitor C4 is connected to a first input end of the signal reduction unit 102 via a third resistor R3 .

[0049] A first end of the fifth capacitor C5 is connected to the second end of the second capacitor C2 ; a second end of the fifth capacitor C5 is connected to the second input end of the signal reduction unit 102 via a fourth resistor R4 .

[0050] In actual use, the first resistor R1, the second resistor R2, the third resistor R3 and the resistor R4 are used to prevent the circuit current from being too large; the first capacitor C1, the second capacitor C2, the third capacitor C3, the fourth capacitor C4 and the fifth capacitor C5 are used to reduce the influence of the voltage mutation on the circuit; at the same time, the voltage of the first output terminal and the second output terminal of the signal input unit 101 are kept equal.

[0051] The signal reduction unit 102 includes a first operational amplifier U1 , a fifth resistor R5 , a sixth resistor R6 , a seventh resistor R7 , an eighth resistor R8 , a sixth capacitor C6 , a seventh capacitor C7 , an eighth capacitor C8 , a ninth capacitor C9 and a tenth capacitor C10 .

[0052] The inverting input terminal of the first operational amplifier U1 is connected to the first output terminal of the signal input unit 101, the first end of the fifth resistor R5, and the first end of the sixth capacitor C6; the non-inverting input terminal of the first operational amplifier U1 is connected to the second output terminal of the signal input unit 101 and the first end of the sixth resistor R6; the negative power supply pin of the first operational amplifier U1 is grounded; the positive power supply pin of the first operational amplifier U1 is connected to the first end of the seventh capacitor C7 and the first end of the eighth capacitor C8; the output terminal of the first operational amplifier U1 is connected to the first end of the signal extraction module 20;

[0053] The second end of the fifth resistor R5 is connected to the output end of the first operational amplifier U1 .

[0054] The second end of the sixth capacitor C6 is connected to the output end of the first operational amplifier U1 .

[0055] The second end of the sixth resistor R6 is connected to the first end of the ninth capacitor C9, the first end of the tenth capacitor C10, the second end of the seventh resistor R7, and the first end of the eighth resistor R8.

[0056] The second end of the ninth capacitor C9 is connected to the second end of the tenth capacitor C10 and the second end of the eighth resistor R8.

[0057] A first end of the seventh resistor R7 is connected to an external DC power source.

[0058] A second terminal of the eighth resistor R8 is grounded.

[0059] In this embodiment, the first operational amplifier U1 uses a rail-to-rail operational amplifier to reduce distortion problems that may occur when the output signal is close to the power supply voltage.

[0060] In actual use, the voltage difference between the positive power pin and the negative power pin of the first operational amplifier U1 is the above-mentioned power supply voltage, that is, the operating voltage of the first operational amplifier U1; the sixth resistor R6, the seventh resistor R7, the eighth resistor R8, the ninth capacitor C9 and the tenth capacitor C10 are used to obtain a reference voltage for signal reduction, and the first operational amplifier U1 amplifies the reference voltage to obtain a reduced signal to be demodulated; wherein, the first operational amplifier U1 is used for impedance transformation, converting high impedance into low impedance, thereby improving the output load capacity, that is, reducing the influence of output impedance on the signal.

[0061] Figure 3 The structure diagram of the signal extraction module provided by the embodiment of the utility model is shown as follows: Figure 3 As shown:

[0062] The signal extraction module 20 includes: a signal conversion unit 201 and a signal extraction unit 202 .

[0063] The first end of the signal conversion unit 201 is connected to the second end of the signal reduction module 10; the second end and the third end of the signal conversion unit 201 are connected to the first end and the second end of the signal extraction unit 202, and are used to convert the reduced signal to be demodulated from a single-ended signal to a dual-ended signal and output it to the signal extraction unit 202.

[0064] The third terminal of the signal extraction unit 202 is connected to the first terminal of the bias adjustment module 30 for outputting a demodulated signal.

[0065] The signal conversion unit 201 includes a second operational amplifier U2 , a ninth resistor R9 , a tenth resistor R10 , an eleventh resistor R11 , a twelfth resistor R12 , a thirteenth resistor R13 , an eleventh capacitor C11 , a twelfth capacitor C12 and a thirteenth capacitor C13 .

[0066] The inverting input terminal of the second operational amplifier U2 is connected to the second end of the ninth resistor R9, the first end of the tenth resistor R10 and the first end of the twelfth capacitor C12; the non-inverting input terminal of the second operational amplifier U2 is connected to the second end of the eleventh resistor R11 and the first end of the thirteenth capacitor C13; the output terminal of the second operational amplifier U2 is connected to the second end of the signal extraction unit 202 through the thirteenth resistor R13.

[0067] The second end of the tenth resistor R10 is connected to the output end of the second operational amplifier U2.

[0068] A second end of the twelfth capacitor C12 is connected to the output end of the second operational amplifier U2.

[0069] A first end of the eleventh resistor R11 is connected to an external DC power source.

[0070] A second terminal of the thirteenth capacitor C13 is grounded.

[0071] A first end of the ninth resistor R9 is connected to a second end of the eleventh capacitor C11.

[0072] A first end of the eleventh capacitor C11 is connected to a first end of the twelfth resistor R12 and a second end of the signal reduction module 10 .

[0073] The second end of the twelfth resistor R12 is connected to the first end of the signal extraction unit 202 .

[0074] In actual use, the second operational amplifier U2 is used to invert and amplify the signal; specifically, the amplification factor depends on the ratio of the twelfth capacitor C12 to the eleventh capacitor C11; the second end of the signal conversion unit 201 outputs the signal to be demodulated, and the third end of the signal conversion unit 201 outputs the inverted amplified signal to be demodulated.

[0075] The signal extraction unit 202 includes an analog switch SW1 , a fourteenth resistor R14 , a fifteenth resistor R15 , a sixth resistor R16 , a seventeenth resistor R17 , a fourteenth capacitor C14 , and a fifteenth capacitor C15 .

[0076] The first end of the analog switch SW1 is connected to the second end of the signal conversion unit 201; the second end of the analog switch SW1 is connected to the third end of the signal conversion unit 201; the third end of the analog switch SW1 is connected to the first end of the fourteenth capacitor C14 and the external DC power supply; the fourth end of the analog switch SW1 is grounded; the fifth end of the analog switch SW1 is connected to the first end of the bias adjustment module 30 through the fourteenth resistor R14; the sixth end of the analog switch SW1 is connected to the first end of the fifteenth resistor R15.

[0077] A second terminal of the fourteenth capacitor C14 is grounded.

[0078] The second end of the fifteenth resistor R15 is connected to the first end of the sixteenth resistor R16 and the first end of the seventeenth resistor R17.

[0079] The second end of the sixteenth resistor R16 is connected to an external pulse modulation source, and is used to control the switching frequency of the analog switch SW1 according to the pulse modulation signal of the pulse modulation source.

[0080] A second terminal of the seventeenth resistor R17 is grounded.

[0081] A first end of the fifteenth capacitor C15 is connected to the first end of the bias adjustment module 30 ; and a second end of the fifteenth capacitor C15 is grounded.

[0082] In this embodiment, the first end of the analog switch SW1 is the first channel, the second end of the analog switch SW1 is the second channel, and the sixth end of the analog switch SW1 is the pulse modulation port.

[0083] In actual use, the voltage difference between the third and fourth terminals of the analog switch SW1 is the operating voltage of the analog switch SW1; the fifth terminal of the analog switch SW1 is the output port, and its output depends on whether the conduction channel of the analog switch SW1 is the first channel or the second channel; when the pulse modulation port is used, the first terminal of the analog switch SW1 is turned on to receive the signal to be demodulated; when the pulse modulation port is used, the second terminal of the analog switch SW1 is turned on to receive the inverted amplified signal to be demodulated.

[0084] Figure 4 The structure diagram of the bias adjustment module provided by the embodiment of the utility model is shown as follows: Figure 4 As shown:

[0085] The bias adjustment module 30 includes a third operational amplifier U3, an eighteenth resistor R18, a nineteenth resistor R19, a twentieth resistor R20, a twenty-first resistor R21, a sixteenth capacitor C16, a seventeenth capacitor C17, an eighteenth capacitor C18 and a nineteenth capacitor C19.

[0086] The inverting input terminal of the third operational amplifier U3 is connected to the second end of the eighteenth resistor R18, the first end of the nineteenth resistor R19 and the first end of the sixteenth capacitor C16; the non-inverting input terminal of the third operational amplifier U3 is connected to the second end of the twentieth resistor R20 and the first end of the seventeenth capacitor C17; the output terminal of the third operational amplifier U3 is connected to the first end of the twenty-first resistor R21, the second end of the nineteenth resistor R19 and the second end of the sixteenth capacitor C16.

[0087] A first end of the eighteenth resistor R18 is connected to a second end of the signal extraction module 20 through an eighteenth capacitor C18.

[0088] The second end of the twentieth resistor R20 is connected to an external DC power source.

[0089] A second terminal of the seventeenth capacitor C17 is grounded.

[0090] A second end of the twenty-first resistor R21 is grounded via the nineteenth capacitor C19.

[0091] In this embodiment, the demodulated signal received by the first end of the bias adjustment module 30 is a unidirectional pulse signal; the signal at the second end of the twenty-first resistor R21 is a bidirectional pulse signal; wherein, a unidirectional pulse refers to a pulse whose current direction does not change with time, and a bidirectional pulse refers to a pulse input including one forward pulse and one reverse pulse.

[0092] During actual use, the voltage at the non-inverting input terminal of the third operational amplifier U3 is a preset voltage, and the voltage at the inverting input terminal of the third operational amplifier U3 is a demodulated signal; when the demodulated signal is greater than the preset voltage, a reverse pulse is output; when the demodulated signal is less than the preset voltage, a forward pulse is output; the output forward pulse and reverse pulse together constitute a bidirectional pulse signal output from the second end of the twenty-first resistor R21.

[0093] The bias adjustment module 30 further includes: a fourth operational amplifier U4, a twenty-second resistor R22, a twenty-third resistor R23, a twenty-fourth resistor R24, a twenty-fifth resistor R25, a twenty-sixth resistor R26, a twenty-seventh resistor R27, a twentieth capacitor C20 and a twenty-first capacitor C21.

[0094] The inverting input terminal of the fourth operational amplifier U4 is connected to the second end of the twenty-second resistor R22; the non-inverting input terminal of the fourth operational amplifier U4 is connected to the second end of the twenty-third resistor R23 and the first end of the twenty-fourth resistor R24; the output terminal of the fourth operational amplifier U4 is connected to the second end of the twenty-fourth resistor R24 ​​and the first end of the twenty-fifth resistor R25.

[0095] A first end of the twenty-second resistor R22 is connected to a second end of the twenty-first resistor R21 .

[0096] The first end of the twenty-third resistor R23 is connected to the external DC power supply through the twenty-sixth resistor R26; the first end of the twenty-third resistor R23 is grounded through the twentieth capacitor C20.

[0097] The second end of the twenty-fifth resistor R25 is grounded through the twenty-seventh resistor R27; the second end of the twenty-fifth resistor R25 is grounded through the twenty-first capacitor C21; and the second end of the twenty-fifth resistor 25 is connected to an external microcontroller.

[0098] In actual use, the fourth operational amplifier U4 has an inverting input and performs positive feedback through the twenty-fourth resistor R24; the voltage at the output end of the fourth operational amplifier U4 depends on the voltage of the positive power pin and the negative power pin of the fourth operational amplifier U4, which can be set by a technician in this field according to actual conditions; the voltage at the in-phase input end of the fourth operational amplifier U4 is a preset voltage divider, and the voltage at the inverting input end of the fourth operational amplifier U4 is a bidirectional pulse signal; when the preset voltage divider is a positive voltage and the bidirectional pulse signal is less than the preset voltage divider, the second end of the twenty-fifth resistor 25 outputs a positive power supply voltage. voltage to an external microcontroller; at this time, when the bidirectional pulse signal is greater than the preset voltage divider, the preset voltage divider changes from a positive voltage to a negative voltage; when the preset voltage divider is a negative voltage and the bidirectional pulse signal is greater than the preset voltage divider, the second end of the twenty-fifth resistor 25 outputs a negative power supply voltage to an external microcontroller; at this time, when the bidirectional pulse signal is less than the preset voltage divider, the preset voltage divider changes from a negative voltage to a positive voltage; it should be noted that the negative power supply voltage and the positive power supply voltage output by the second end of the twenty-fifth resistor 25 are fixed values, and their values ​​depend on the applied voltages of the negative power supply pin and the positive power supply pin of the fourth operational amplifier U4.

[0099] The technical features involved in the embodiments of the present application can be combined with each other as long as there is no conflict between them, and can be applied independently in different embodiments as long as there is no dependence between them.

[0100] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Under the concept of the present application, the technical features in the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other changes in different aspects of the present application as described above, which are not provided in detail for the sake of simplicity. Although the present application has been described in detail with reference to the aforementioned embodiments, a person of ordinary skill in the art should understand that the technical solutions described in the aforementioned embodiments can still be modified, or some of the technical features can be replaced by equivalents. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A demodulation circuit, characterized in that: include: A signal reduction module, a signal extraction module and a bias adjustment module; The first end of the signal reduction module is connected to an external DC power supply and an external receiver, and is used to receive the signal to be demodulated; the second end of the signal reduction module is connected to the first end of the signal extraction module, and is used to output the reduced signal to be demodulated to the signal extraction module; The second end of the bias adjustment module is connected to an external microcontroller and is used to convert the demodulated signal into a recognizable signal of the microcontroller; The signal extraction module includes: a signal conversion unit and a signal extraction unit; The first end of the signal conversion unit serves as the first end of the signal extraction module and is connected to the second end of the signal reduction module; the second end and the third end of the signal conversion unit are connected to the first end and the second end of the signal extraction unit, and are used to convert the reduced signal to be demodulated from a single-ended signal to a double-ended signal and output it to the signal extraction unit; The third end of the signal extraction unit serves as the second end of the signal extraction module, is connected to the first end of the bias adjustment module, and is used to output the demodulated signal to the bias adjustment module; The signal extraction unit includes: an analog switch, a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, a fourteenth capacitor and a fifteenth capacitor; The first end of the analog switch is connected to the second end of the signal conversion unit; the second end of the analog switch is connected to the third end of the signal conversion unit; the third end of the analog switch is connected to the first end of the fourteenth capacitor and the external DC power supply; the fourth end of the analog switch is grounded; the fifth end of the analog switch is connected to the first end of the bias adjustment module through the fourteenth resistor; the sixth end of the analog switch is connected to the first end of the fifteenth resistor; The second end of the fourteenth capacitor is grounded; The second end of the fifteenth resistor is connected to the first end of the sixteenth resistor and the first end of the seventeenth resistor; The second end of the sixteenth resistor is connected to an external pulse modulation source, and is used to control the switching frequency of the analog switch according to the pulse modulation signal of the pulse modulation source; The second end of the seventeenth resistor is grounded; The first end of the fifteenth capacitor is connected to the first end of the bias adjustment module; the second end of the fifteenth capacitor is grounded; The signal extraction module is used to extract the signal to be demodulated as a demodulation signal according to the switching frequency of the analog switch.

2. The demodulation circuit according to claim 1, characterized in that: The signal reduction module includes a signal input unit and a signal reduction unit; The first input end of the signal input unit is connected to the external DC power supply for obtaining the working voltage; the second input end of the signal input unit is connected to the external receiver for receiving the signal to be demodulated; the first output end of the signal input unit is connected to the first input end of the signal reduction unit; the second output end of the signal input unit is connected to the second input end of the signal reduction unit; The output end of the signal reduction unit is connected to the first end of the signal extraction module, and is used to output the reduced signal to be demodulated.

3. The demodulation circuit according to claim 2, characterized in that: The signal input unit includes: a first resistor, a second resistor, a third resistor, a fourth resistor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor and a fifth capacitor; The first end of the first resistor is connected to the external DC power supply; the second end of the first resistor is connected to the first end of the first capacitor and the first end of the second capacitor; The second end of the first capacitor is grounded; The first end of the second resistor is connected to the external receiver; the second end of the second resistor is connected to the second end of the second capacitor and the first end of the third capacitor; The second end of the third capacitor is grounded; The first end of the fourth capacitor is connected to the first end of the second capacitor; the second end of the fourth capacitor is connected to the first input end of the signal reduction unit through the third resistor; The first end of the fifth capacitor is connected to the second end of the second capacitor; the second end of the fifth capacitor is connected to the second input end of the signal reduction unit through the fourth resistor.

4. The demodulation circuit according to claim 2, characterized in that: The signal reduction unit includes: a first operational amplifier, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a sixth capacitor, a seventh capacitor, an eighth capacitor, a ninth capacitor and a tenth capacitor; The inverting input terminal of the first operational amplifier is connected to the first output terminal of the signal input unit, the first end of the fifth resistor and the first end of the sixth capacitor; the non-inverting input terminal of the first operational amplifier is connected to the second output terminal of the signal input unit and the first end of the sixth resistor; the negative power supply pin of the first operational amplifier is grounded; the positive power supply pin of the first operational amplifier is connected to the first end of the seventh capacitor and the first end of the eighth capacitor; the output terminal of the first operational amplifier is connected to the first end of the signal extraction module; The second end of the fifth resistor is connected to the output end of the first operational amplifier; The second end of the sixth capacitor is connected to the output end of the first operational amplifier; The second end of the sixth resistor is connected to the first end of the ninth capacitor, the first end of the tenth capacitor, the second end of the seventh resistor and the first end of the eighth resistor; The second end of the ninth capacitor is connected to the second end of the tenth capacitor and the second end of the eighth resistor; The first end of the seventh resistor is connected to the external DC power supply; A second end of the eighth resistor is grounded.

5. The demodulation circuit according to claim 1, characterized in that: The signal conversion unit includes: a second operational amplifier, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a thirteenth resistor, an eleventh capacitor, a twelfth capacitor and a thirteenth capacitor; The inverting input terminal of the second operational amplifier is connected to the second end of the ninth resistor, the first end of the tenth resistor and the first end of the twelfth capacitor; the non-inverting input terminal of the second operational amplifier is connected to the second end of the eleventh resistor and the first end of the thirteenth capacitor; the output terminal of the second operational amplifier is connected to the second end of the signal extraction unit through the thirteenth resistor; The second end of the tenth resistor is connected to the output end of the second operational amplifier; The second end of the twelfth capacitor is connected to the output end of the second operational amplifier; The first end of the eleventh resistor is connected to the external DC power supply; The second end of the thirteenth capacitor is grounded; The first end of the ninth resistor is connected to the second end of the eleventh capacitor; The first end of the eleventh capacitor is connected to the first end of the twelfth resistor and the second end of the signal reduction module; The second end of the twelfth resistor is connected to the first end of the signal extraction unit.

6. The demodulation circuit according to claim 1, characterized in that: The bias adjustment module includes: a third operational amplifier, an eighteenth resistor, a nineteenth resistor, a twentieth resistor, a twenty-first resistor, a sixteenth capacitor, a seventeenth capacitor, an eighteenth capacitor and a nineteenth capacitor; The inverting input terminal of the third operational amplifier is connected to the second end of the eighteenth resistor, the first end of the nineteenth resistor and the first end of the sixteenth capacitor; the non-inverting input terminal of the third operational amplifier is connected to the second end of the twentieth resistor and the first end of the seventeenth capacitor; the output terminal of the third operational amplifier is connected to the first end of the twenty-first resistor, the second end of the nineteenth resistor and the second end of the sixteenth capacitor; The first end of the eighteenth resistor is connected to the second end of the signal extraction module through the eighteenth capacitor; The second end of the 20th resistor is connected to the external DC power supply; The second end of the seventeenth capacitor is grounded; A second end of the twenty-first resistor is grounded through the nineteenth capacitor.

7. The demodulation circuit according to claim 6, characterized in that: The bias adjustment module further includes: a fourth operational amplifier, a twenty-second resistor, a twenty-third resistor, a twenty-fourth resistor, a twenty-fifth resistor, a twenty-sixth resistor, a twenty-seventh resistor, a twentieth capacitor, and a twenty-first capacitor; The inverting input terminal of the fourth operational amplifier is connected to the second end of the twenty-second resistor; the non-inverting input terminal of the fourth operational amplifier is connected to the second end of the twenty-third resistor and the first end of the twenty-fourth resistor; the output terminal of the fourth operational amplifier is connected to the second end of the twenty-fourth resistor and the first end of the twenty-fifth resistor; The first end of the twenty-second resistor is connected to the second end of the twenty-first resistor; The first end of the 24th resistor is connected to the external DC power supply through the 26th resistor; the first end of the 24th resistor is grounded through the 20th capacitor; The second end of the 25th resistor is grounded through the 27th resistor; the second end of the 25th resistor is grounded through the 21st capacitor; the second end of the 25th resistor is connected to the external microcontroller.

8. A wireless charging device, characterized in that: The demodulation circuit comprises any one of claims 1 to 7.

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