Undervoltage and overvoltage protection circuit and electronic equipment

By designing an undervoltage and overvoltage protection circuit and using a voltage divider circuit and an operational amplifier to determine the input voltage, the overvoltage and undervoltage damage caused by wrong plugging of the power adapter is solved, and the stable operation and high reliability of electrical equipment are achieved.

CN222638150UActive Publication Date: 2025-03-18SHENZHEN WEIBU INFORMATION
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Patent Information

Application Number
CN202420455838.9
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-03-11
Publication Date
2025-03-18
Estimated Expiration
2034-03-11

AI Technical Summary

Technical Problem

The prior art is difficult to prevent overvoltage and undervoltage damage to electrical equipment caused by incorrect insertion of power adapters.

Method used

An undervoltage and overvoltage protection circuit is designed to divide the input voltage to the operational amplifier through the first voltage divider circuit and the second voltage divider circuit. The operational amplifier determines whether the voltage is too high or too low, and protects it through the MOS tube and the alarm circuit.

Benefits of technology

It effectively prevents overvoltage and undervoltage damage caused by wrong insertion of the power adapter, and solves the damage problem of the equipment when the power supply voltage is unstable. The circuit is easy to implement, has strong anti-interference and high reliability.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model discloses an undervoltage and overvoltage protection circuit and electronic equipment, the circuit comprises a first voltage division circuit, a second voltage division circuit, an operational amplifier, an MOS tube PQ1, an MOS tube PQ2, an MOS tube QP1 and a reference voltage, the first voltage division circuit comprises a resistor PR6 and a resistor PR7, the second voltage division circuit comprises a resistor PR9 and a resistor PR10, a third pin of the operational amplifier is connected with the resistor PR6 and the resistor PR7, and the resistor PR9 is connected with the resistor PR10. The second pin is connected with a reference voltage, the fifth pin is connected with the reference voltage, the sixth pin is respectively connected with a resistor PR9 and a resistor PR10, the first pin is connected with the first pin of the MOS tube PQ1, the third pin of the MOS tube PQ2 is connected with the second pin of the MOS tube PQ1, the first pin of the MOS tube PQ2 is connected with the seventh pin of the operational amplifier, the second pin is grounded, the grid electrode of the MOS tube QP1 is connected with the third pin of the MOS tube PQ1, and the grid electrode of the MOS tube QP1 is connected with the fourth pin of the MOS tube PQ1. The problem that equipment is damaged when the power supply voltage is unstable and excessively fluctuates is solved, the circuit is easy to implement, the anti-interference performance is high, and the reliability is high.
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Description

Technical Field

[0001] The utility model relates to the technical field of protection circuits, in particular to an undervoltage and overvoltage protection circuit and electronic equipment using the undervoltage and overvoltage protection circuit. Background Art

[0002] As electronic products become more and more popular, the requirements for the stability and reliability of the power supply system of electronic products are getting higher and higher. With the development of science and technology, people are pursuing a higher quality of life. There are more and more mobile electrical devices, and the input voltages of various electrical devices are also different. At present, there is an urgent need for a circuit that can prevent the power adapter from being plugged in incorrectly, causing overvoltage and undervoltage to damage electrical devices. Utility Model Content

[0003] In view of the above technical problems, the utility model provides an undervoltage and overvoltage protection circuit and electronic equipment which can prevent the power adapter from being plugged in incorrectly, causing overvoltage and undervoltage to damage the electrical equipment.

[0004] One embodiment of the utility model provides an undervoltage and overvoltage protection circuit, including a first voltage divider circuit, a second voltage divider circuit, an operational amplifier, a MOS tube PQ1, a MOS tube PQ2, a MOS tube QP1 and a reference voltage, wherein the first voltage divider circuit includes a resistor PR6 and a resistor PR7, the second voltage divider circuit includes a resistor PR9 and a resistor PR10, the third pin of the operational amplifier is respectively connected to the resistor PR6 and the resistor PR7, the second pin of the operational amplifier is connected to the reference voltage, the fifth pin of the operational amplifier is connected to the reference voltage, the sixth pin is respectively connected to the resistor PR9 and the resistor PR10, the first pin of the operational amplifier is connected to the first pin of the MOS tube PQ1, the third pin of the MOS tube PQ2 is connected to the second pin of the MOS tube PQ1, the first pin of the MOS tube PQ2 is connected to the seventh pin of the operational amplifier, the second pin is grounded, and the gate of the MOS tube QP1 is connected to the third pin of the MOS tube PQ1.

[0005] Optionally, the circuit also includes a power supply module for providing a reference voltage, the power supply module includes a voltage regulator Q1, a resistor PR1, a capacitor PC4 and a capacitor PC9, the cathode of the voltage regulator Q1 is connected to one end of the resistor PR1, the reference electrode of the voltage regulator Q1 is respectively connected to one end of the resistor PR1, the second pin and the fifth pin of the operational amplifier, and one end of the capacitor PC4 and the capacitor PC9, and the other ends of the capacitor PC4 and the capacitor PC9 are grounded respectively.

[0006] Optionally, the circuit further includes a resistor PR2 and a resistor PR5, one end of the resistor PR2 and the resistor PR5 are respectively connected to the first pin of the operational amplifier and the first pin of the MOS tube PQ1.

[0007] Optionally, the circuit further includes a resistor PR3 and a resistor PR4, one end of each of which is connected to the seventh pin of the operational amplifier and the first pin of the MOS tube PQ2, respectively.

[0008] Optionally, the circuit also includes an undervoltage alarm circuit and a controller, the undervoltage alarm circuit includes a resistor PR11, a MOS tube PQ3 and a resistor PR12, the first pin of the MOS tube PQ3 is connected to the first pin of the operational amplifier through the resistor PR11, the second pin of the MOS tube PQ3 is grounded, and the third pin is connected to the resistor PR12 and the controller to transmit the undervoltage signal to the controller.

[0009] Optionally, the circuit also includes an overvoltage alarm circuit, which includes a resistor PR13, a MOS tube PQ4 and a resistor PR14, wherein the first pin of the MOS tube PQ4 is connected to the seventh pin of the operational amplifier through the resistor PR14, the second pin of the MOS tube PQ4 is grounded, and the third pin is connected to the resistor PR13 and the controller to transmit the overvoltage signal to the controller.

[0010] Optionally, a shutdown time is pre-set in the controller. After receiving an overvoltage signal from an overvoltage alarm circuit or an undervoltage signal from an undervoltage alarm circuit, the controller controls the undervoltage and overvoltage protection circuit to automatically shut down after the shutdown time is reached.

[0011] Optionally, the circuit also includes a charging circuit, which includes a charging management chip and a MOS tube PQ5, the source of the MOS tube PQ5 is respectively connected to the SYS pin and BATT_SYSIN of the charging management chip, the BATT_SYSIN supplies power to the system through a battery, the gate of the MOS tube PQ5 is connected to the BATDRV pin of the charging management chip, the drain of the MOS tube PQ5 is connected to the SRP pin of the charging management chip through a resistor R14, and is connected to the SRN pin of the charging management chip through resistors R15 and R16.

[0012] Another embodiment of the present invention further provides an electronic device, comprising any of the above-mentioned undervoltage and overvoltage protection circuits.

[0013] The technical solution provided in the embodiment of the utility model includes undervoltage protection and overvoltage protection circuits. The operational amplifier can be used to determine whether the input voltage is too high or too low, and an alarm circuit can be used to give a prompt, thereby solving the problem of equipment damage caused by excessive power supply voltage fluctuations. The circuit is easy to implement, has strong anti-interference ability, and is highly reliable. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 The utility model is a circuit diagram of an undervoltage and overvoltage protection circuit.

[0015] Figure 2 This is a circuit diagram of the power module of the utility model.

[0016] Figure 3 The utility model is a circuit diagram of an undervoltage alarm circuit.

[0017] Figure 4 The utility model is a circuit diagram of an overvoltage alarm circuit.

[0018] Figure 5 The utility model is a circuit diagram of a charging circuit. DETAILED DESCRIPTION

[0019] The following will be combined with the drawings in the embodiments of the utility model to clearly and completely describe the technical solutions in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments of the utility model, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the utility model.

[0020] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "connected" and "connection" should be understood in a broad sense, for example, it can be directly connected, or indirectly connected through an intermediate medium, or it can be the internal connection of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances. In addition, the technical features involved in the different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0021] The utility model provides an undervoltage and overvoltage protection circuit, please refer to Figure 1As shown, the circuit includes a first voltage divider circuit, a second voltage divider circuit, an operational amplifier, a MOS tube PQ1, a MOS tube PQ2, a MOS tube QP1 and a reference voltage. The first voltage divider circuit includes a resistor PR6 and a resistor PR7, and the second voltage divider circuit includes a resistor PR9 and a resistor PR10. The operational amplifier includes U1A and U1B. The third pin of U1A is respectively connected to one end of the resistor PR6 and one end of the resistor PR7, the other end of the resistor PR6 is connected to +VDC-IN, and the other end of the resistor PR7 is connected to ground. The second pin of the operational amplifier U1A is connected to the reference voltage 2P5V-REF, the fifth pin of the operational amplifier U1B is connected to the reference voltage 2P5V-REF, and the sixth pin is respectively connected to one end of the resistor PR9 and one end of the resistor PR10, the other end of the resistor PR9 is connected to +VDC-IN, and the other end of the resistor PR10 is grounded. The first pin of the operational amplifier U1A is connected to the first pin of the MOS tube PQ1, the third pin of the MOS tube PQ2 is connected to the second pin of the MOS tube PQ1, the first pin of the MOS tube PQ2 is connected to the seventh pin of the operational amplifier, the second pin is grounded, and the gate of the MOS tube QP1 is connected to the third pin of the MOS tube PQ1.

[0022] Specifically, the circuit further includes a MOS tube PQ2, a third pin of the MOS tube PQ2 is connected to the second pin of the MOS tube PQ1, a first pin of the MOS tube PQ2 is connected to the seventh pin of the operational amplifier U1B, and a second pin of the MOS tube PQ2 is grounded. The circuit further includes a resistor PR2, a resistor PR5, a resistor PR3 and a resistor PR4, one end of the resistor PR2 and the resistor PR5 are respectively connected to the first pin of the operational amplifier U1A and the first pin of the MOS tube PQ1, the other end of the resistor PR2 is grounded, and the other end of the resistor PR5 is connected to +VDC-IN. One end of the resistor PR3 and the resistor PR4 are respectively connected to the seventh pin of the operational amplifier U1B and the first pin of the MOS tube PQ2, the other end of the resistor PR3 is connected to +VDC-IN, and the other end of the resistor PR4 is grounded.

[0023] The circuit also includes a power supply module for providing a reference voltage. Figure 2As shown, the power supply module includes a voltage regulator Q1, a resistor PR1, a capacitor PC4 and a capacitor PC9, which are used to generate a reference voltage. The voltage regulator Q1 can adopt a TL431 chip. The anode of the voltage regulator Q1 is grounded, the cathode is connected to one end of the resistor PR1, and the other end of the resistor PR1 is connected to +5VS. The reference electrode of the voltage regulator Q1 is respectively connected to one end of the resistor PR1, the second pin and the fifth pin of the operational amplifier, and one end of the capacitor PC4 and the capacitor PC9. The other ends of the capacitor PC4 and the capacitor PC9 are respectively grounded. The power supply module is connected to the second pin and the fifth pin of the operational amplifier to provide a reference voltage.

[0024] In one embodiment of the present invention, the undervoltage and overvoltage protection circuit also includes an undervoltage alarm circuit. Figure 3 As shown, the undervoltage alarm circuit includes a resistor PR11, a MOS tube PQ3 and a resistor PR12. The first pin of the MOS tube PQ3 is connected to the first pin of the operational amplifier U1A through the resistor PR11, the second pin is grounded, and the third pin is respectively connected to the resistor PR12 and the controller, and is used to transmit the undervoltage signal to the controller. The shutdown time is pre-set in the controller, and the controller controls the circuit to automatically shut down after the shutdown time is reached according to the received undervoltage signal.

[0025] In one embodiment of the present invention, the undervoltage and overvoltage protection circuit also includes an overvoltage alarm circuit. Figure 4 As shown, the overvoltage alarm circuit includes a resistor PR13, a MOS tube PQ4 and a resistor PR14, the first pin of the MOS tube PQ4 is connected to the seventh pin of the operational amplifier U1B through the resistor PR14, the second pin of the MOS tube PQ4 is grounded, and the third pin is respectively connected to the resistor PR13 and the controller.

[0026] The circuit also includes a charging circuit, please refer to Figure 5 As shown, the charging circuit includes a charging management chip and a MOS tube PQ5, the source of the MOS tube PQ5 is respectively connected to the SYS pin and BATT_SYSIN of the charging management chip, the BATT_SYSIN supplies power to the system through a battery, the gate of the MOS tube PQ5 is connected to the BATDRV pin of the charging management chip, the drain of the MOS tube PQ5 is connected to the SRP pin of the charging management chip through a resistor R14, and is connected to the SRN pin of the charging management chip through resistors R15 and R16.

[0027] The working principle of the utility model is as follows: when there is power input, the operating voltage is provided for the operational amplifier U1 and the voltage regulator Q1. PR1 is connected to the cathode and sampling terminal of the voltage regulator Q1, and a reference voltage (2.5V) is provided for the in-phase input terminal (fifth pin) and the inverting input terminal (second pin) of the operational amplifier U1. When the power supply voltage is lower than 15.6V, the in-phase input terminal (third pin) of the operational amplifier U1A is powered by the voltage divider of the resistors PR6 and PR7. When the voltage of the third pin of the operational amplifier U1A is lower than the reference voltage (2.5V) of the second pin of the operational amplifier U1A. The first pin of the operational amplifier U1A outputs a low level, the MOS tubes PQ1 and QP1 are cut off, and the power supply +VDC_OUT has no voltage output. At this time, the battery supplies power to the system BATT_SYSIN through the MOS tube PQ5 (charging circuit). When the undervoltage signal UVP_DETECT is low, a low level is applied to the MOS tube PQ3 through the resistor PR11, and the MOS tube PQ3 stops loading. When the signal CPU_UVP_DETECT is high, the controller (CPU) detects that GPP_D7 is high, and the device issues an undervoltage alarm. After the preset shutdown time (for example, three minutes) is reached, the system will automatically shut down. The level of undervoltage protection can be adjusted by adjusting the resistance values ​​of resistors PR6 and PR7. When the power supply voltage is higher than 23V, the circuit supplies power to the inverting input terminal of the operational amplifier through the resistor PR9 and the resistor PR10. When the voltage of the sixth pin of the operational amplifier U1B is higher than the voltage of the fifth pin of the operational amplifier U1B (2.5V), the seventh pin of the operational amplifier U1B outputs a low level, and the MOS tubes PQ2, MOS tubes PQ1 and MOS tube QP1 are cut off. The power supply +VDC_OUT has no voltage output. At this time, the battery supplies power to the system BATT_SYSIN through the MOS tube PQ5. When the overvoltage signal OVP_DETECT is high, a low-high level is applied to the MOS tube PQ4 through the resistor PR14, the MOS tube PQ4 is turned on, the signal CPU_OVP_DETECT is low, and when the controller (CPU) detects that GPP_D8 is low, the device issues an overvoltage alarm, and the system automatically shuts down after the preset shutdown time (for example, three minutes). The overvoltage protection level can be adjusted by adjusting the resistance values ​​of the resistors PR9 and PR10.

[0028] When the input power supply is higher than 15.6V and lower than 23V, MOS tubes PQ1, PQ2 and QP1 are turned on. At this time, the power supply +VDC_OUT output voltage is between 15.6V and 23V.

[0029] The utility model also provides an electronic device, comprising the undervoltage and overvoltage protection circuit described in any one of the above embodiments.

[0030] The undervoltage and overvoltage protection circuit and the electronic equipment using the undervoltage and overvoltage protection circuit described in the utility model include the undervoltage protection and overvoltage protection circuits, which can judge whether the input voltage is too high or too low through the operational amplifier, and give a prompt through the alarm circuit, thereby solving the problem of equipment damage caused by excessive fluctuation of the power supply voltage. The circuit is easy to implement, has strong anti-interference performance and high reliability.

[0031] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. An undervoltage and overvoltage protection circuit, characterized in that: The invention comprises a first voltage-dividing circuit, a second voltage-dividing circuit, an operational amplifier, a MOS tube PQ1, a MOS tube PQ2, a MOS tube QP1 and a reference voltage. The first voltage-dividing circuit comprises a resistor PR6 and a resistor PR7, the second voltage-dividing circuit comprises a resistor PR9 and a resistor PR10, the third pin of the operational amplifier is respectively connected to the resistor PR6 and the resistor PR7, the second pin of the operational amplifier is connected to the reference voltage, the fifth pin of the operational amplifier is connected to the reference voltage, the sixth pin is respectively connected to the resistor PR9 and the resistor PR10, the first pin of the operational amplifier is connected to the first pin of the MOS tube PQ1, the third pin of the MOS tube PQ2 is connected to the second pin of the MOS tube PQ1, the first pin of the MOS tube PQ2 is connected to the seventh pin of the operational amplifier, the second pin is grounded, and the gate of the MOS tube QP1 is connected to the third pin of the MOS tube PQ1.

2. The undervoltage and overvoltage protection circuit according to claim 1, characterized in that: The circuit also includes a power supply module for providing a reference voltage, the power supply module includes a voltage regulator Q1, a resistor PR1, a capacitor PC4 and a capacitor PC9, the cathode of the voltage regulator Q1 is connected to one end of the resistor PR1, the reference electrode of the voltage regulator Q1 is respectively connected to one end of the resistor PR1, the second pin and the fifth pin of the operational amplifier, and one end of the capacitor PC4 and the capacitor PC9, and the other ends of the capacitor PC4 and the capacitor PC9 are grounded respectively.

3. The undervoltage and overvoltage protection circuit according to claim 2, characterized in that: The circuit further includes a resistor PR2 and a resistor PR5, one end of each of which is connected to a first pin of the operational amplifier and a first pin of the MOS tube PQ1, respectively.

4. The undervoltage and overvoltage protection circuit according to claim 3, characterized in that: The circuit further includes a resistor PR3 and a resistor PR4, one end of each of which is connected to the seventh pin of the operational amplifier and the first pin of the MOS tube PQ2 respectively.

5. The undervoltage and overvoltage protection circuit according to claim 1, characterized in that: The circuit also includes an undervoltage alarm circuit and a controller. The undervoltage alarm circuit includes a resistor PR11, a MOS tube PQ3 and a resistor PR12. The first pin of the MOS tube PQ3 is connected to the first pin of the operational amplifier through the resistor PR11, the second pin of the MOS tube PQ3 is grounded, and the third pin is connected to the resistor PR12 and the controller to transmit the undervoltage signal to the controller.

6. The undervoltage and overvoltage protection circuit according to claim 5, characterized in that: The circuit also includes an overvoltage alarm circuit, which includes a resistor PR13, a MOS tube PQ4 and a resistor PR14. The first pin of the MOS tube PQ4 is connected to the seventh pin of the operational amplifier through the resistor PR14, the second pin of the MOS tube PQ4 is grounded, and the third pin is connected to the resistor PR13 and the controller to transmit the overvoltage signal to the controller.

7. The undervoltage and overvoltage protection circuit according to claim 6, characterized in that: The controller is pre-set with a shutdown time. After receiving an overvoltage signal from an overvoltage alarm circuit or an undervoltage signal from an undervoltage alarm circuit, the controller controls the undervoltage and overvoltage protection circuit to automatically shut down after the shutdown time is reached.

8. The undervoltage and overvoltage protection circuit according to claim 1, characterized in that: The circuit also includes a charging circuit, which includes a charging management chip and a MOS tube PQ5, the source of the MOS tube PQ5 is respectively connected to the SYS pin and BATT_SYSIN of the charging management chip, the BATT_SYSIN supplies power to the system through a battery, the gate of the MOS tube PQ5 is connected to the BATDRV pin of the charging management chip, the drain of the MOS tube PQ5 is connected to the SRP pin of the charging management chip through a resistor R14, and is connected to the SRN pin of the charging management chip through resistors R15 and R16.

9. An electronic device, characterized in that: The invention comprises the undervoltage and overvoltage protection circuit as described in any one of claims 1 to 8.