Solar cell, cell assembly and photovoltaic system

Abstract

The utility model is suitable for the technical field of solar cells, and provides a solar cell, a cell module and a photovoltaic system. The solar cell comprises an interface passivation layer, a conductive layer and a carrier selective barrier structure which are sequentially stacked on a silicon substrate, a plurality of first conductive regions and a plurality of second conductive regions are formed on the interface passivation layer, the first conductive regions and the second conductive regions are arranged in a staggered mode, and the conductive layer comprises a first doping layer and a second doping layer. The first conductive region and the second conductive region are arranged on the substrate; a groove is formed in the carrier selective barrier structure, the groove corresponds to the first conductive region, the solar cell further comprises a first electrode, and the first electrode penetrates through the groove to be in contact with the first doping layer; and the carrier selective barrier structure corresponding to the second conductive region is used as a second electrode of the solar cell. Therefore, electric leakage can be reduced, the performance of the battery is improved, additional electrode slurry is saved, and the cost is reduced.

Description

Technical Field

[0001] The present application belongs to the technical field of solar cells, and in particular to a solar cell, a battery assembly and a photovoltaic system. Background Art

[0002] In related technologies, in order to reduce the compound leakage problem caused by direct contact between metal electrodes and silicon semiconductors, a layer of transparent conductive metal oxide (TCO) film is often plated on the surface of the battery to enhance carrier transport, and then the metal electrode is printed. However, in IBC batteries, the P region and the N region are on the same surface. If the TCO is not completely removed at the contact between the P region and the N region, the P region and the N region will be connected, resulting in the recombination of electrons and holes, leakage, and affecting battery efficiency. Based on this, how to reduce the leakage caused by recombination in solar cells has become an urgent problem to be solved. Utility Model Content

[0003] The present application provides a solar cell, a battery assembly and a photovoltaic system, aiming to solve the problem of how to reduce the leakage phenomenon caused by recombination in solar cells.

[0004] The solar cell provided in the present application comprises an interface passivation layer, a conductive layer and a carrier selective blocking structure which are sequentially stacked on a silicon substrate, wherein the interface passivation layer is formed with a plurality of first conductive regions and a plurality of second conductive regions, wherein the first conductive regions and the second conductive regions are arranged alternately, and the conductive layer comprises a first doped layer and a second doped layer, which are respectively located in the first conductive region and the second conductive region; the carrier selective blocking structure is formed with a groove, wherein the groove corresponds to the first conductive region, and the solar cell further comprises a first electrode, wherein the first electrode passes through the groove and contacts the first doped layer; and the carrier selective blocking structure corresponding to the second conductive region serves as the second electrode of the solar cell.

[0005] Specifically, the carrier selective blocking structure includes a silicon oxide tunneling layer and a titanium nitride layer sequentially stacked on the conductive layer.

[0006] Specifically, the thickness of the silicon oxide tunneling layer is less than or equal to 3 nm.

[0007] Specifically, the thickness of the titanium nitride layer is 1 nm-350 nm.

[0008] Specifically, the first electrode and the carrier selective blocking structure are spaced apart from each other.

[0009] Specifically, a projection of the first electrode on the interface passivation layer along the thickness direction of the solar cell is located in the middle of the first conductive region.

[0010] The battery assembly provided in the present application includes any of the above-mentioned solar cells.

[0011] The photovoltaic system provided in the present application includes any one of the above-mentioned battery components.

[0012] The solar cell, battery module and photovoltaic system of the embodiment of the present application use the carrier selective blocking structure to form a good ohmic contact with the second doped layer, so as to transfer the second carrier from the second doped layer to the titanium nitride layer. At the same time, the interface between the stacked structure and the first doped layer shows a large valence band offset, which can prevent the first carrier from being transferred from the first doped layer to the titanium nitride layer, thereby reducing the leakage phenomenon caused by the recombination. In this way, while reducing leakage and improving battery performance, it is possible to ensure that the holes in the first doped layer are transmitted through the first electrode, and the second carriers of the second doped layer are transmitted through the corresponding carrier selective blocking structure as the second electrode, thereby eliminating the need for additional electrode slurry, which is conducive to reducing costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 is a schematic structural diagram of a solar cell according to an embodiment of the present application;

[0014] Figure 2 is a schematic flow chart of a method for manufacturing a solar cell according to an embodiment of the present application;

[0015] Figure 3 is a schematic flow chart of a method for manufacturing a solar cell according to an embodiment of the present application;

[0016] Description of main component symbols:

[0017] The solar cell 10 , the silicon substrate 11 , the interface passivation layer 12 , the first doping layer 131 , the second doping layer 132 , the carrier selective blocking structure 14 , the groove 140 , the silicon oxide tunneling layer 141 , the titanium nitride layer 142 , and the first electrode 15 . DETAILED DESCRIPTION

[0018] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements with the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application, and should not be construed as limiting the present application. In addition, it should be understood that the specific embodiments described herein are only used to explain the present application and are not intended to limit the present application.

[0019] In the description of the present application, it should be understood that the terms "length", "width", "up", "down", "left", "right", "horizontal", "top", "bottom", etc., indicating the orientation or position relationship are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0020] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of this application, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0021] In the description of this application, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, an electrical connection, or mutual communication; it can be a direct connection, or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0022] In the present application, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may include that the first and second features are in direct contact, or may include that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, a first feature being "above", "above" and "above" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is higher in level than the second feature. A first feature being "below", "below" and "below" a second feature includes that the first feature is directly below and obliquely below the second feature, or simply indicates that the first feature is lower in level than the second feature.

[0023] The disclosure below provides many different embodiments or examples to realize the different structures of the present application. In order to simplify the disclosure of the present application, the parts and settings of specific examples are described below. Of course, they are only examples, and the purpose is not to limit the present application. In addition, the present application can repeat reference numbers and / or reference letters in different examples, and this repetition is for the purpose of simplification and clarity, and does not indicate the relationship between the various embodiments and / or settings discussed in itself. In addition, the various specific processes and examples of materials provided by the present application, but those of ordinary skill in the art can be aware of the application of other processes and / or the use scenarios of other materials.

[0024] In the present application, a carrier selective blocking structure is used to form a good ohmic contact with the second doped layer, so that the second carrier is transferred from the second doped layer to the titanium nitride layer. At the same time, the interface between the stacked structure and the first doped layer shows a large valence band offset, which can prevent the first carrier from being transferred from the first doped layer to the titanium nitride layer, thereby reducing the leakage phenomenon caused by the recombination. In this way, while reducing leakage and improving battery performance, it is possible to ensure that the holes in the first doped layer are transmitted through the first electrode, and the second carriers of the second doped layer are transmitted through the corresponding carrier selective blocking structure as the second electrode, thereby eliminating the need for additional electrode slurry, which is beneficial to reducing costs.

[0025] Embodiment 1

[0026] See also Figure 1 The solar cell 10 of the embodiment of the present application includes an interface passivation layer 12, a conductive layer and a carrier selective blocking structure 14 which are sequentially stacked on a silicon substrate 11, the interface passivation layer 12 is formed with a plurality of first conductive regions and a plurality of second conductive regions, the first conductive regions and the second conductive regions are arranged alternately, the conductive layer includes a first doping layer 131 and a second doping layer 132, which are respectively located in the first conductive region and the second conductive region; the carrier selective blocking structure 14 is formed with a groove 140, the groove 140 corresponds to the first conductive region, the solar cell 10 also includes a first electrode 15, the first electrode 15 passes through the groove 140 and contacts the first doping layer 131; the carrier selective blocking structure 14 corresponding to the second conductive region serves as the second electrode of the solar cell 10.

[0027] The solar cell 10 of the embodiment of the present application uses the carrier selective blocking structure 14 to form a good ohmic contact with the second doping layer 132, so as to transfer the second carrier from the second doping layer 132 to the titanium nitride layer 142. At the same time, the interface between the stacked structure and the first doping layer 131 shows a large valence band offset, which can prevent the first carrier from being transferred from the first doping layer 131 to the titanium nitride layer 142, thereby reducing the leakage phenomenon caused by the recombination. In this way, while reducing leakage and improving battery performance, it is possible to ensure that the holes in the first doping layer 131 are transmitted through the first electrode 15, and the second carriers of the second doping layer 132 are transmitted through the corresponding carrier selective blocking structure 14 as the second electrode, thereby eliminating the need for additional electrode slurry, which is conducive to reducing costs.

[0028] Specifically, the silicon substrate 11 may be a P-type silicon substrate 11 or an N-type silicon substrate 11 .

[0029] Specifically, the interface passivation layer 12 may cover the entire area of ​​the back side of the silicon substrate 11 , or may cover a partial area of ​​the back side.

[0030] Specifically, the interface passivation layer 12 includes a silicon oxide layer, so that the dangling bonds on the surface of the silicon substrate 11 can be reduced or even eliminated, thereby reducing interface recombination, which is beneficial to improving the photoelectric conversion efficiency of the battery.

[0031] It is understood that in other embodiments, the interface passivation layer 12 may also include a hydrogenated polysilicon layer. The specific form of the interface passivation layer 12 is not limited herein.

[0032] Specifically, the interface passivation layer 12 can be prepared by a PECVD process. In this way, the interface passivation layer 12 has better uniformity and better quality. It can be understood that in other embodiments, the interface passivation layer 12 can also be prepared by a thermal oxidation process, a PVD process or other processes, which are not limited here.

[0033] Specifically, “the first conductive regions and the second conductive regions are alternately arranged” means that a second conductive region is formed between two adjacent first conductive regions, and a first conductive region is formed between two adjacent second conductive regions.

[0034] Specifically, the first doped layer 131 includes at least one of a first doped polysilicon layer and a first doped intrinsic silicon layer. For example, the first doped layer 131 includes a first doped polysilicon layer; for another example, the first doped layer 131 includes a first doped intrinsic silicon layer; for another example, the first doped layer 131 includes a first doped polysilicon layer and a first doped intrinsic silicon layer.

[0035] Specifically, the second doped layer 132 includes at least one of a second doped polysilicon layer and a second doped intrinsic silicon layer. For example, the second doped layer 132 includes a second doped polysilicon layer; for another example, the second doped layer 132 includes a second doped intrinsic silicon layer; for another example, the second doped layer 132 includes a second doped polysilicon layer and a second doped intrinsic silicon layer.

[0036] Specifically, the first doping layer 131 is a P-type doping layer, and the second doping layer 132 is an N-type doping layer. It is understood that in other embodiments, the first doping layer 131 may be an N-type doping layer, and the second doping layer 132 may be a P-type doping layer.

[0037] Specifically, the first doping layer 131 can be prepared by a PECVD process. In this way, the uniformity of the first doping layer 131 is better and the quality is better. It can be understood that in other embodiments, the first doping layer 131 can also be prepared by a diffusion process, an ion implantation process or other processes, which are not limited here. Similarly, the second doping layer 132 can be prepared by a PECVD process. In this way, the uniformity of the second doping layer 132 is better and the quality is better. It can be understood that in other embodiments, the second doping layer 132 can also be prepared by a diffusion process, an ion implantation process or other processes, which are not limited here.

[0038] Specifically, “the groove 140 corresponds to the first conductive region” may mean that the projection of the groove 140 on the interface passivation layer 12 along the thickness direction of the solar cell 10 is located in the first conductive region. Furthermore, the projection of the groove 140 on the interface passivation layer 12 along the thickness direction of the solar cell 10 may be located in the first conductive region or may completely overlap with the first conductive region.

[0039] Specifically, the first electrode 15 includes a silver electrode, an aluminum electrode, or the like.

[0040] Specifically, the carrier selective blocking structure 14 includes a metal layer, and the metal layer of the carrier selective blocking structure 14 corresponding to the second conductive region serves as the second electrode of the solar cell 10 .

[0041] In this embodiment, the carrier selective blocking structure 14 may block holes and transmit electrons.

[0042] In other embodiments, the carrier selective blocking structure 14 may also block electrons and transmit holes. For example, the carrier selective blocking structure 14 includes a nickel oxide layer.

[0043] Embodiment 2

[0044] See also Figure 1In some embodiments, the carrier selective blocking structure 14 includes a silicon oxide tunneling layer 141 (SiOx) and a titanium nitride layer 142 (T iN) sequentially stacked on a conductive layer.

[0045] In this way, the titanium nitride layer 142 has a high conductivity, high electron concentration and high electron mobility, and can be better used as a second electrode to extract electrons, reduce the use of slurry, and reduce costs. Moreover, a silicon oxide tunneling layer 141 is provided between the titanium nitride layer 142 and the second doping layer 132, which can reduce the contact resistance and form a good ohmic contact. A large valence band offset is exhibited at the interface between the titanium nitride layer 142, the silicon oxide tunneling layer 141 and the first doping layer 131, which can prevent electrons from being transmitted from the first doping layer 131 to the titanium nitride layer 142, and reduce the leakage phenomenon caused by the recombination.

[0046] Specifically, the silicon oxide tunneling layer 141 may cover a partial region of the first doping layer 131. The silicon oxide tunneling layer 141 may cover a partial region or the entire region of the second doping layer 132.

[0047] Specifically, ultraviolet light and ozone can be used to make the silicon oxide tunneling layer 141. Furthermore, ultraviolet light can decompose ozone into oxygen and active oxygen. Active oxygen has strong oxidizing properties and can generate silicon oxide simply and efficiently at a low cost.

[0048] Specifically, the titanium nitride layer 142 may cover a portion or the entire region of the silicon oxide tunneling.

[0049] Embodiment 3

[0050] In some embodiments, the thickness of the silicon oxide tunneling layer 141 is less than or equal to 3 nm, for example, 3 nm, 2.8 nm, 2.5 nm, 2 nm, 1.8 nm, 1.5 nm, 1 nm, 0.5 nm, or 0.1 nm.

[0051] In this way, the thickness of the silicon oxide tunneling layer 141 is within an appropriate range, which can avoid the interface state density between the silicon oxide tunneling layer 141 and the titanium nitride layer 142 being larger and the Schottky barrier height being higher due to the larger thickness of the silicon oxide tunneling layer 141, thereby avoiding larger contact resistance.

[0052] Preferably, the thickness of the silicon oxide tunneling layer 141 is 0.5 nm-2.5 nm, for example, 0.5 nm, 0.8 nm, 1 nm, 1.5 nm, 2 nm, 2.5 nm. In this way, the thickness of the silicon oxide tunneling layer 141 is further optimized, and the contact resistance is further improved.

[0053] Embodiment 4

[0054] In some embodiments, the thickness of the titanium nitride layer 142 is 1 nm-350 nm, for example, 1 nm, 5 nm, 10 nm, 50 nm, 100 nm, 200 nm, 300 nm, 340 nm, or 350 nm.

[0055] In this way, the thickness of the titanium nitride layer 142 is within an appropriate range, which can avoid the titanium nitride layer 142 being too thin, resulting in a large square resistance and poor conductivity, and can also avoid the titanium nitride layer 142 being too thick, resulting in an insignificant improvement in square resistance and a waste of materials.

[0056] Preferably, the thickness of the titanium nitride layer 142 is 10 nm-20 nm, for example, 10 nm, 12 nm, 15 nm, 18 nm, 20 nm. In this way, the thickness of the titanium nitride layer 142 is further optimized, and the conductive performance is improved and the cost is reduced, and the overall effect is better.

[0057] Embodiment 5

[0058] See also Figure 1 In some embodiments, the first electrode 15 and the carrier selective blocking structure 14 are spaced apart from each other.

[0059] In this way, the first electrode 15 has no contact with the carrier selective blocking structure 14, which can avoid the electrons and holes from gathering and recombining at the first electrode 15 due to the contact between the first electrode 15 and the carrier selective blocking structure 14, and is beneficial to reduce the leakage phenomenon caused by the recombination.

[0060] Specifically, the width of the first electrode 15 is smaller than the width of the groove 140. In this way, the first electrode 15 and the carrier selective blocking structure 14 are spaced apart from each other.

[0061] Embodiment 6

[0062] See also Figure 1 In some embodiments, the projection of the first electrode 15 on the interface passivation layer 12 along the thickness direction of the solar cell 10 is located in the middle of the first conductive region.

[0063] In this way, the first electrode 15 is located in the middle of the first conductive region, so that the first electrode 15 can better collect carriers from the first doping layer 131 .

[0064] Specifically, the center point of the projection of the first electrode 15 on the interface passivation layer 12 along the thickness direction of the solar cell 10 coincides with the middle position of the first conductive region. In this way, it is ensured that the projection of the first electrode 15 on the interface passivation layer 12 along the thickness direction of the solar cell 10 is located in the middle position of the first conductive region.

[0065] It can be understood that in other embodiments, the projection of the first electrode 15 on the interface passivation layer 12 along the thickness direction of the solar cell 10 may also be located at the edge of the first conductive region.

[0066] Specifically, the center point of the groove 140 is located in the middle of the first conductive region, and the center point of the projection of the first electrode 15 on the interface passivation layer 12 along the thickness direction of the solar cell 10 coincides with the center point of the groove 140. In this way, the first electrode 15 is also located in the middle of the groove 140, which is conducive to spacing the first electrode 15 and the carrier selective blocking structure 14 from each other.

[0067] Embodiment 7

[0068] See also Figure 1 and Figure 2 , the method for manufacturing the solar cell 10 of the embodiment of the present application comprises:

[0069] Step S11: forming an interface passivation layer 12 on a silicon substrate 11, wherein the interface passivation layer 12 is formed with a plurality of first conductive regions and a plurality of second conductive regions, wherein the first conductive regions and the second conductive regions are alternately arranged;

[0070] Step S12: forming a first doping layer 131 in the first conductive region;

[0071] Step S13: forming a second doping layer 132 in the second conductive region;

[0072] Step S14: fabricating a carrier selective blocking structure 14 on the first doping layer 131 and the second doping layer 132;

[0073] Step S15: opening a groove 140 in the carrier selective blocking structure 14, wherein the groove 140 corresponds to the first conductive region;

[0074] Step S16 : manufacturing a first electrode 15 in the groove 140 . The first electrode 15 passes through the groove 140 and contacts the first doping layer 131 . The carrier selective blocking structure 14 corresponding to the second conductive region serves as a second electrode of the solar cell 10 .

[0075] The method for manufacturing the solar cell 10 of the embodiment of the present application uses the carrier selective blocking structure 14 to form a good ohmic contact with the second doping layer 132, so as to transfer the second carrier from the second doping layer 132 to the titanium nitride layer 142. At the same time, the interface between the stacked structure and the first doping layer 131 shows a large valence band offset, which can prevent the first carrier from being transferred from the first doping layer 131 to the titanium nitride layer 142, thereby reducing the leakage phenomenon caused by the recombination. In this way, while reducing leakage and improving battery performance, it is possible to ensure that the holes in the first doping layer 131 are transmitted through the first electrode 15, and the second carriers of the second doping layer 132 are transmitted through the corresponding carrier selective blocking structure 14 as the second electrode, thereby eliminating the need for additional electrode slurry, which is conducive to reducing costs.

[0076] Specifically, in step S11, the interface passivation layer 12 can be prepared by a PECVD process. In this way, the interface passivation layer 12 has better uniformity and better quality. It can be understood that in other embodiments, the interface passivation layer 12 can also be prepared by a thermal oxidation process, a PVD process or other processes, which are not limited here.

[0077] Specifically, in step S12, the first doping layer 131 may be prepared by a PECVD process. In this way, the first doping layer 131 has better uniformity and better quality. It is understood that in other embodiments, the first doping layer 131 may also be prepared by a diffusion process, an ion implantation process or other processes, which are not limited here.

[0078] Specifically, in step S13, the second doping layer 132 may be prepared by a PECVD process. In this way, the second doping layer 132 has better uniformity and quality. It is understood that in other embodiments, the second doping layer 132 may also be prepared by a diffusion process, an ion implantation process or other processes, which are not limited here.

[0079] Specifically, in step S15, a laser may be used to open the groove 140 in the carrier selective blocking structure 14. In this way, the groove 140 has a higher precision, which is conducive to accurately grasping the position and width of the groove 140.

[0080] Specifically, in step S16 , the first electrode 15 may be manufactured in the groove 140 by using a screen printing process.

[0081] Please note that the explanation and description of the method for manufacturing the solar cell 10 can be cross-referenced with the above explanation and description of the solar cell 10 , and will not be repeated here to avoid redundancy.

[0082] Embodiment 8

[0083] See also Figure 3In some embodiments, step S14 includes:

[0084] Step S141: forming a silicon oxide tunneling layer 141 on the first doping layer 131 and the second doping layer 132;

[0085] Step S142 : forming a titanium nitride layer 142 on the silicon oxide tunneling layer 141 .

[0086] In this way, the titanium nitride layer 142 has a high conductivity, high electron concentration and high electron mobility, and can be better used as a second electrode to extract electrons, reduce the use of slurry, and reduce costs. Moreover, a silicon oxide tunneling layer 141 is provided between the titanium nitride layer 142 and the second doping layer 132, which can reduce the contact resistance and form a good ohmic contact. A large valence band offset is exhibited at the interface between the titanium nitride layer 142, the silicon oxide tunneling layer 141 and the first doping layer 131, which can prevent electrons from being transmitted from the first doping layer 131 to the titanium nitride layer 142, and reduce the leakage phenomenon caused by the recombination.

[0087] Specifically, in step S141, ultraviolet light and ozone can be used to make the silicon oxide tunneling layer 141. Furthermore, ultraviolet light can decompose ozone into oxygen and active oxygen. Active oxygen has strong oxidizing properties and can generate silicon oxide simply and efficiently at a low cost.

[0088] Embodiment 9

[0089] In some embodiments, in step S142, a DC magnetron sputtering process is used, the target material is a titanium target, the deposition power is 150W-300W, the deposition pressure is 1mTorr-50mTorr, the process gas includes N2 and Ar, the N2 content is 0.5%-30%, the deposition time is 1min-10min, and the deposition temperature is 25℃-200℃.

[0090] In this way, the various process parameters for making the titanium nitride layer 142 are within an appropriate range, so that the thickness of the titanium nitride layer 142 is within an appropriate range, which can avoid the titanium nitride layer 142 being too thin, resulting in a large square resistance and poor conductivity, and can also avoid the titanium nitride layer 142 being too thick, resulting in an insignificant improvement in square resistance and a waste of materials.

[0091] Specifically, the purity of the titanium target is 99.99%.

[0092] Specifically, the deposition power is, for example, 150W, 180W, 200W, 250W, or 300W.

[0093] Specifically, the deposition pressure is, for example, 1 mTorr, 2 mTorr, 5 mTorr, 10 mTorr, 20 mTorr, 45 mTorr, or 50 mTorr.

[0094] Specifically, the N2 content is, for example, 0.5%, 0.8%, 1%, 5%, 10%, 15%, 20%, 25%, or 30%.

[0095] Specifically, the deposition time is, for example, 1 min, 3 min, 5 min, 8 min, or 10 min.

[0096] Specifically, the deposition temperature is, for example, 25°C, 30°C, 50°C, 100°C, 150°C, 180°C, or 200°C.

[0097] Embodiment 10

[0098] The solar cell 10 of the embodiment of the present application is manufactured by using the manufacturing method of the solar cell 10 of any one of the seventh to ninth embodiments.

[0099] The solar cell 10 of the embodiment of the present application uses the carrier selective blocking structure 14 to form a good ohmic contact with the second doping layer 132, so as to transfer the second carrier from the second doping layer 132 to the titanium nitride layer 142. At the same time, the interface between the stacked structure and the first doping layer 131 shows a large valence band offset, which can prevent the first carrier from being transferred from the first doping layer 131 to the titanium nitride layer 142, thereby reducing the leakage phenomenon caused by the recombination. In this way, while reducing leakage and improving battery performance, it is possible to ensure that the holes in the first doping layer 131 are transmitted through the first electrode 15, and the second carriers of the second doping layer 132 are transmitted through the corresponding carrier selective blocking structure 14 as the second electrode, thereby eliminating the need for additional electrode slurry, which is conducive to reducing costs.

[0100] Embodiment 11

[0101] The battery assembly of the embodiment of the present application includes the solar cell 10 of any one of the first to sixth embodiments or the tenth embodiment.

[0102] In the battery assembly of the embodiment of the present application, the carrier selective blocking structure 14 is used in the solar cell 10 to form a good ohmic contact with the second doping layer 132, so that the second carrier is transferred from the second doping layer 132 to the titanium nitride layer 142. At the same time, the interface between the stacked structure and the first doping layer 131 shows a large valence band offset, which can prevent the first carrier from being transferred from the first doping layer 131 to the titanium nitride layer 142, thereby reducing the leakage phenomenon caused by the recombination. In this way, while reducing leakage and improving battery performance, it is possible to ensure that the holes in the first doping layer 131 are transmitted through the first electrode 15, and the second carriers of the second doping layer 132 are transmitted through the corresponding carrier selective blocking structure 14 as the second electrode, thereby eliminating the need for additional electrode slurry, which is conducive to reducing costs.

[0103] In this embodiment, a plurality of solar cells 10 in the battery assembly can be connected in series in sequence to form a battery string, thereby realizing the series bus output of the current. For example, the series connection of the battery cells can be realized by setting welding strips (bus bars, interconnecting strips), conductive backplanes, etc.

[0104] It is understandable that in such an embodiment, the battery assembly may further include a metal frame, a back plate, photovoltaic glass and an adhesive film. The adhesive film may be filled between the front and back of the solar cell 10 and the photovoltaic glass, adjacent cells, etc. As a filler, it may be a transparent colloid with good light transmittance and aging resistance. For example, the adhesive film may be an EVA adhesive film or a POE adhesive film. The specific selection may be based on actual conditions and is not limited here.

[0105] Photovoltaic glass can cover the adhesive film on the front side of the solar cell 10. The photovoltaic glass can be ultra-white glass, which has high light transmittance, high transparency, and excellent physical, mechanical and optical properties. For example, the light transmittance of ultra-white glass can reach more than 92%, which can protect the solar cell 10 without affecting the efficiency of the solar cell 10 as much as possible. At the same time, the adhesive film can bond the photovoltaic glass and the solar cell 10 together, and the presence of the adhesive film can seal and insulate the solar cell 10 and make it waterproof and moisture-proof.

[0106] The backplane can be attached to the adhesive film on the back of the solar cell 10. The backplane can protect and support the solar cell 10 and has reliable insulation, water resistance and aging resistance. There are multiple options for the backplane, which can usually be tempered glass, organic glass, aluminum alloy TPT composite adhesive film, etc. It can be set according to specific circumstances and is not limited here. The whole composed of the backplane, solar cell 10, adhesive film and photovoltaic glass can be set on a metal frame. The metal frame serves as the main external support structure of the entire battery assembly and can stably support and install the battery assembly. For example, the battery assembly can be installed at the required location through the metal frame.

[0107] Embodiment 12

[0108] The photovoltaic system of the embodiment of the present application includes the battery assembly of the eleventh embodiment.

[0109] In the photovoltaic system of the embodiment of the present application, the solar cell 10 uses the carrier selective blocking structure 14 to form a good ohmic contact with the second doping layer 132, so that the second carrier is transferred from the second doping layer 132 to the titanium nitride layer 142. At the same time, the interface between the stacked structure and the first doping layer 131 shows a large valence band offset, which can prevent the first carrier from being transferred from the first doping layer 131 to the titanium nitride layer 142, thereby reducing the leakage phenomenon caused by the recombination. In this way, while reducing leakage and improving battery performance, it is possible to ensure that the holes in the first doping layer 131 are transmitted through the first electrode 15, and the second carriers of the second doping layer 132 are transmitted through the corresponding carrier selective blocking structure 14 as the second electrode, thereby eliminating the need for additional electrode slurry, which is conducive to reducing costs.

[0110] In this embodiment, the photovoltaic system can be applied to photovoltaic power stations, such as ground power stations, rooftop power stations, water power stations, etc., and can also be applied to equipment or devices that use solar energy to generate electricity, such as user solar power supplies, solar street lights, solar cars, solar buildings, etc. Of course, it can be understood that the application scenarios of the photovoltaic system are not limited to this, that is to say, the photovoltaic system can be applied in all fields that require solar energy to generate electricity. Taking the photovoltaic power generation system network as an example, the photovoltaic system may include a photovoltaic array, a junction box and an inverter. The photovoltaic array may be an array combination of multiple battery components. For example, multiple battery components can form multiple photovoltaic arrays. The photovoltaic array is connected to the junction box. The junction box can converge the current generated by the photovoltaic array. The converged current flows through the inverter and is converted into the alternating current required by the mains power grid, and then connected to the mains network to realize solar power supply.

[0111] In the description of this specification, the description with reference to the terms "some embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiments or examples are included in at least one embodiment or example of the present application. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0112] In addition, the above are only preferred embodiments of the present application and are not intended to limit the present application. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present application should be included in the protection scope of the present application.

Claims

1. A solar cell, characterized in that: The invention comprises an interface passivation layer, a conductive layer and a carrier selective blocking structure which are sequentially stacked on a silicon substrate, wherein the interface passivation layer is formed with a plurality of first conductive regions and a plurality of second conductive regions, wherein the first conductive regions and the second conductive regions are arranged alternately, and the conductive layer comprises a first doped layer and a second doped layer, which are respectively located in the first conductive region and the second conductive region; the carrier selective blocking structure is formed with a groove, wherein the groove corresponds to the first conductive region, and the solar cell further comprises a first electrode, wherein the first electrode passes through the groove and contacts the first doped layer; and the carrier selective blocking structure corresponding to the second conductive region serves as the second electrode of the solar cell.

2. The solar cell according to claim 1, characterized in that The carrier selective blocking structure comprises a silicon oxide tunneling layer and a titanium nitride layer which are sequentially stacked on the conductive layer.

3. The solar cell according to claim 2, characterized in that: The thickness of the silicon oxide tunneling layer is less than or equal to 3 nm.

4. The solar cell according to claim 2, characterized in that: The thickness of the titanium nitride layer is 1nm-350nm.

5. The solar cell according to claim 1, characterized in that: The first electrode and the carrier selective blocking structure are spaced apart from each other.

6. The solar cell according to claim 1, characterized in that The projection of the first electrode on the interface passivation layer along the thickness direction of the solar cell is located in the middle of the first conductive region.

7. A battery assembly, characterized in that: A solar cell comprising the solar cell according to any one of claims 1 to 6.

8. A photovoltaic system, characterized in that: A battery assembly comprising the battery assembly of claim 7.

Images