Circuit board ICT test point structure for oxidation resistance

Abstract

The utility model discloses an antioxidant circuit board ICT test point structure, which is characterized in that the antioxidant circuit board ICT test point structure comprises a copper layer and a protective layer arranged above the copper layer, in a first state, the protective layer comprises an isolating layer, the isolating layer is bonded with the copper layer, and in a second state, the isolating layer is bonded with the copper layer. The isolation layer is used for carrying out anti-oxidation protection on the copper layer before the reflow soldering process, and the isolation outer layer is located above the isolation layer; in the second state, the protection layer further comprises an isolation outer layer, the isolation outer layer is melted and cooled at high temperature to form a curing layer, the isolation layer is melted at high temperature to be eliminated, the curing layer is bonded with the copper layer, and the curing layer is used for carrying out anti-oxidation protection on the copper layer after the reflow soldering process is carried out. Through the structural arrangement of the protective layer, the problem that the copper surface is oxidized due to the fact that an organic coating film on the surface of an ICT test point is easy to crack in a high-temperature environment is solved.

Description

Technical Field

[0001] The utility model relates to the production and processing of a PCB circuit board, in particular to an ICT test point structure of a circuit board for anti-oxidation. Background Art

[0002] The production process of PCB circuit boards is a complex and delicate process involving multiple key steps, among which ICT testing is an important part of ensuring product quality. Specifically, during the research and development stage of electronic products, customers usually require a large number of ICT test points to be set on the PCB board to meet testing requirements and manufacturer acceptance standards. Therefore, the setting of these test points is crucial to ensuring the stability and reliability of the circuit board.

[0003] In the production process of PCB circuit boards, surface treatment is a link that cannot be ignored. Under the premise of taking into account protection, welding effect and cost factors, many products will choose OSP (organic solder preservative) as a surface treatment process. Specifically, OSP effectively prevents copper oxidation and sulfidation by forming an organic film on the surface of bare copper, thereby protecting the copper surface. At the same time, this protective film needs to be able to be quickly removed by flux in the subsequent welding process, which can make it easier for solder to firmly bond to the pad.

[0004] But there is a key problem here: the ICT test points on the PCB do not need to be soldered subsequently, so they will undergo long-term high-temperature baking and air exposure during the reflow process. Although there is no flux damage, the high temperature will cause the SOP organic coating on the surface of these ICT test points to crack or oxidize and fail. This cracked or oxidized organic film will most likely cause the ICT probe and the ICT test point metal pad to not be well connected during subsequent use, which will lead to misjudgment in the ICT test phase and failure of subsequent tests.

[0005] For such ICT test points, the problem of cracking or oxidation failure of the organic coating on the surface under high temperature environment will not only affect the accuracy of the test, but also may lead to a decline in product quality. Therefore, it is necessary to propose an anti-oxidation circuit board ICT test point structure to adjust the above-mentioned defects. Utility Model Content

[0006] In order to overcome the deficiencies of the existing technology, the utility model provides an ICT test point structure for an anti-oxidation circuit board, which solves the problem that the organic coating on the surface of the ICT test point is prone to cracking and causes copper surface oxidation when facing a high temperature environment.

[0007] The technical solution of the utility model is as follows:

[0008] An ICT test point structure for circuit board for anti-oxidation, comprising a copper layer and a protective layer arranged above the copper layer, wherein in a first state, the protective layer comprises an isolation layer, the isolation layer is bonded to the copper layer, the isolation layer is used to provide anti-oxidation protection for the copper layer before a reflow soldering process, and the isolation outer layer is located above the isolation layer;

[0009] In the second state, the protective layer also includes an isolation outer layer. The high temperature causes the isolation outer layer to melt and cool to form a solidified layer, and the isolation layer is melted and eliminated at high temperature. The solidified layer is bonded to the copper layer. The solidified layer is used to provide anti-oxidation protection for the copper layer after the reflow soldering process.

[0010] In a possible implementation, the isolation layer is an organic coating film, and the organic coating film is bonded to the upper end surface of the copper layer.

[0011] In a possible implementation, the isolation outer layer is a solder paste layer, the solder paste layer includes solder and flux, and the solder and the flux are mixed.

[0012] In a possible implementation, the solidified layer is solidified solder paste.

[0013] In a possible implementation manner, a substrate is further provided under the copper layer.

[0014] In a possible implementation, an auxiliary part is further included, and the auxiliary part is used to limit the application range of the isolation outer layer.

[0015] In a possible implementation, the auxiliary component is a steel mesh, and the shape of the steel mesh is adapted to the shape of the test point.

[0016] The utility model according to the above scheme has the beneficial effect of providing an ICT test point structure of a circuit board for anti-oxidation, comprising a copper layer and a protective layer arranged above the copper layer. In a first state, the protective layer comprises an isolation layer, and the upper end surface of the copper layer is covered by the isolation layer, so that the surface of the copper layer before the reflow soldering process is protected from oxidation. In addition, in a second state, an isolation outer layer is applied above the isolation layer, and the isolation outer layer is melted and cooled into a solidified layer, and the isolation layer that has been eliminated is replaced by the solidified layer, so that the surface of the copper layer is protected from oxidation. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 This is a schematic diagram of the structure of an ICT test point structure of a circuit board for anti-oxidation according to the utility model;

[0018] Figure 2 This is a schematic diagram of a first state structure of an ICT test point structure of a circuit board for anti-oxidation in this embodiment;

[0019] Figure 3 This is a schematic diagram of the second state structure of an ICT test point structure of a circuit board for anti-oxidation in this embodiment.

[0020] In the figure:

[0021] 10. Copper layer; 20. Protective layer; 21. Isolation layer; 211. Organic coating; 22. Isolation outer layer; 221. Solder paste layer; 30. Substrate; 40. Auxiliary parts; 41. Steel mesh. DETAILED DESCRIPTION

[0022] The present invention is further described below in conjunction with the accompanying drawings and implementation modes:

[0023] It should be noted that, first, after the ICT test point is set in the PCB board package, an organic coating 211 is formed on the surface of the ICT test point through the OSP process to effectively prevent the copper surface from being oxidized. Subsequently, during the reflow soldering process, specifically, when the components are soldered on the PCB circuit board, the ICT test point is in a high temperature environment, which causes the organic coating 211 to crack, thereby oxidizing the copper surface. In order to avoid the problem of the high temperature generated during the reflow soldering process causing the coating to be damaged, which ultimately leads to oxidation of the copper surface, the present application proposes an ICT test point structure for a circuit board that is anti-oxidant.

[0024] See also Figure 1-3 The utility model provides an ICT test point structure for circuit board for anti-oxidation, comprising a copper layer 10 and a protective layer 20 arranged above the copper layer 10, wherein, in a first state, the protective layer 20 comprises an isolation layer 21, the isolation layer 21 is bonded to the copper layer 10, the isolation layer 21 is used to provide anti-oxidation protection for the copper layer 10 before the reflow soldering process, and the isolation outer layer 22 is located above the isolation layer 21; in addition, in a second state, the protective layer 20 further comprises an isolation outer layer 22, the high temperature causes the isolation outer layer 22 to melt and cool to form a solidified layer, and the isolation layer 21 is melted and eliminated by the flux under high temperature conditions, the solidified layer is bonded to the copper layer 10, and the solidified layer is used to provide anti-oxidation protection for the copper layer 10 after the reflow soldering process.

[0025] In this embodiment, an ICT test point structure of a circuit board for anti-oxidation of the present application has been carefully designed and optimized to ensure the stability and reliability of the test point throughout the entire production and testing process, thereby reducing the risk of poor conduction between the ICT probe and the ICT test point metal pad during subsequent use. Specifically, the ICT test point structure includes a copper layer 10, a protective layer 20, and a substrate 30 located below the copper layer 10, and the structural setting of the protective layer 20 provides anti-oxidation protection for the ICT test point.

[0026] To be more specific, after encapsulating the ICT test point on the PCB circuit board, an organic coating 211 is formed on the surface of the test point through the OSP process, so that the ICT test point is isolated from air by the organic coating 211, thereby protecting the surface of the copper layer 10. This process is the first state, wherein in the first state of circuit board manufacturing, the protective layer 20 plays a vital role, first including an isolation layer 21, which is tightly bonded to the copper layer 10 to form an effective anti-oxidation barrier. It should be explained that the main function of the isolation layer 21 is to prevent the copper layer 10 from being affected by oxidation before the circuit board undergoes the reflow soldering process. Oxidation will not only cause the performance of the copper layer 10 to deteriorate, but may also affect the normal operation of the entire circuit board. By introducing this isolation layer 21, we have successfully solved this problem and ensured the stability and reliability of the copper layer 10 before reflow soldering.

[0027] In addition, when the reflow soldering process is performed on the circuit board with ICT test points, the components need to be soldered at the corresponding positions, and the high temperature generated during the soldering process will form a high-temperature environment for the ICT test points around the soldering points. In this high-temperature environment, the isolation outer layer 22 is heated to melt the solder, and the flux reacts to the organic coating 211, destroying the organic coating 211 and eliminating the isolation layer 21. After the device is soldered, the high-temperature environment disappears, and the melted solder paste layer 221 cools to form a solidified layer covering the upper end surface of the copper layer 10. This process is the second state.

[0028] It needs to be explained that in the second state, the isolation outer layer 22 is located above the isolation layer 21, which further enhances the anti-oxidation ability of the protective layer 20. The isolation outer layer 22 plays a key role in the reflow soldering process. Then, during the welding process, as the temperature rises, the isolation outer layer 22 will melt and form a solidified layer after cooling. The solidified layer is tightly bonded to the copper layer 10 to form a new anti-oxidation barrier. At the same time, the isolation layer 21 will gradually disappear under the action of high temperature and flux, but its protective role is replaced by the solidified layer.

[0029] In addition, after the circuit board undergoes the reflow soldering process, it enters the second state. At this time, the protective layer 20 is mainly composed of a solidified layer. The solidified layer not only has excellent anti-oxidation properties, but also can effectively prevent the external environmental factors from corroding the copper layer 10. The utility model uses the structural setting of the solidified layer formed by the isolation layer 21 in the first state and the isolation outer layer 22 in the second state, so that the upper end surface of the test point and the upper end surface of the copper layer 10 can be fully protected before or after the reflow soldering process, thereby ensuring its long-term stability and reliability.

[0030] In general, this anti-oxidation circuit board ICT test point structure successfully solves the oxidation problem of the copper layer 10 during the production and testing process through the carefully designed protection layer 20.

[0031] For further information, see Figure 1-3 The isolation layer 21 is an organic coating film 211 , and the organic coating film 211 is bonded to the upper end surface of the copper layer 10 .

[0032] For further information, see Figure 1-3 The isolation outer layer 22 is a solder paste layer 221, and the solder paste layer 221 includes solder and flux, and the solder and the flux are mixed.

[0033] For further information, see Figure 1-3 , the solidified layer is solder paste in a solidified state.

[0034] In this embodiment, the solder paste in a fluid state outside the solidified outer layer is formed into a solidified solder paste after being subjected to a high temperature environment, thereby providing better anti-oxidation protection for the copper layer 10 .

[0035] For further information, see Figure 1-3 A substrate 30 is further disposed below the copper layer 10 .

[0036] In this embodiment, the substrate 30 is a circuit board.

[0037] For further information, see Figure 1-3 , also includes an auxiliary part 40, which is used to limit the application range of the isolation outer layer 22.

[0038] For further information, see Figure 1-3 The auxiliary component 40 is a steel mesh 41, and the shape of the steel mesh 41 is adapted to the shape of the test point.

[0039] In this embodiment, during the PCB design stage, a steel mesh 41 pattern of the same size is added to the ICT test point pad in the ICT test point package file, so as to define the position for coating the isolation outer layer 22 and improve the coating accuracy.

[0040] It should be understood that those skilled in the art can make improvements or changes based on the above description, and all these improvements and changes should fall within the scope of protection of the claims attached to the utility model.

[0041] The above is an exemplary description of the utility model patent in conjunction with the accompanying drawings. It is obvious that the implementation of the utility model patent is not limited to the above-mentioned method. As long as various improvements are made by adopting the method concept and technical solution of the utility model patent, or the concept and technical solution of the utility model patent are directly applied to other occasions without improvement, they are all within the protection scope of the utility model.

Claims

1. A circuit board ICT test point structure for anti-oxidation, characterized in that: The invention comprises a copper layer and a protective layer disposed above the copper layer, wherein in a first state, the protective layer comprises an isolation layer, the isolation layer is bonded to the copper layer, and the isolation layer is used to provide anti-oxidation protection for the copper layer before a reflow soldering process is performed; In the second state, the protective layer also includes an isolation outer layer, which is located above the isolation layer. The high temperature causes the isolation outer layer to melt and cool to form a solidified layer, and the isolation layer is melted and eliminated at high temperature. The solidified layer is bonded to the copper layer, and the solidified layer is used to provide anti-oxidation protection for the copper layer after the reflow soldering process.

2. The circuit board ICT test point structure for anti-oxidation according to claim 1, characterized in that: The isolation layer is an organic coating film, and the organic coating film is bonded to the upper end surface of the copper layer.

3. The circuit board ICT test point structure for anti-oxidation according to claim 1, characterized in that: The isolation outer layer is a solder paste layer, and the solder paste layer includes solder and flux, and the solder and the flux are mixed.

4. The circuit board ICT test point structure for anti-oxidation according to claim 1, characterized in that: The solidified layer is solder paste in a solidified state.

5. The circuit board ICT test point structure for anti-oxidation according to claim 1, characterized in that: A substrate is also provided under the copper layer.

6. The circuit board ICT test point structure for anti-oxidation according to claim 1, characterized in that: Also included are auxiliary parts, which are used to limit the application range of the isolation outer layer.

7. The circuit board ICT test point structure for anti-oxidation according to claim 6, characterized in that: The auxiliary component is a steel mesh, and the shape of the steel mesh is adapted to the shape of the test point.

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