A circuit board for preventing soldering pad of plug-in from being tinned

Abstract

A circuit board for preventing plug-in pads from bridging tin, comprising a substrate, a plurality of component sockets arranged at intervals, a plurality of pin pads corresponding to the plurality of component sockets on both sides of the substrate, the pin pads are formed in a ring around the corresponding component sockets, and solder resist layers are also provided on both sides of the substrate to isolate each pin pad; wherein the solder resist layer between two adjacent pin pads also extends to partially cover the pin pads to expand the distance between the pin pads to avoid bridging tin; the implementation method of the utility model is very simple, and there is no need to lay tin-stealing pads, thus saving the layout and routing space of the circuit board surface and reducing the dependence on the surface tension of the pads; the relationship between the device layout direction and the wave soldering board direction is not forced due to the need to prevent bridging tin, thereby increasing the degree of freedom of design; the dependence on the ability of "continuous carrier" is reduced when the transmission direction and the device layout direction cannot be changed due to the limited size of the single board, and still can play a good anti-bridging tin effect.

Description

Technical Field

[0001] The utility model relates to the field of wave soldering, in particular to a circuit board capable of preventing a plug-in soldering pad from being tinned. Background Art

[0002] In order to prevent the tin connection of dense pitch multi-pin devices during wave soldering, conventional products will take measures such as limiting the device layout direction, changing the pad shape, adding tin stealing pads or adding silk screen separation lines between pads during PCB design. These methods have some limitations. The following briefly introduces these traditional control methods and their defects to prevent the tin connection of dense pitch multi-pin devices during wave soldering:

[0003] 1) For two-pin plug-in components, design the connection direction to be perpendicular to the board transmission direction as much as possible. For connectors with one or more rows of leads, the direction of the lead rows should be consistent with the board transmission direction as much as possible, such as Figure 1 As shown in Figure 1, such a requirement is aimed at ensuring that the leads can form a "continuous carrier" during wave soldering and reduce the probability of bridging between leads. Figure 1 As shown by the arrow in . When the board size is limited and the transmission direction cannot be changed and the device layout direction is limited, this control method cannot be used.

[0004] 2) When the pin spacing of the plug-in device is relatively small, such as Figure 2 If the centerline span (pitch) of the two pads is small, the spacing between the corresponding plug-in pads on the circuit board will be close, and the probability of solder joint will increase. At this time, the spacing between the plug-in pads can be increased by appropriately changing the shape of the pads, such as designing the circular pads into elliptical shapes. Figure 2 However, this method also has limitations. For example, when the pitch of the device is small enough, even if the pads are designed in an elliptical shape, the spacing between the pads will still be relatively small and solder joints are likely to occur.

[0005] 3) When designing PCB, for multi-pin devices with small spacing, tin stealing pads are designed. The tin stealing pads are set on the side of the device PCB pad opposite to the direction of wave soldering. Figure 3 As shown in the figure, the arrow indicates the direction of the board, and 100 indicates the tin stealing pad. The principle of the tin stealing pad is that during wave soldering, the tin stealing pad uses surface tension to smoothly absorb excess liquid tin, preventing excess liquid tin from flowing back to the component pins, thereby preventing the occurrence of tin bridging. However, this method also has limitations. For example, the larger the area of ​​the tin stealing pad, the greater the surface tension, and the better the anti-tin bridging effect, which will occupy the routing space on the PCB surface. When the PCB layout is limited and the tin stealing pad cannot be placed on the side opposite to the device pad and the wave soldering board direction, or the tin stealing pad area is insufficient, the anti-tin bridging effect cannot be achieved.

[0006] 4) When the pin spacing of the plug-in device is relatively small, the spacing between the corresponding plug-in pads on the circuit board is relatively close, and the probability of bridging increases. At this time, white oil silk screen lines or silk screen blocks can be added between adjacent pads. In this way, a high isolation zone can be formed between the plug-in pads to reduce the phenomenon of bridging caused by adhesion between two adjacent plug-in pads during wave soldering. The limitation of this method is that when the spacing between the component pads is too small, the PCB manufacturer's process capability is limited, and the white oil line / block cannot be made according to the design expectations, resulting in the bridging problem; the main reason for the limited process capability of the PCB manufacturer is the influence of the alignment accuracy during the processing process. Observing the actual PCB under a microscope, it is found that the width of the white oil line between the pads has a significant inward shrinkage compared to the design size, and the effect of the isolation zone is greatly reduced. Utility Model Content

[0007] The technical problem to be solved by the utility model is to provide a circuit board which can prevent the soldering pad of the plug-in from being tinned, in view of the above-mentioned defects of the prior art.

[0008] The utility model solves the technical problem by adopting a technical solution: constructing a circuit board for preventing the soldering pads of plug-ins from being tinned together, comprising a substrate, on which a plurality of component insertion holes arranged at intervals are provided, and both sides of the substrate are provided with a plurality of pin pads corresponding to the plurality of component insertion holes one by one, the pin pads are formed in a ring around the corresponding periphery of the component insertion holes, and both sides of the substrate are also provided with solder resist layers that isolate the respective pin pads;

[0009] The solder resist layer between two adjacent pin pads further extends to partially cover the pin pads, so as to expand the distance between the two adjacent pin pads to avoid solder joints.

[0010] Furthermore, in the circuit board for preventing tinning of plug-in pads described in the utility model, the solder resist layer includes a first main layer covering the surface of the substrate and a first climbing layer covering the pin pads, and the thickness of the first main layer is greater than the thickness of the first climbing layer.

[0011] Furthermore, in the circuit board for preventing the plug-in pads from being tinned together as described in the utility model, there is also an isolation zone silk-screened on the solder resist layer between two adjacent pin pads, and the horizontal projection of the isolation zone on the substrate partially overlaps with the horizontal projections of the two corresponding pin pads on the substrate, and the horizontal projection of the isolation zone on the substrate is located within the horizontal projection of the solder resist layer.

[0012] Furthermore, in the circuit board for preventing tinning of plug-in pads described in the utility model, the isolation zone includes a second main body layer covering the first main body layer and a second climbing layer covering the first climbing layer, and the thickness of the second main body layer is greater than the thickness of the second climbing layer.

[0013] Furthermore, in the circuit board for preventing solder joints of plug-in pads described in the utility model, the circuit board includes at least one pair of target pads, the pair of target pads refers to two pin pads with a spacing less than a preset spacing, the solder resist layer between each pair of target pads extends to partially cover the pair of target pads to expand the distance between the pair of target pads to avoid solder joints, and the four sides of the pin pads other than the target pads are spaced apart from the solder resist layer to form a circle of gaps.

[0014] Furthermore, in the circuit board for preventing tinning of plug-in pads described in the utility model, the solder resist layer partially covers the area of ​​the surface of the pin pad close to its easy tinning side, and the easy tinning side refers to the side where the distance between the pin pad and other pin pads is less than the preset spacing.

[0015] Furthermore, in the circuit board for preventing soldering of plug-in pads described in the utility model, the side edges of the pin pads other than the side that is easy to solder are spaced apart from the solder resist layer to form a gap.

[0016] Furthermore, in the circuit board for preventing the plug-in pad from tinning described in the utility model, the pin pad is elongated, and the relatively longer side of the pin pad is the side that is easy to tin.

[0017] Furthermore, in the circuit board for preventing tinning of plug-in pads described in the utility model, the component insertion hole penetrates the substrate along the thickness direction of the substrate, and the inner wall of the component insertion hole is provided with a metal layer connected to the corresponding pin pad.

[0018] The circuit board for preventing plug-in pads from tinning has the following beneficial effects: in the utility model, the solder resist layer between two pin pads will continue to extend and partially cover the two pads, thereby expanding the distance between the two pads to avoid tinning. The implementation method of the scheme is very simple. For example, the solder resist layer can be directly coated on the pad part of the existing circuit board. The utility model does not need to lay tin-stealing pads, saves the layout and routing space of the circuit board surface, and reduces the dependence on the surface tension of the pads; the relationship between the device layout direction and the wave soldering board direction is not forced due to the need to prevent tinning, which increases the freedom of design; the dependence on the ability of "continuous carrier" is reduced when the transmission direction and the device layout direction cannot be changed due to the limited size of the single board, and still can play a good anti-tinning effect; further, this method can be easily combined with other improved tinning schemes to achieve the effect of one plus one greater than two, especially when designing an isolation belt silk-screened on the solder resist layer between the pads, because the distance between the pads is expanded, sufficient operating space is also reserved when implementing the isolation belt, and the effect of the produced isolation belt is also greatly improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the embodiments of the utility model or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art are briefly introduced below. Obviously, the drawings in the following description are only embodiments of the utility model. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without creative work:

[0020] Figure 1 It is a schematic diagram of a scheme for limiting the device layout direction;

[0021] Figure 2 It is a schematic diagram of the scheme for changing the pad shape;

[0022] Figure 3 It is a schematic diagram of adding a tin stealing pad solution;

[0023] Figure 4 It is a schematic diagram of the planar structure of a circuit board for preventing soldering of plug-in pads according to the utility model;

[0024] Figure 5 The utility model is a schematic diagram of the cross-sectional structure of a circuit board for preventing the soldering pad of a plug-in from being tinned. DETAILED DESCRIPTION

[0025] In order to facilitate the understanding of the present invention, the present invention will be described more comprehensively with reference to the relevant drawings below. Typical embodiments of the present invention are given in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present invention more thorough and comprehensive. It should be understood that the embodiments of the present invention and the specific features in the embodiments are detailed descriptions of the technical solutions of the present application, rather than limitations on the technical solutions of the present application. In the absence of conflict, the embodiments of the present invention and the technical features in the embodiments can be combined with each other.

[0026] refer to Figure 4-5 The circuit board for preventing the soldering pad of the plug-in device from being tinned together in this embodiment comprises a substrate 1, on which a plurality of component insertion holes 2 arranged at intervals are provided, and the central axis of the component insertion hole 2 is perpendicular to the substrate 1, that is, parallel to the thickness direction of the substrate 1. The component insertion hole 2 penetrates the substrate 1 along the thickness direction of the substrate 1, that is, directly penetrates from the upper side of the substrate 1 to the lower side.

[0027] A plurality of pin pads 3 corresponding to the plurality of component sockets 2 are arranged on both the upper and lower surfaces of the substrate 1. The pin pads 3 are arranged in a ring around the corresponding periphery of the component sockets 2. The inner wall of the component sockets 2 is provided with a metal layer connected to the corresponding pin pads 3. The metal layer and the pin pads 3 are formed together, and both are made of the same metal material, such as copper or copper-containing alloys.

[0028] The upper and lower surfaces of the substrate 1 are also provided with solder resist layers 4 for isolating the pin pads 3 . In a specific embodiment, the solder resist layers 4 are coated with a green oil material.

[0029] The idea of ​​the utility model is that the solder resist layer 4 between two adjacent pin pads 3 also extends to partially cover the pin pads 3 to expand the distance between the pin pads 3 to avoid soldering. Even if the pads 3 are not completely consistent in size and shape, and the pin spacings of different devices are not completely consistent, the solder resist layer 4 can partially cover the pads 3 to achieve the effect of widening the gap between the pin pads 3.

[0030] In this embodiment, for the case where the spacing between the two pin pads 3 is less than the preset spacing (the preset spacing can be selected according to the needs), the two pin pads 3 are defined as a pair of target pads, and the space between the pair of target pads is a place where tinning is easy. Of course, the same pin pad 3 may form a pair of target pads with more than one pin pad 3 at the same time. For each pair of target pads, the solder resist layer 4 between it and the target pad not only no longer retains a gap, but also continues to extend to partially cover the pair of target pads, thereby expanding the distance between the pair of target pads to avoid tinning. In addition to the target pads, the other pin pads 3 do not need to be coated with a solder resist layer on the pad surface, and only need to be coated with a solder resist layer around them in a conventional manner.

[0031] like Figure 4 The area corresponding to the reference numeral 42 is the area where the solder resist layer 4 covers the pad 3. Figure 5 Specifically, the solder resist layer 4 on the same side of the entire substrate 1 is divided into two parts, namely, a first main layer 41 and a first climbing layer 42, according to the different structures it covers. The first main layer 41 refers to a layer covering the surface of the substrate 1, which is actually a complete solder resist layer in a traditional circuit board. The first climbing layer 42 refers to the layer covering the pin pads 3 (in this embodiment, only the target pads are covered, and other pads are not covered), which is used to expand the spacing between the pads 3. The thickness of the first main layer 41 is equivalent to the thickness of the pin pads 3, and the thickness of the first main layer 41 is greater than the thickness of the first climbing layer 42.

[0032] Specifically, the first climbing layer 42 of the solder resist layer 4 partially covers the area of ​​the surface of the pin pad 3 close to the easy tin connection side thereof, and the easy tin connection side mentioned here refers to the side where the distance between the pin pad 3 and other pin pads 3 is less than the preset spacing. The side of the pin pad 3 other than the easy tin connection side is spaced apart from the solder resist layer 4 and forms a gap 6.

[0033] Because there may be a large number of pads on a substrate 1, not all pads have the risk of bridging. Therefore, this embodiment proposes that only the solder resist layer 4 between the pads 3 with the risk of bridging (i.e., the defined target pads) can be improved, and the surrounding sides of the other pin pads 3 except the target pads are separated from the solder resist layer 4 to form a circle of gaps. Moreover, when improving the solder resist layer 4 between the pads 3 with the risk of bridging, the first climbing layer 42 is only designed to cover the area near the side that is easy to bridging, and the gap 6 between the other sides that are not easy to bridging and the solder resist layer 4 is retained.

[0034] Furthermore, tinning can also be avoided by changing the shape of the pad 3 at the same time, for example, the pin pad 3 is elongated, such as a runway shape or an ellipse. The relatively long sides of the two elongated pads 3 are parallel and are also the sides that are easy to tin. Therefore, the area along the relatively long side of the surface of the pin pad 3 is covered by the first climbing layer 42 of the solder resist layer 4.

[0035] Compared with the circuit boards manufactured by the conventional design method, the utility model has obvious advantages: for the same devices and pin spacing, even if an elliptical pad design is adopted in the conventional design, the gap between the pin pads is only about 0.6 mm when the circuit board is actually measured; by adopting the scheme of this embodiment, the gap between the pin pads is expanded to about 1 mm when the circuit board is actually measured, thereby minimizing the probability of bridging.

[0036] Furthermore, a screen printing may be provided between two adjacent pin pads 3, and an isolation zone 5 on the solder resist layer 4. In a specific embodiment, the isolation zone 5 is formed by screen printing with white oil material.

[0037] Thanks to the expansion of the pad 3 spacing brought by the first climbing layer 42 of the solder resist layer 4, the width restriction of the isolation zone 5 becomes smaller, that is, compared with the traditional isolation zone solution, the isolation zone 5 can be designed to be a little wider in this embodiment, for example, the isolation zone 5 is also extended to the top of the pin pad 3 (with the solder resist layer 4 in the middle). Figure 5 , the horizontal projection of the isolation belt 5 on the substrate 1 partially overlaps with the horizontal projection of the two pin pads 3 corresponding thereto on the substrate 1, and the horizontal projection of the isolation belt 5 on the substrate 1 is located within the horizontal projection of the solder resist layer 4. More specifically, the isolation belt 5 includes a second main body layer 51 covering the first main body layer 41 and a second climbing layer 52 covering the first climbing layer 42, the thickness of the second main body layer 51 is greater than the thickness of the second climbing layer 52, and the top surfaces of the second main body layer 51 and the second climbing layer 52 (the top surface refers to the side facing away from the substrate 1) are flush.

[0038] In the traditional isolation belt solution, the second main body layer 51 can only be screen-printed on the first main body layer 41, so the operation requirements are very high, and the effect is greatly reduced. In this embodiment, thanks to the existence of the first climbing layer 42, the gap between the pin pads 3 is maximized, and the second main body layer 51 and the second climbing layer 52 can be screen-printed simultaneously in a wider range of the first main body layer 41 and the first climbing layer 42, which reduces the difficulty of alignment for PCB manufacturers and minimizes the difficulty of white oil screen printing. Observing the actual PCB under a microscope, it is found that the width of the isolation belt 5 between the pads 3 is significantly wider than that of the conventional design, and the effect of the isolation belt 5 is enhanced to the greatest extent. Therefore, adding an isolation belt 4 to the solution in which the solder mask layer 4 partially covers the pads 3 achieves a technical effect of one plus one greater than two, compared with the solution in which the solder mask layer 4 simply covers the pads 3 and the solution in which the isolation belt is simply added between the two pads.

[0039] Of course, this embodiment can also be combined with traditional solutions such as limiting the device layout direction and adding tin stealing pads to further avoid the risk of tin connection.

[0040] It is understandable that the colors of the solder mask layer 4 covering the pads 3 and the isolation zone 5 between the pads only need to be inconsistent, and other colors other than green and white are also acceptable. The size and shape of the solder mask covering the pads 3 are not completely consistent, which is related to the spacing between the pads 3 and the shape of the pads.

[0041] The manufacturing process of this embodiment is: if it is a newly manufactured circuit board, after the component pads 3 are designed according to the device data, the entire solder resist layer can be coated at one time, that is, the first main layer 41 and the first climbing layer 42 are coated at one time, and there is no gap between the solder resist layer 4 and the pads 3 in the direction of easy tin connection between the pads 3. The solder resist layer 4 is directly on the pads 3 (that is, the first climbing layer 42 is coated), so that the first climbing layer 42 covers part of the pads 3, and the gap between adjacent pads 3 is widened; if the existing circuit board is improved, the solder resist can be additionally coated on the pads 3 on the existing circuit board to form the first climbing layer 42; the isolation tape 5 is screen-printed on the first main layer 41 and the first climbing layer 42, which minimizes the production difficulty of the PCB manufacturer and reduces the poor effect of the isolation tape for preventing tin connection caused by the limited process capability of the PCB manufacturer.

[0042] In order to further compare and verify the effect of the utility model, we actually made a test board to verify the anti-soldering effect. The test board integrates different pad design schemes on the same substrate by area (for example, divided into four areas A, B, C, and D), ensuring that each scheme is horizontally compared under the same welding conditions: Area A is the scheme of this embodiment, and reference Figure 4 , 5, and no tin-stealing pads are laid; the other B, C, and D areas respectively adopt the conventional design of changing the pad shape, adding tin-stealing pads, and adding white silk screen lines; at the same time, the device layout direction of all areas is consistent, which is perpendicular to the single board transmission direction. This layout direction is more likely to produce tin-streaking, which not only increases the severity of the test, but also tests whether the anti-tin-streaking effect of this embodiment is limited by the device layout direction. From the final test data statistics, it can be concluded that the scheme of this embodiment has great advantages over other traditional schemes in the effect of anti-tin-streaking: the proportion of single boards with poor tin-streaking in area A is 0; the proportion of single boards with poor tin-streaking in area B is 26.6%; the proportion of single boards with poor tin-streaking in area C is 80%; the proportion of single boards with poor tin-streaking in area D is 100%. The data results show that the scheme of this embodiment is not limited by the component layout direction, and the scheme of this embodiment also has a good anti-tin-streaking effect without adding tin-stealing pads.

[0043] In summary, the utility model does not need to lay tin-stealing pads, saves PCB surface layout and routing space, and reduces dependence on pad surface tension; does not force the relationship between device layout direction and wave soldering board direction due to the need to prevent tin ligation, thereby increasing the degree of freedom of design; reduces dependence on the ability of "continuous carrier" when the transmission direction and device layout direction cannot be changed due to limited single board size, and still can achieve a good anti-tin ligation effect.

[0044] It should be noted that when an element is referred to as being "fixed to" another element, it may be directly on the other element or there may be an intermediate element. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be an intermediate element at the same time. The terms "vertical", "horizontal" and similar expressions used herein are for illustrative purposes only.

[0045] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used herein in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention.

[0046] Terms including ordinal numbers such as "first" and "second" used in this specification may be used to describe various components, but these components are not limited by these terms. The purpose of using these terms is only to distinguish one component from other components. For example, without departing from the scope of the present invention, the first component may be named as the second component, and similarly, the second component may also be named as the first component.

[0047] The embodiments of the utility model are described above in conjunction with the accompanying drawings, but the utility model is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the enlightenment of the utility model, ordinary technicians in this field can also make many forms without departing from the scope of protection of the utility model and the claims, which all fall within the protection of the utility model.

Claims

1. A circuit board for preventing soldering of plug-in pads, characterized in that: The invention comprises a substrate, wherein a plurality of component insertion holes arranged at intervals are provided on the substrate, a plurality of pin pads corresponding to the plurality of component insertion holes are provided on both sides of the substrate, the pin pads are formed around the periphery of the corresponding component insertion holes, and solder resist layers are also provided on both sides of the substrate to isolate the pin pads; The solder resist layer between two adjacent pin pads further extends to partially cover the pin pads, so as to expand the distance between the two adjacent pin pads to avoid solder joints.

2. The circuit board for preventing soldering of plug-in pads according to claim 1, characterized in that: The solder resist layer includes a first main layer covering the surface of the substrate and a first climbing layer covering the pin pads, and the thickness of the first main layer is greater than the thickness of the first climbing layer.

3. The circuit board for preventing soldering of plug-in pads according to claim 2, characterized in that: There is also an isolation zone silk-screened on the solder resist layer between two adjacent pin pads, and the horizontal projection of the isolation zone on the substrate partially overlaps with the horizontal projections of the two corresponding pin pads on the substrate, and the horizontal projection of the isolation zone on the substrate is located within the horizontal projection of the solder resist layer.

4. The circuit board for preventing soldering of plug-in pads according to claim 3, characterized in that: The isolation zone includes a second main body layer covering the first main body layer and a second climbing layer covering the first climbing layer, and the thickness of the second main body layer is greater than the thickness of the second climbing layer.

5. The circuit board for preventing soldering of plug-in pads according to claim 1, characterized in that: The circuit board includes at least one pair of target pads, and the pair of target pads refers to two pin pads whose spacing is less than a preset spacing. The solder resist layer between each pair of target pads extends to partially cover the pair of target pads to expand the distance between the pair of target pads to avoid solder bridging, and the four sides of the pin pads other than the target pads are spaced apart from the solder resist layer to form a circle of gaps.

6. The circuit board for preventing soldering of plug-in pads according to claim 5, characterized in that: The solder resist layer partially covers an area of ​​the surface of the pin pad close to its easy-to-solder side, where the easy-to-solder side refers to a side where the distance between the pin pad and other pin pads is less than the preset spacing.

7. The circuit board for preventing soldering of plug-in pads according to claim 6, characterized in that: Sides of the lead pad except the easy-to-solder side are spaced apart from the solder resist layer to form a gap.

8. The circuit board for preventing soldering of plug-in pads according to claim 6, characterized in that: The pin pad is in an elongated shape, and a relatively longer side of the pin pad is the side that is easy to solder.

9. The circuit board for preventing soldering of plug-in pads according to claim 1, wherein the component insertion hole penetrates the substrate along the thickness direction of the substrate, and the inner wall of the component insertion hole is provided with a metal layer connected to the corresponding pin pad.

Images