Anti-overcharge protection and load detection circuit and load socket

Abstract

The present disclosure provides an overcharge protection and load detection circuit and a load socket. The circuit includes an input circuit, a control circuit and an access identification circuit. The input circuit includes a first resistor, a second resistor and a first field effect transistor. The access identification circuit includes a comparator, a fifth resistor, a sixth resistor and a seventh resistor. When the electrical device is fully charged, the output current decreases, so that the level of the signal enable end is pulled down, the first field effect transistor is disconnected, causing the second field effect transistor to be turned off, and the current is transferred to the load interface through the fourth resistor to achieve overcharge protection of the device using the virtual voltage of the fourth resistor, and the effect is good. At this time, there is a voltage at the first end of the comparator, so that the output of the fourth end of the comparator is high level to identify that the load is removed. When the load is connected, the voltage at the first end of the comparator decreases, so that the output voltage of its fourth end decreases, thereby identifying that the load is connected, thereby achieving reliable load detection.

Description

Technical Field

[0001] The present disclosure relates to the fields of overcharge protection technology and load detection technology, and in particular to an overcharge protection and load detection circuit and a load socket. Background Art

[0002] Currently, many portable products such as portable power banks and portable electric vehicles use rechargeable and recyclable batteries. When the device is fully charged, there is a possibility of overcharging the battery, that is, the battery enters an overcharged state. This situation causes the internal pressure of the battery to increase, the battery to deform, and the battery to leak. The performance of the battery will also be significantly reduced and damaged, which will bring safety hazards.

[0003] To solve the problem of battery overcharging, publication number CN108365672A discloses a full charge protection circuit for a charger (hereinafter referred to as technology 1), including a primary rectifier module, a high-frequency transformer module, a secondary rectifier module, a sampling module, an MCU circuit module, a voltage comparison circuit, a pulse modulation module, a pulse drive module and a switching circuit; the internal reference triangle wave of the pulse modulation circuit is compared with the feedback voltage to generate a driving square wave, which drives the high-frequency closing and closing of the switching circuit through the pulse drive circuit, converts the DC voltage stored in the primary capacitor into a high-frequency voltage, and generates a relatively low high-frequency voltage on the secondary side through the mutual inductance of the transformer core.

[0004] At present, whether it is a new energy vehicle or an electric vehicle, a power connection module (USB port or cigarette lighter interface) is installed in the vehicle to connect the device for charging. For example, announcement number CN212649121U announced a car power module that can automatically identify the load (hereinafter referred to as technology 2), including an input unit, the input unit includes a connected DC input circuit and a first filter circuit; at least one identification and voltage regulation output unit, the identification and voltage regulation output unit includes a DC-DC conversion circuit, an electromagnetic anti-interference circuit, an energy conversion circuit, a second filter circuit and a DC output circuit connected in sequence, wherein the second filter circuit is also connected to the DC-DC conversion circuit through a current feedback circuit, and the second filter circuit communicates with the DC output circuit through a handshake protocol.

[0005] Although Technology 1 can solve the overcharging problem by reducing the charging current to the microampere level by generating an extremely low duty cycle when fully charged, when Technology 1 is applied to the load socket, it is unable to identify the connection status between the load and the circuit; Technology 2 can automatically identify loads of specific charging voltages and perform corresponding voltage reduction processing to protect the load battery, but it cannot guarantee the protection effect of the battery in an overcharged state.

[0006] Therefore, a circuit that is compatible with load detection and overcharge protection is needed. Utility Model Content

[0007] The purpose of the present invention is to overcome the deficiencies in the prior art and provide an overcharge protection and load detection circuit and a load socket for effective overcharge protection and load detection.

[0008] The purpose of this disclosure is achieved through the following technical solutions:

[0009] An overcharge protection and load detection circuit, comprising:

[0010] An input circuit includes a first resistor, a second resistor and a first field effect transistor, wherein a first end of the first resistor is connected to a signal enable end, a second end of the first resistor is connected to a control end of the first field effect transistor, the control end of the first field effect transistor is grounded through the second resistor, and a second end of the first field effect transistor is grounded;

[0011] A control circuit comprises a third resistor, a fourth resistor and a second field effect transistor, wherein a first end of the second field effect transistor is connected to a controllable power supply, a first end of the second field effect transistor is also connected to a first end of the third resistor and a first end of the fourth resistor respectively, a second end of the third resistor is connected to a first end of the first field effect transistor, a second end of the fourth resistor is connected to a second end of the second field effect transistor, a control end of the second field effect transistor is connected to a second end of the third resistor, and a second end of the second field effect transistor is connected to a load interface;

[0012] The access identification circuit includes a comparator, a fifth resistor, a sixth resistor and a seventh resistor. The first end of the comparator is respectively connected to the first end of the fifth resistor and the second end of the second field effect tube, the second end of the fifth resistor is connected to the fifth end of the comparator, and the fifth end of the comparator is connected to a reference power supply; the second end of the comparator is grounded, the third end of the comparator is connected to the first end of the sixth resistor, the first end of the sixth resistor is connected to the reference power supply, the second end of the sixth resistor is grounded, and the fourth end of the comparator is connected to the output end through the seventh resistor.

[0013] In one embodiment, the control circuit further includes an eighth resistor, and the second end of the third resistor is connected to the first end of the first field effect transistor through the eighth resistor.

[0014] In one embodiment, the control circuit further includes a voltage regulator diode, an anode of the voltage regulator diode is connected to the second end of the third resistor, and a cathode of the voltage regulator diode is connected to the first end of the third resistor.

[0015] In one embodiment, the access identification circuit further includes a ninth resistor, a first end of the ninth resistor is connected to a reference power supply, and a second end of the ninth resistor is connected to a first end of the sixth resistor.

[0016] In one embodiment, the access identification circuit further includes a voltage-stabilizing capacitor, an upper half of the voltage-stabilizing capacitor is connected to the first end of the ninth resistor, and a lower half of the voltage-stabilizing capacitor is connected to the second end of the sixth resistor.

[0017] In one embodiment, the access identification circuit further includes a universal diode, an anode of the universal diode is connected to the first end of the fifth resistor, and a cathode of the universal diode is connected to the second end of the second field effect transistor.

[0018] In one of the embodiments, the anti-overcharge protection and load detection circuit further includes a storage capacitor, the upper end of the storage capacitor is connected to the cathode of the universal diode, and the lower end of the storage capacitor is grounded.

[0019] In one embodiment, at least one of the first resistor and the second resistor is a variable resistor.

[0020] In one embodiment, the third resistor is a variable resistor.

[0021] A load socket comprises the anti-overcharge protection and load detection circuit described in any one of the above embodiments.

[0022] Compared with the prior art, the present invention has at least the following advantages:

[0023] 1. In the above-mentioned overcharge protection and load detection circuit, when the device is fully charged, the output current decreases, so that the level of the signal enable end is pulled down, the first field effect tube is disconnected, so that the second field effect tube cannot be turned on and is turned off, and the current is transferred to the load interface through the fourth resistor. Therefore, the overcharge protection and load detection circuit can use the virtual voltage of the fourth resistor to pass the current to the comparator, thereby protecting the device from overcharge, so that the overcharge protection effect is better.

[0024] 2. When the device is fully charged, due to the virtual voltage of the fourth resistor, there is a voltage at the first end of the comparator, so that the output of the fourth end of the comparator is high level to identify the removal of the load. When the load is connected, the voltage of the first end of the comparator decreases and is lower than the voltage of its third end, so that the output voltage of its fourth end decreases, thereby identifying the connection of the load. In this way, the circuit can achieve reliable load detection. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present disclosure and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0026] Figure 1 FIG. 4 is a circuit diagram of an overcharge protection and load detection circuit in one embodiment.

[0027] Reference numerals: 10, anti-overcharge protection and load detection circuit; 100, input circuit; 200, control circuit; 300, access identification circuit; R262, first resistor; R263, second resistor; R261, third resistor; R265, fourth resistor; R266, fifth resistor; R269, sixth resistor; R267, seventh resistor; R264, eighth resistor; R268, ninth resistor; R11, first voltage-stabilizing resistor; R12, second voltage-stabilizing resistor;

[0028] Q48, first field effect transistor; Q47, second field effect transistor; D49, general diode; ZD7, voltage regulator diode; TVS12, first bidirectional voltage regulator diode; TVS22, second bidirectional voltage regulator diode; C11, storage capacitor; C177, voltage regulator capacitor; U9, comparator; J6, load interface; USB-A1_EN, signal enable terminal; USB-A1_Det, output terminal. DETAILED DESCRIPTION

[0029] In order to facilitate the understanding of the present disclosure, the present disclosure will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present disclosure are given in the drawings. However, the present disclosure can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present disclosure more thoroughly and comprehensively understood.

[0030] It should be noted that when an element is referred to as being "fixed to" another element, it may be directly on the other element or there may be a central element. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be a central element at the same time. The terms "vertical", "horizontal", "left", "right" and similar expressions used herein are for illustrative purposes only and do not represent the only implementation method.

[0031] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present disclosure. The terms used herein in the specification of the present disclosure are only for the purpose of describing specific embodiments and are not intended to limit the present disclosure. The term "and / or" used herein includes any and all combinations of one or more related listed items.

[0032] In order to better understand the technical solutions and beneficial effects of the present invention, the present invention is further described in detail below in conjunction with specific embodiments:

[0033] like Figure 1As shown, the present disclosure provides an overcharge protection and load detection circuit 10 , including an input circuit 100 , a control circuit 200 and an access identification circuit 300 .

[0034] The input circuit 100 includes a first resistor R262, a second resistor R263 and a first field effect transistor Q48, wherein a first terminal of the first resistor R262 is connected to a signal enable terminal USB-A1_EN, a second terminal of the first resistor R262 is connected to a control terminal of the first field effect transistor Q48, the control terminal of the first field effect transistor Q48 is grounded through the second resistor R263, and a second terminal of the first field effect transistor Q48 is grounded;

[0035] The control circuit 200 includes a third resistor R261, a fourth resistor R265 and a second field effect transistor Q47, wherein a first end of the second field effect transistor Q47 is connected to a controllable power supply, a first end of the second field effect transistor Q47 is also connected to a first end of the third resistor R261 and a first end of the fourth resistor R265, a second end of the third resistor R261 is connected to a first end of the first field effect transistor Q48, a second end of the fourth resistor R265 is connected to a second end of the second field effect transistor Q47, a control end of the second field effect transistor Q47 is connected to a second end of the third resistor R261, and a second end of the second field effect transistor Q47 is connected to a load interface J6;

[0036] The access identification circuit 300 includes a comparator U9, a fifth resistor R266, a sixth resistor R269 and a seventh resistor R267. The first end of the comparator U9 is respectively connected to the first end of the fifth resistor R266 and the second end of the second field effect transistor Q47, the second end of the fifth resistor R266 is connected to the fifth end of the comparator U9, and the fifth end of the comparator U9 is connected to a reference power supply; the second end of the comparator U9 is grounded, the third end of the comparator U9 is connected to the first end of the sixth resistor R269, the first end of the sixth resistor R269 is connected to the reference power supply, the second end of the sixth resistor R269 is grounded, and the fourth end of the comparator U9 is connected to the output terminal USB-A1_Det through the seventh resistor R267.

[0037] In this embodiment, when the electrical device is fully charged, the output current gradually decreases. When the output current continues to be less than a certain value, the level of the signal enable terminal USB-A1_EN is pulled down, so that the first field effect transistor Q48 cannot reach the conduction condition and is then turned off. At this time, the second field effect transistor Q47 is also turned off due to the disconnection of the first field effect transistor Q48. At this time, the output current will be output to the load interface J6 through the fourth resistor R265, that is, the output positive electrode, and then there is a virtual voltage at the output positive electrode, and the current is passed to the comparator U9, thereby protecting the device from overcharging, avoiding overcharging of the battery of the device, and ensuring the safety performance of the battery; there is a voltage at the first terminal VIN+ of the comparator U9, and the voltage is 3.3V. At this time, the fourth terminal VOUT of the comparator U9 outputs a high level, so that the circuit determines that the load is removed. When the load is connected, its power terminal is powered through the load interface J6, causing the voltage of the first terminal VIN+ of the comparator U9 to decrease and be lower than the third terminal VIN- of the comparator U9. At this time, the fourth terminal VOUT of the comparator U9 outputs a low level, and the circuit recognizes that the signal enable terminal USB-A1_EN has a high-level signal input, and then turns on the first field effect transistor Q48 and the second field effect transistor Q47 in turn. In this way, load connection identification can be realized with good reliability.

[0038] At the same time, after the load is connected, the transmission positive pole D+ and the transmission negative pole D- of the load interface J6 will be connected for data transmission. The first bidirectional voltage regulator diode TVS12 and the first voltage regulator resistor R11 are connected in series between the transmission negative pole D- and the ground. The second bidirectional voltage regulator diode TVS22 and the second voltage regulator resistor R12 are connected in series between the transmission negative pole D+ and the ground to ensure data transmission between the load and the circuit and reduce voltage fluctuations.

[0039] Furthermore, the first field effect transistor Q48 is an NMOS transistor, whose first end is a drain, the second end is a source, and the control end is a gate; the second field effect transistor Q47 is a PMOS transistor, whose first end is a source, the second end is a drain, and the control end is a gate.

[0040] In one embodiment, the control circuit 200 further includes an eighth resistor R264, and the second end of the third resistor R261 is connected to the first end of the first field effect transistor Q48 through the eighth resistor R264. It can be understood that the eighth resistor R264 is connected in series to the first end of the first field effect transistor Q48 to further protect the first field effect transistor Q48 and prevent the first field effect transistor Q48 from being broken down due to excessive current.

[0041] In one embodiment, the control circuit 200 further includes a voltage regulator diode ZD7, the anode of the voltage regulator diode ZD7 is connected to the second end of the third resistor R261, and the cathode of the voltage regulator diode ZD7 is connected to the first end of the third resistor R261. It can be understood that the voltage regulator diode ZD7 is connected in parallel with the third resistor R261 to stabilize the voltage of the control circuit 200 and reduce the possibility of component damage caused by voltage fluctuations. At the same time, the setting of the third resistor R261 can limit the current size to protect the voltage regulator diode ZD7 and prevent large current from breaking through the voltage regulator diode ZD7.

[0042] In one embodiment, the access identification circuit 300 also includes a ninth resistor R268, a first end of the ninth resistor R268 is connected to a reference power supply, and a second end of the ninth resistor R268 is connected to a first end of a sixth resistor R269 to limit the voltage of the third end VIN- of the comparator U9 to ensure the normal operation of the comparator U9.

[0043] In one embodiment, the access identification circuit 300 further includes a voltage-stabilizing capacitor C177, the upper half of which is connected to the first end of the ninth resistor R268, and the lower half of which is connected to the second end of the sixth resistor R269. It can be understood that the sixth resistor R269 is connected in series with the ninth resistor R268, and the resistor group formed by the sixth resistor R269 and the ninth resistor R268 is connected in parallel with the voltage-stabilizing capacitor C177 to form a capacitor-resistance circuit to stabilize the voltage and reduce the possibility of damaging components due to large voltage fluctuations. At the same time, it is also convenient to compare the voltage of the first terminal VIN+ of the comparator U9 with the voltage of the third terminal VIN-, so as to output the corresponding level at the fourth terminal VOUT, and judge whether the load is connected or removed according to the level state.

[0044] In one embodiment, the access identification circuit 300 further includes a universal diode D49, an anode of the universal diode D49 connected to the first end of the fifth resistor R266, and a cathode of the universal diode D49 connected to the second end of the second field effect transistor Q47, so as to avoid the interaction between the current of the control circuit 200 and the current of the access identification circuit 300, resulting in damage to the components.

[0045] In one embodiment, the overcharge protection and load detection circuit 10 further includes a storage capacitor C11, the upper end of the storage capacitor C11 is connected to the cathode of the universal diode D49, and the lower end of the storage capacitor C11 is grounded. Furthermore, when the current is output to the load interface J6, the voltage is stored through the storage capacitor C11 at the same time, thereby ensuring the stability of the voltage and reducing the possibility of functional failure caused by voltage fluctuations.

[0046] In one embodiment, at least one of the first resistor R262 and the second resistor R263 is a variable resistor. It can be understood that when at least one of the first resistor R262 and the second resistor R263 is a variable resistor, the conduction condition of the first field effect transistor Q48 can be adjusted by adjusting the resistance value of one or both of the first resistor R262 and the second resistor R263, thereby adapting to more models of the first field effect transistor Q48.

[0047] In one embodiment, the third resistor R261 is a variable resistor. It is understood that when the third resistor R261 is a variable resistor, the conduction condition of the second field effect transistor Q47 can be adjusted by adjusting the resistance value of the third resistor R261, thereby adapting to more types of second field effect transistors Q47.

[0048] The present disclosure also provides a load socket, including the anti-overcharge protection and load detection circuit 10 of any of the above embodiments. When the load socket adopts the anti-overcharge protection and load detection circuit 10, it can ensure that the device is protected against overcharge after being fully charged, and is compatible with load access identification, and has good reliability.

[0049] Compared with the prior art, the present invention has at least the following advantages:

[0050] 1. In the above-mentioned overcharge protection and load detection circuit 10, when the electrical device is fully charged, the output current decreases, so that the level of the signal enable terminal USB-A1_EN is pulled down, the first field effect transistor Q48 is disconnected, so that the second field effect transistor Q47 cannot be turned on and is turned off, and the current is transferred to the load interface J6 through the fourth resistor R265. Therefore, the overcharge protection and load detection circuit 10 can use the virtual voltage of the fourth resistor R265 to pass the current to the comparator U9, thereby protecting the device from overcharge, so that the overcharge protection effect is better.

[0051] 2. When the device is fully charged, due to the virtual voltage of the fourth resistor R265, there is a voltage at the first terminal VIN+ of the comparator U9, so that the output of the fourth terminal VOUT of the comparator U9 is high level to identify that the load is removed. When the load is connected, the voltage of the first terminal VIN+ of the comparator U9 decreases and is lower than the voltage of its third terminal VIN-, so that the output voltage of its fourth terminal VOUT decreases, thereby identifying that the load is connected. In this way, the circuit can achieve reliable load detection.

[0052] The above-mentioned embodiments only express several implementation methods of the present disclosure, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the disclosed patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present disclosure, and these all belong to the protection scope of the present disclosure. Therefore, the protection scope of the disclosed patent shall be subject to the attached claims.

Claims

1. An overcharge protection and load detection circuit (10), characterized in that: include: An input circuit (100) comprises a first resistor (R262), a second resistor (R263) and a first field effect transistor (Q48), wherein a first end of the first resistor (R262) is connected to a signal enable end (USB-A1_EN), a second end of the first resistor (R262) is connected to a control end of the first field effect transistor (Q48), the control end of the first field effect transistor (Q48) is grounded through the second resistor (R263), and a second end of the first field effect transistor (Q48) is grounded; A control circuit (200) comprises a third resistor (R261), a fourth resistor (R265) and a second field effect transistor (Q47), wherein a first end of the second field effect transistor (Q47) is connected to a controllable power supply, a first end of the second field effect transistor (Q47) is also respectively connected to a first end of the third resistor (R261) and a first end of the fourth resistor (R265), a second end of the third resistor (R261) is connected to a first end of the first field effect transistor (Q48), a second end of the fourth resistor (R265) is connected to a second end of the second field effect transistor (Q47), a control end of the second field effect transistor (Q47) is connected to a second end of the third resistor (R261), and a second end of the second field effect transistor (Q47) is connected to a load interface; An access identification circuit (300) comprises a comparator (U9), a fifth resistor (R266), a sixth resistor (R269) and a seventh resistor (R267); a first end of the comparator (U9) is respectively connected to a first end of the fifth resistor (R266) and a second end of the second field effect transistor (Q47); a second end of the fifth resistor (R266) is connected to a fifth end of the comparator (U9); and a fifth end of the comparator (U9) is connected to a reference power supply; a second end of the comparator (U9) is grounded; a third end of the comparator (U9) is connected to a first end of the sixth resistor (R269); a first end of the sixth resistor (R269) is connected to a reference power supply; a second end of the sixth resistor (R269) is grounded; and a fourth end of the comparator (U9) is connected to an output end (USB-A1_Det) via the seventh resistor (R267).

2. The overcharge protection and load detection circuit (10) according to claim 1, characterized in that: The control circuit (200) further comprises an eighth resistor (R264), and the second end of the third resistor (R261) is connected to the first end of the first field effect transistor (Q48) through the eighth resistor (R264).

3. The overcharge protection and load detection circuit (10) according to claim 1, characterized in that: The control circuit (200) further comprises a voltage-stabilizing diode (ZD7), wherein an anode of the voltage-stabilizing diode (ZD7) is connected to the second end of the third resistor (R261), and a cathode of the voltage-stabilizing diode (ZD7) is connected to the first end of the third resistor (R261).

4. The overcharge protection and load detection circuit (10) according to claim 1, characterized in that: The access identification circuit (300) further comprises a ninth resistor (R268), a first end of the ninth resistor (R268) being connected to a reference power supply, and a second end of the ninth resistor (R268) being connected to a first end of the sixth resistor (R269).

5. The overcharge protection and load detection circuit (10) according to claim 4, characterized in that: The access identification circuit (300) further comprises a voltage-stabilizing capacitor (C177), wherein the upper end of the voltage-stabilizing capacitor (C177) is connected to the first end of the ninth resistor (R268), and the lower end of the voltage-stabilizing capacitor (C177) is connected to the second end of the sixth resistor (R269).

6. The overcharge protection and load detection circuit (10) according to claim 1, characterized in that: The access identification circuit (300) further comprises a universal diode (D49), wherein an anode of the universal diode (D49) is connected to a first end of the fifth resistor (R266), and a cathode of the universal diode (D49) is connected to a second end of the second field effect transistor (Q47).

7. The overcharge protection and load detection circuit (10) according to claim 6, characterized in that: The anti-overcharge protection and load detection circuit (10) also includes a storage capacitor (C11), the upper end of the storage capacitor (C11) is connected to the cathode of the universal diode (D49), and the lower end of the storage capacitor (C11) is grounded.

8. The overcharge protection and load detection circuit (10) according to claim 1, characterized in that: At least one of the first resistor (R262) and the second resistor (R263) is a variable resistor.

9. The overcharge protection and load detection circuit (10) according to claim 1, characterized in that: The third resistor (R261) is a variable resistor.

10. A load socket, characterized in that: It comprises the anti-overcharge protection and load detection circuit (10) as described in any one of claims 1 to 9.

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