Ultrahigh-frequency electronic tag read-write module

Abstract

The utility model provides an ultrahigh frequency electronic tag read-write module, the front side of a PCBA board is divided into a first area, a second area, a shielding cover bonding pad area and an element area, the first area is arranged on one side of the front side of the PCBA board, and the second area and the first area are arranged oppositely at a preset interval. The shielding cover bonding pad area is arranged between the first area and the second area, and the element area is arranged in the shielding cover bonding pad area; the element area is divided into an upper area and a lower area, the left side of the upper area is divided into a left upper area and a left lower area, and the left upper area and the left lower area are arranged up and down; the right side of the upper region is divided into a right region. According to the utility model, reasonable circuit layout is adopted, the number of components on the PCBA board is reduced, the space utilization rate is improved to the maximum, the overall area of the module is reduced, the production cost and the BOM management cost are reduced, and the application range and application scenarios are increased.

Description

Technical Field

[0001] The utility model relates to the technical field of ultra-high frequency circuits, in particular to an ultra-high frequency electronic tag reading and writing module. Background Art

[0002] The UHF reader / writer is a device that uses radio frequency identification technology and combines a proprietary high-efficiency signal processing algorithm to achieve fast reading and writing of electronic tags while maintaining high recognition. It can be applied to various wireless radio frequency identification systems such as logistics, access control, anti-counterfeiting, unmanned retail and production process control.

[0003] Prior art CN212906331U discloses a UHF ultra-high frequency four-channel radio frequency reader-writer module, including a PCB board, on which a reader-writer chip, a radio frequency power amplifier, a coupler and an antenna are distributed, the reader-writer chip is located at the upper right part of the PCB board, the radio frequency power amplifier is located at the middle left part of the PCB board, the coupler is located at the middle upper part of the PCB board, and the coupler is located at the upper left part of the reader-writer chip, and the antenna is located above the coupler. The circuit layout of the radio frequency reader-writer module is not reasonable enough, resulting in a relatively large volume of the radio frequency reader-writer module, increasing production costs and management costs, and cannot be used in a confined space environment. Utility Model Content

[0004] In view of the problems existing in the above prior art, the purpose of the utility model is to provide an ultra-high frequency electronic tag reading and writing module, which has a reasonable layout and a small size, reduces production costs and management costs, and can be used in a confined space environment.

[0005] The utility model provides an ultra-high frequency electronic tag reading and writing module, comprising a PCBA board, and a first packaging pad, a power processing unit, a radio frequency signal receiving and transmitting unit, a protocol logic processing unit, a radio frequency signal amplifying unit, and a second packaging pad arranged on the front of the PCBA board and connected in circuit;

[0006] The front side of the PCBA board is divided into a first area, a second area, a shielding cover pad area and a component area, the first area is arranged at one side of the front side of the PCBA board, the second area is spaced a predetermined distance from the first area and arranged opposite to the first area, the shielding cover pad area is arranged between the first area and the second area, and the component area is arranged inside the shielding cover pad area;

[0007] The component area is divided into an upper area and a lower area, the left side of the upper area is divided into a left upper area and a left lower area, the left upper area and the left lower area are arranged up and down; the right side of the upper area is divided into a right area;

[0008] The first package pad, the second package pad, the power processing unit, the protocol logic processing unit, the RF signal receiving and transmitting unit, and the RF signal amplifying unit are respectively and correspondingly arranged in the first area, the second area, the upper left area, the lower left area, the right area, and the lower area; the power input port of the first package pad is arranged in the upper left corner of the first area, and the RF signal input and output port of the first package pad is arranged in the lower right corner of the second area.

[0009] Further, the upper left area is divided into an upper left area 1 and an upper left area 2, and the upper left area 1 and the upper left area 2 are arranged one above the other.

[0010] Furthermore, the power processing unit includes a first power supply unit and a second power supply unit, the first power supply unit and the second power supply unit are respectively arranged in the upper left area and the upper left area, the first power supply unit provides power to the RF signal amplifying unit, and the second power supply unit provides power to the RF signal receiving and sending unit and the protocol logic processing unit respectively.

[0011] Furthermore, the radio frequency signal receiving and transmitting unit includes a crystal oscillator and a radio frequency reader chip, the radio frequency reader chip is arranged in the middle right area of ​​the right area, and the crystal oscillator is arranged in the upper left area of ​​the right area.

[0012] Furthermore, the model of the radio frequency reader chip is an IPJ-E310 radio frequency reader chip, an IPJ-E510 radio frequency reader chip, an IPJ-E710 radio frequency reader chip or an IPJ-E910 radio frequency reader chip.

[0013] Furthermore, the lower area is divided into a surface acoustic wave filtering area, a first attenuation area, a power amplification area, and a coupling filtering area, and the surface acoustic wave filtering area, the first attenuation area, the power amplification area, and the coupling filtering area are arranged in sequence from left to right.

[0014] Furthermore, the surface acoustic wave filtering region, the first attenuation region, the power amplification region, and the coupling filtering region are arranged substantially in a straight line from left to right.

[0015] Furthermore, the RF signal amplification unit includes a circuit-connected surface acoustic wave filter unit, a first attenuation network, a RF power amplifier, a second attenuation network, a coupler, and a low-pass filter network; the surface acoustic wave filter unit, the first attenuation network, and the RF power amplifier are respectively arranged in the surface acoustic wave filter area, the first attenuation area, and the power amplification area; the second attenuation network, the coupler, and the low-pass filter network are arranged in the coupled filter area.

[0016] Furthermore, the surface acoustic wave filtering unit includes a surface acoustic wave filter.

[0017] Furthermore, the surface acoustic wave filtering unit includes two surface acoustic wave filters connected by a circuit and a switching switch, the two surface acoustic wave filters are arranged in the left area of ​​the surface acoustic wave filtering area and distributed up and down, and the switching switch is arranged in the right area of ​​the surface acoustic wave filtering area.

[0018] Furthermore, the coupler and the second attenuation network are arranged in a left area of ​​the coupling filtering area and are distributed up and down, and the low-pass filtering network is arranged in a right area of ​​the coupling filtering area.

[0019] Furthermore, the PCBA board is a multi-layer circuit board.

[0020] Furthermore, the PCBA board is a six-layer circuit board.

[0021] Furthermore, the size of the PCBA board is between greater than or equal to 16 mm×16 mm and less than or equal to 22 mm×22 mm.

[0022] Further, a first recessed area is arranged in the upper right area of ​​the upper left area close to the right area, a first raised area is arranged in the right area corresponding to the first recessed area, and the first raised area is arranged in the first recessed area.

[0023] Furthermore, a second raised area is arranged in the lower area on the right side of the upper left area close to the right area, a second recessed area is arranged in the right area corresponding to the second raised area, the second raised area is arranged in the second recessed area, and the first raised area and the second raised area are arranged alternately.

[0024] Further, a third raised area is arranged upwardly in the middle of the lower area, a third recessed area is arranged in the lower left area of ​​the right area corresponding to the third raised area, and the third raised area is arranged in the third recessed area.

[0025] Further, a space is formed between the third raised area and the third recessed area, a sixth raised area is arranged in the middle of the left lower area corresponding to the space, and the sixth raised area is arranged in the space.

[0026] Furthermore, a fourth raised area is arranged downwardly in the lower right area of ​​the right area, a fourth recessed area is formed between the third raised area and the shielding cover pad area, the fourth raised area is arranged in the fourth recessed area, and the third raised area and the fourth raised area are arranged alternately.

[0027] Further, the sum of the areas of the first region and the second region is 10.2% of the area of ​​the PCBA board, the area of ​​the shielding pad region is 12.6% of the area of ​​the PCBA board, the area of ​​the upper left region is 11.2% of the area of ​​the PCBA board, the area of ​​the lower left region is 14.4% of the area of ​​the PCBA board, the area of ​​the right region is 30.1% of the area of ​​the PCBA board, and the area of ​​the lower region is 21.5% of the area of ​​the PCBA board.

[0028] Furthermore, a shielding cover is also included, and the shielding cover is welded on the shielding cover pad area.

[0029] Furthermore, the power input port is connected to the power processing unit circuit, the power processing unit is respectively connected to the RF signal receiving and sending unit and the protocol logic processing unit circuit and provides power, and the protocol logic processing unit, the RF signal receiving and sending unit, the RF signal amplifying unit, and the RF signal input and output port are connected in sequence.

[0030] According to the utility model of the above scheme, the beneficial effects of the utility model are:

[0031] The utility model adopts a reasonable circuit layout, divides the PCBA board reasonably, divides the PCBA board into the first area, the second area, the upper left area, the lower left area, the right area, and the lower area, and respectively arranges the first package pad, the second package pad, the power processing unit, the protocol logic processing unit, the radio frequency signal receiving and transmitting unit, and the radio frequency signal amplifying unit in the first area, the second area, the upper left area, the lower left area, the right area, and the lower area; reduces the number of components on the PCBA board, and through a reasonable layout method, ensures the performance of the ultra-high frequency electronic tag reading and writing module, while increasing the space utilization to the extreme, so that the overall area of ​​the module is reduced. The production cost and BOM management cost are greatly reduced, so that the ultra-high frequency electronic tag reading and writing module can be used in an extremely limited space environment, which greatly increases the application scope and application scenarios of the module. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 It is a schematic diagram of the plane structure of the utility model.

[0033] Figure 2 yes Figure 1 Schematic diagram of PCB layout structure.

[0034] Reference numerals:

[0035] 11. First package pad; 12. Power input port; 15. First area; 21. Second package pad; 22. RF signal input and output port; 25. Second area;

[0036] 31. Power processing unit; 32. DC-DC power chip; 33. Low voltage difference linear regulator; 35. Upper left area; 36. Second raised area; 41. Protocol logic processing unit; 42. Single chip microcomputer; 45. Lower left area; 46. Sixth raised area; 51. RF signal receiving and transmitting unit; 52. RF reader chip; 53. Crystal oscillator; 55. Right area; 56. First raised area; 57. Fourth raised area; 61. RF signal amplifying unit; 62. Surface acoustic wave filter unit; 63. First attenuation network; 64. RF power amplifier; 65. Coupler; 66. Second attenuation network; 67. Low pass filter network;

[0037] 75. Lower area; 76. Third raised area; 77. Fifth raised area; 78. Step portion; 85. Shielding cover pad area; 91. SAW filter area; 92. First attenuation area; 93. Power amplification area; 94. Coupling filter area; 100. PCBA board. DETAILED DESCRIPTION

[0038] The utility model is further described below in conjunction with the accompanying drawings and specific embodiments. The following description is only exemplary and does not limit the protection scope of the utility model.

[0039] In the description of the present invention, it should be noted that the terms "center", "up", "down", "left", "right", "vertical", "horizontal", "inside", "outside", etc. indicate directions or positional relationships based on the directions or positional relationships shown in the accompanying drawings. They are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the positions or elements referred to must have specific directions, be constructed and operated in specific directions. Therefore, they cannot be understood as limitations on the present invention.

[0040] In addition, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features. Therefore, the definition of "first" and "second" features can explicitly or implicitly include one or more of the features. In the description of the utility model, the meaning of "several" is two or more, unless otherwise clearly and specifically defined.

[0041] In the present invention, unless otherwise specified and limited, the terms "assembly", "connection" and "connection" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can also be a mechanical connection; it can be directly connected, or it can be connected through an intermediate medium, or the two elements can be internally connected. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0042] like Figure 1 and Figure 2 As shown, an ultra-high frequency electronic tag reading and writing module includes a PCBA board 100, and a first packaging pad 11, a power processing unit 31, a radio frequency signal receiving and transmitting unit 51, a protocol logic processing unit 41, a radio frequency signal amplifying unit 61, and a second packaging pad 21 arranged on the front side of the PCBA board 100 and circuit-connected.

[0043] The power input port 12 of the first package pad 11 is circuit-connected to the power processing unit 31, and the power processing unit 31 is circuit-connected to the RF signal receiving and transmitting unit 51 and the protocol logic processing unit 41 respectively and provides power. The protocol logic processing unit 41, the RF signal receiving and transmitting unit 51, the RF signal amplifying unit 61, and the RF signal input and output port 22 of the second package pad 21 are circuit-connected in sequence.

[0044] In this embodiment, the size of the PCBA board 100 is between 16mm×16mm and 22mm×22mm. For example, the size of the PCBA board 100 is 16mm×16mm, 16.5mm×16.5mm, 17mm×17mm, 18mm×18mm, 18.5mm×18.5mm, 19mm×19mm, 20mm×20mm, 21mm×21mm, and 22mm×22mm. The PCBA board 100 is a multi-layer circuit board. The connection circuits between the components are arranged in the PCBA board 100. The PCBA board 100 can be a 5-layer board, a 6-layer board, a 7-layer board, etc. These are just examples, and the utility model is not limited thereto.

[0045] In this embodiment, the front of the PCBA board 100 is divided into a first area 15, a second area 25, a shielding pad area 85 and a component area. The first area 15 is arranged on one side (left side) of the front of the PCBA board 100, and the second area 25 is spaced a predetermined distance from the first area 15 and arranged opposite to the first area 15 (right side). The shielding pad area 85 is arranged between the first area 15 and the second area 25 in a rectangular frame shape, and the component area is arranged inside the shielding pad area 85.

[0046] The component area is divided into an upper area and a lower area 75 , the left side of the upper area is divided into a left upper area 35 and a left lower area 45 , and the left upper area 35 and the left lower area 45 are arranged vertically; the right side of the upper area is divided into a right area 55 .

[0047] The first package pad 11, the second package pad 21, the power processing unit 31, the protocol logic processing unit 41, the RF signal receiving and transmitting unit 51, and the RF signal amplifying unit 61 are respectively arranged in the first area 15, the second area 25, the upper left area 35, the lower left area 45, the right area 55, and the lower area 75; the power input port 12 of the first package pad 11 is arranged at the upper left corner of the first area 15, and the RF signal input and output port 22 of the first package pad 11 is arranged at the lower right corner of the second area 25.

[0048] In this embodiment, the first area 15 and the second area 25 are rectangular, the width of the first area 15 is 0.9 mm, and the height of the first area 15 is 19 mm. These are just examples, and the present invention is not limited thereto.

[0049] The first package pad 11 is arranged in the first area 15, and the first package pad 11 includes a plurality of first interfaces arranged from top to bottom, and the plurality of first interfaces are VCC (power input port 12), GND, EN, GPO2, GPI1, GPI2, RX, TX, NRST, and GPO1. The second package pad 21 is arranged in the second area 25, and the second package pad 21 includes a plurality of second interfaces arranged from top to bottom, and the plurality of second interfaces are GND, 3.0V, SWDCL, K, SWDIO, GPIO1, GPIO2, GND, GND, RFOUT (radio frequency signal input and output port 22), and GND.

[0050] In this embodiment, the shielding cover pad area 85 is arranged between the first area 15 and the second area 25 in a "mouth" shape, the upper frame area and the lower frame area of ​​the shielding cover pad area 85 are flush with the upper edge and the lower edge of the PCBA board 100, the left frame area of ​​the shielding cover pad area 85 is arranged between the first area 15 and the component area, and the right frame area of ​​the shielding cover pad area 85 is arranged between the component area and the second area 25.

[0051] A shielding cover (not shown) is also included. The shielding cover is welded on the shielding cover pad area 85 , and the four sides of the shielding cover are welded in the rectangular frame of the shielding cover pad area 85 .

[0052] In this embodiment, the upper left area 35 is staggered with the right area 55, and the lower left area 45 and the lower area 75 are staggered with the right area 55, respectively. The advantage of this design is that more components can be arranged in a small area, increasing the density of component arrangement in the area, so that each space on the PCBA board 100 is arranged with components, improving the space utilization rate of the PCBA board 100, and further reducing the size of the PCBA board 100. The specific staggered arrangement is as follows:

[0053] 1. A first recessed area (not marked) is provided in the upper right area of ​​the upper left area 35 near the right area 55, and a first raised area 56 is provided in the right area 55 corresponding to the first recessed area. The first raised area 56 is provided in the first recessed area.

[0054] A second raised area 36 is arranged in the lower right area of ​​the left upper area 35 near the right area 55, a second recessed area is arranged in the right area 55 corresponding to the second raised area 36, ​​the second raised area 36 is arranged in the second recessed area, and the first raised area 56 and the second raised area 36 are arranged alternately.

[0055] 2. A third raised area 76 is arranged upward in the middle of the lower area 75 , and a third recessed area is arranged in the lower left area of ​​the right area 55 corresponding to the third raised area 76 , and the third raised area 76 is arranged in the third recessed area.

[0056] A space is formed between the third raised area 76 and the third recessed area, and a sixth raised area 46 is disposed in the space corresponding to the middle of the left lower area 45 , and the sixth raised area 46 is disposed in the space.

[0057] A fifth raised area 77 is disposed on the right side of the third raised area 76, and the fifth raised area 77 is disposed in the third recessed area. A step portion 78 is disposed on the bottom sidewall of the third raised area 76, and the step portion 78 is disposed in the third recessed area.

[0058] A fourth raised area 57 is arranged downwardly in the lower right area of ​​the right area 55, a fourth recessed area is formed between the third raised area 76 and the shielding cover pad area 85, the fourth raised area 57 is arranged in the fourth recessed area, and the third raised area 76 and the fourth raised area 57 are arranged alternately.

[0059] In this embodiment, the sum of the areas of the first area 15 and the second area 25 is 10.2% of the area of ​​the PCBA board 100, the area of ​​the shield pad area 85 is 12.6% of the area of ​​the PCBA board 100, the area of ​​the upper left area 35 is 11.2% of the area of ​​the PCBA board 100, the area of ​​the lower left area 45 is 14.4% of the area of ​​the PCBA board 100, the area of ​​the right area 55 is 30.1% of the area of ​​the PCBA board 100, and the area of ​​the lower area 75 is 21.5% of the area of ​​the PCBA board 100. It should be noted that the size of the PCBA board 100 is between greater than or equal to 16 mm×16 mm and less than or equal to 22 mm×22 mm. The above values ​​are just examples, and the present invention is not limited thereto.

[0060] In this embodiment, the upper left area 35 is divided into an upper left area (not marked) and an upper left area (not marked), and the upper left area and the upper left area are arranged one above the other.

[0061] The power processing unit 31 includes a first power supply unit and a second power supply unit, which are respectively arranged in the upper left area and the upper left area. The first power supply unit provides power to the RF signal amplifying unit 61, and the second power supply unit provides power to the RF signal receiving and transmitting unit 51 and the protocol logic processing unit 41 respectively.

[0062] The first power supply unit includes a DC-DC power supply chip 32 and its peripheral circuit (not marked). The model used by the DC-DC power supply chip 32 is ETA3410. The area of ​​the DC-DC power supply chip 32 is 2mmx2mm, and the output current can reach 2000mA, which can meet the current (1000mA) required by the RF signal amplification unit 61 (RF power amplifier 64) while having an extremely small volume. The above-mentioned various values ​​and models are only examples, and the utility model is not limited to this. It should be noted that the peripheral circuit is a prior art and will not be repeated here. The peripheral circuit is composed of components such as capacitors, inductors and / or resistors. It is only an example here, and the utility model is not limited to this.

[0063] The second power supply unit includes a low-voltage dropout linear regulator 33 and its peripheral circuit (not marked). The peripheral circuit is arranged in the second raised area 36. The model of the low-voltage dropout linear regulator 33 is TPS73501DRVR. The area of ​​the low-voltage dropout linear regulator 33 is 2mmx2mm, and the output current is 500mA. It can meet the current (300mA) required by the radio frequency signal receiving and transmitting unit 51 and the protocol logic processing unit 41 while having an extremely small volume. The above-mentioned various numerical values ​​and models are only examples, and the present invention is not limited to this. It should be noted that the peripheral circuit is a prior art and will not be repeated here. The peripheral circuit is composed of components such as capacitors, inductors and / or resistors. It is only an example here, and the present invention is not limited to this.

[0064] In this embodiment, the radio frequency signal receiving and transmitting unit 51 is arranged in the right area 55. The radio frequency signal receiving and transmitting unit 51 includes a crystal oscillator 53 and a radio frequency reader chip 52. The radio frequency reader chip 52 is arranged in the middle right area of ​​the right area 55, and the crystal oscillator 53 is arranged in the upper left area of ​​the right area 55. The crystal oscillator 53 is close to the power processing unit 31. The crystal oscillator 53 adopts a 24MHz active temperature compensated crystal oscillator 53, and the model of the radio frequency reader chip 52 is any one of the IPJ-E310 radio frequency reader chip, IPJ-E510 radio frequency reader chip, IPJ-E710 radio frequency reader chip or IPJ-E910 radio frequency reader chip, etc. The above-mentioned various values ​​and models are just examples, and the utility model is not limited thereto. The RF signal receiving and transmitting unit 51 also includes a peripheral circuit, which is arranged on the upper, left and lower parts (in the fourth raised area 57) of the RF reader chip 52. The peripheral circuit is a prior art and will not be described in detail here. The peripheral circuit is composed of components such as capacitors, inductors and / or resistors. This is just an example, and the present invention is not limited to this.

[0065] In this embodiment, the protocol logic processing unit 41 is set in the lower left area 45. The protocol logic processing unit 41 includes a single-chip microcomputer 42 and its peripheral circuits (not marked). The single-chip microcomputer 42 can use HC32F460JEUA, which has extremely low power consumption while meeting the number of pins required by the module, so that the single-chip microcomputer 42 can use the same power supply as the radio frequency chip. Part of the peripheral circuit is set in the sixth raised area 46. The peripheral circuit is a prior art and will not be described here. The peripheral circuit is composed of components such as capacitors, inductors and / or resistors. Here, it is just an example, and the utility model is not limited to this.

[0066] In this embodiment, the RF signal amplifying unit 61 is disposed in the lower region 75. The lower region 75 is divided into a surface acoustic filter region 91, a first attenuation region 92, a power amplifying region 93, and a coupling filter region 94. The surface acoustic filter region 91, the first attenuation region 92, the power amplifying region 93, and the coupling filter region 94 are arranged from left to right in sequence and are basically arranged in a straight line.

[0067] The RF signal amplifying unit 61 includes a circuit-connected surface acoustic wave filter unit 62, a first attenuation network 63, a RF power amplifier 64, a second attenuation network 66, a coupler 65, and a low-pass filter network 67. The surface acoustic wave filter unit 62, the first attenuation network 63, and the RF power amplifier 64 are respectively arranged in the surface acoustic wave filter area 91, the first attenuation area 92, and the power amplification area 93; the second attenuation network 66, the coupler 65, and the low-pass filter network 67 are arranged in the coupling filter area 94; the surface acoustic wave filter unit 62, the first attenuation network 63, the RF power amplifier 64, the second attenuation network 66, the coupler 65, the low-pass filter network 67, and the RF input and output ports form a linear circuit.

[0068] The surface acoustic wave filter unit 62 includes a surface acoustic wave filter (see Figure 1 and Figure 2 As shown). In order to meet the needs of the international market, the surface acoustic wave filter unit 62 includes two surface acoustic wave filters (not shown) and a switch (not shown) connected by a circuit. The two surface acoustic wave filters are arranged in the left area of ​​the surface acoustic wave filter area 91 and are distributed up and down. The switch is arranged in the right area of ​​the surface acoustic wave filter area 91. It should be noted that no matter whether the surface acoustic wave filter unit 62 includes one surface acoustic wave filter or the surface acoustic wave filter unit 62 includes two surface acoustic wave filters and a switch, their arrangement areas on the PCBA board 100, that is, the area of ​​the surface acoustic wave filter area 91 is the same.

[0069] The first attenuation network 63 and the second attenuation network 66 can be π-type attenuation networks, and are composed of three discrete components (0201 package). The use of 0201 packaged devices meets the power capacity requirements while having a very small volume. The RF power amplifier 64 can use NZ5408S, with a maximum output power of 28dBm and an area of ​​3mmx3mm, which meets the output power requirements while having a very small volume; the peripheral circuit of the RF power amplifier 64 is set in the third raised area 76. The above-mentioned various values ​​and models are just examples, and the utility model is not limited thereto.

[0070] The coupler 65 and the second attenuation network 66 are arranged in the left area of ​​the coupling filter area 94 and are distributed up and down, and the low-pass filter network 67 is arranged in the right area of ​​the coupling filter area 94. The coupler 65 is a directional coupler, which can adopt 0910CF15B0100-0805, and the user can select the type of the coupler 65 as needed. The low-pass filter network 67 is composed of three discrete components (0402 package). The use of 0402 package devices has a very small volume while meeting the power capacity and bandwidth requirements. The above-mentioned various values ​​and models are just examples, and the utility model is not limited thereto.

[0071] The working principle of the utility model is as follows: 1. On the PCBA board 100, the external power supply is input through the power input port 12, and the voltage is reduced to a preset value through the DC-DC power chip 32 of the power processing unit 31, and the stepped-down power supply is provided to the RF power amplifier 64. The external power supply is input through the power input port 12, and the voltage is reduced to a preset value through the low voltage difference linear regulator 33, and the stepped-down power supply is provided to the RF signal receiving and transmitting unit 51 (RF reader chip 52) and the protocol logic processing unit 41 (single-chip microcomputer 42).

[0072] After the single chip microcomputer 42 sends a command to the RF reader chip 52, a RF transmission signal is generated. The RF transmission signal is filtered by the surface acoustic wave filter and attenuated by the π-type attenuation network. After reaching the preset value, the RF transmission signal is amplified by the RF power amplifier 64. After the RF transmission signal reaches the preset value, the RF transmission signal is filtered by the coupler 65 and the low-pass filter network 67, and finally the RF transmission signal is output through the RF signal input and output port 22.

[0073] 2. The RF receiving signal is input through the RF signal input and output port 22, and enters the first pin of the RF reader chip 52 after passing through the low-pass filter network 67, the coupler 65 and the π-type attenuation network. The RF reader chip 52 analyzes the RF receiving signal and returns the result to the protocol logic processing unit 41 (microcontroller 42).

[0074] In this embodiment, the DC-DC power chip 32 and the low voltage difference linear regulator 33 are close to the power input port 12 and separated by a predetermined distance of the straight line circuit, and are respectively located at the diagonal of the PCBA board 100 with the RF signal input and output ports 22. The advantage of such a design is that the power processing unit 31 reduces the interference with the RF signal amplification unit 61.

[0075] The power processing unit 31 is close to the power input port 12, which minimizes the length of the high current transmission path and reduces the voltage drop and temperature rise caused by the transmission line resistance. The crystal oscillator 53 is separated from the RF signal amplification unit 61 by a predetermined distance and is close to the RF reader chip 52. The advantage of this design is that it reduces interference with the circuit in the RF signal amplification unit 61, shortens the distance with the RF reader chip 52, and improves the space utilization rate of the PCBA board 100.

[0076] The surface acoustic wave filter unit 62, the first attenuation network 63, the RF power amplifier 64, the second attenuation network 66, the coupler 65, the low-pass filter network 67, and the RF input and output ports are arranged in a straight line as a whole, which is conducive to the transmission of RF signals.

[0077] The RF signal receiving and transmitting unit 51 is adjacent to the RF signal amplifying unit 61, which ensures that the signal transmission path is the shortest and greatly reduces the loss of the RF signal on the transmission path.

[0078] The protocol logic processing unit 41 (single chip microcomputer 42) is arranged at the closest distance to the first package pad 11 to ensure the shortest communication path and reduce the interference of the communication signal on the radio frequency receiving signal.

[0079] The utility model adopts a reasonable circuit layout, divides the PCBA board reasonably, divides the PCBA board into the first area, the second area, the upper left area, the lower left area, the right area, and the lower area, and respectively arranges the first package pad, the second package pad, the power processing unit, the protocol logic processing unit, the radio frequency signal receiving and transmitting unit, and the radio frequency signal amplifying unit in the first area, the second area, the upper left area, the lower left area, the right area, and the lower area; reduces the number of components on the PCBA board, and through a reasonable layout method, ensures the performance of the ultra-high frequency electronic tag reading and writing module, while increasing the space utilization to the extreme, so that the overall area of ​​the module is reduced. The production cost and BOM management cost are greatly reduced, so that the ultra-high frequency electronic tag reading and writing module can be used in an extremely limited space environment, which greatly increases the application scope and application scenarios of the module.

Claims

1. An ultra-high frequency electronic tag reading and writing module, characterized in that: It includes a PCBA board, and a first packaging pad, a power processing unit, a radio frequency signal receiving and transmitting unit, a protocol logic processing unit, a radio frequency signal amplifying unit, and a second packaging pad which are arranged on the front side of the PCBA board and are circuit-connected; The front side of the PCBA board is divided into a first area, a second area, a shielding cover pad area and a component area, the first area is arranged at one side of the front side of the PCBA board, the second area is spaced a predetermined distance from the first area and arranged opposite to the first area, the shielding cover pad area is arranged between the first area and the second area, and the component area is arranged inside the shielding cover pad area; The component area is divided into an upper area and a lower area, the left side of the upper area is divided into a left upper area and a left lower area, the left upper area and the left lower area are arranged up and down; the right side of the upper area is divided into a right area; The first package pad, the second package pad, the power processing unit, the protocol logic processing unit, the RF signal receiving and transmitting unit, and the RF signal amplifying unit are respectively and correspondingly arranged in the first area, the second area, the upper left area, the lower left area, the right area, and the lower area; The power input port of the first package pad is arranged at the upper left corner of the first area, and the radio frequency signal input and output port of the first package pad is arranged at the lower right corner of the second area.

2. The UHF electronic tag reading and writing module according to claim 1 is characterized in that: The upper left area is divided into an upper left area 1 and an upper left area 2, and the upper left area 1 and the upper left area 2 are arranged one above the other.

3. The UHF electronic tag reading and writing module according to claim 2 is characterized in that: The power processing unit includes a first power supply unit and a second power supply unit, and the first power supply unit and the second power supply unit are respectively arranged in the upper left area and the upper left area. The first power supply unit provides power to the RF signal amplifying unit, and the second power supply unit provides power to the RF signal receiving and sending unit and the protocol logic processing unit respectively.

4. The UHF electronic tag reading and writing module according to claim 1 or 2, characterized in that: The radio frequency signal receiving and transmitting unit includes a crystal oscillator and a radio frequency reader chip. The radio frequency reader chip is arranged in the middle right area of ​​the right area, and the crystal oscillator is arranged in the upper left area of ​​the right area.

5. The UHF electronic tag reading and writing module according to claim 4 is characterized in that: The model of the radio frequency reader chip is IPJ-E310 radio frequency reader chip, IPJ-E510 radio frequency reader chip, IPJ-E710 radio frequency reader chip or IPJ-E910 radio frequency reader chip.

6. The UHF electronic tag reading and writing module according to claim 1 or 2, characterized in that: The lower area is divided into a surface acoustic wave filtering area, a first attenuation area, a power amplification area, and a coupling filtering area. The surface acoustic wave filtering area, the first attenuation area, the power amplification area, and the coupling filtering area are arranged in sequence from left to right.

7. The UHF electronic tag reading and writing module according to claim 6 is characterized in that: The surface acoustic wave filtering region, the first attenuation region, the power amplification region, and the coupling filtering region are arranged substantially in a straight line from left to right.

8. The UHF electronic tag reading and writing module according to claim 6 is characterized in that: The RF signal amplifying unit includes a circuit-connected surface acoustic wave filtering unit, a first attenuation network, a RF power amplifier, a second attenuation network, a coupler, and a low-pass filtering network. The surface acoustic wave filtering unit, the first attenuation network, and the RF power amplifier are respectively arranged in the surface acoustic wave filtering area, the first attenuation area, and the power amplification area; the second attenuation network, the coupler, and the low-pass filtering network are arranged in the coupled filtering area.

9. The UHF electronic tag reading and writing module according to claim 8, characterized in that: The surface acoustic wave filter unit includes a surface acoustic wave filter.

10. The UHF electronic tag reading and writing module according to claim 8, characterized in that: The surface acoustic wave filtering unit includes two surface acoustic wave filters connected by a circuit and a switching switch. The two surface acoustic wave filters are arranged in the left area of ​​the surface acoustic wave filtering area and are distributed up and down. The switching switch is arranged in the right area of ​​the surface acoustic wave filtering area.

11. The UHF electronic tag reading and writing module according to claim 8, characterized in that: The coupler and the second attenuation network are arranged in the left area of ​​the coupling filtering area and are distributed up and down, and the low-pass filtering network is arranged in the right area of ​​the coupling filtering area.

12. The UHF electronic tag reading and writing module according to claim 1 or 2, characterized in that: The PCBA board is a multi-layer circuit board.

13. The UHF electronic tag reading and writing module according to claim 12, characterized in that: The PCBA board is a six-layer circuit board.

14. The UHF electronic tag reading and writing module according to claim 1 or 2, characterized in that: The size of the PCBA board is between greater than or equal to 16 mm×16 mm and less than or equal to 22 mm×22 mm.

15. The UHF electronic tag reading and writing module according to claim 1 or 2, characterized in that: A first recessed area is disposed in the upper right area of ​​the upper left area close to the right area, a first raised area is disposed in the right area corresponding to the first recessed area, and the first raised area is disposed in the first recessed area.

16. The UHF electronic tag reading and writing module according to claim 15, characterized in that: A second raised area is arranged in the lower right area of ​​the upper left area close to the right area, a second recessed area is arranged in the right area corresponding to the second raised area, the second raised area is arranged in the second recessed area, and the first raised area and the second raised area are arranged alternately.

17. The UHF electronic tag reading and writing module according to claim 1 or 2, characterized in that: A third convex region is arranged upward in the middle of the lower region, a third concave region is arranged in the lower left region of the right region corresponding to the third convex region, and the third convex region is arranged in the third concave region.

18. The UHF electronic tag reading and writing module according to claim 17, characterized in that: A space is formed between the third raised area and the third recessed area, a sixth raised area is arranged in the middle of the left lower area corresponding to the space, and the sixth raised area is arranged in the space.

19. The UHF electronic tag reading and writing module according to claim 17, characterized in that: A fourth raised area is arranged downwardly in the lower right area of ​​the right area, a fourth recessed area is formed between the third raised area and the shielding cover pad area, the fourth raised area is arranged in the fourth recessed area, and the third raised area and the fourth raised area are arranged alternately.

20. The UHF electronic tag reading and writing module according to claim 1 or 2, characterized in that: The sum of the areas of the first region and the second region is 10.2% of the area of ​​the PCBA board, the area of ​​the shielding pad region is 12.6% of the area of ​​the PCBA board, the area of ​​the upper left region is 11.2% of the area of ​​the PCBA board, the area of ​​the lower left region is 14.4% of the area of ​​the PCBA board, the area of ​​the right region is 30.1% of the area of ​​the PCBA board, and the area of ​​the lower region is 21.5% of the area of ​​the PCBA board.

21. The UHF electronic tag reading and writing module according to claim 1 or 2, characterized in that: A shielding cover is also included, and the shielding cover is welded on the shielding cover pad area.

22. The UHF electronic tag reading and writing module according to claim 1 or 2, characterized in that: The power input port is connected to the power processing unit circuit, the power processing unit is respectively connected to the RF signal receiving and sending unit and the protocol logic processing unit circuit and provides power, and the protocol logic processing unit, the RF signal receiving and sending unit, the RF signal amplifying unit, and the RF signal input and output port are connected in sequence.

Images