Detection circuit and power management chip

Abstract

The utility model provides a detection circuit, which is applied to a power management chip and comprises an amplification module, a transconductance amplifier, a first capacitor, a conversion module and a feedback module, the amplification module outputs an amplified voltage difference signal based on the load current; the in-phase input end of the transconductance amplifier is connected with the output end of the amplification module, and the transconductance amplifier generates charging current according to the voltage difference signal and the reference voltage; the charging current charges the first capacitor to generate a voltage signal; a first end of the conversion module is connected with an output end of the transconductance amplifier and a first pole plate of the first capacitor, a voltage signal is accessed, and the conversion module converts the voltage signal into a current signal; the feedback module adjusts the input voltage of the voltage conversion circuit when the conversion module outputs the current signal. According to the detection circuit provided by the invention, the input voltage can be accurately adjusted according to the charging mode, so that the detection circuit can be kept in a constant-current mode, and the charging reliability of the power management chip is further ensured.

Description

Technical Field

[0001] The present application relates to the field of power supply technology, and more specifically, to a detection circuit and a power management chip. Background Art

[0002] At present, there are usually three charging modes for charging electronic devices, namely, constant current (CC), constant voltage (CV) and a charging mode combining constant current and constant voltage. Among them, independent constant current charging mode and constant voltage charging mode may affect the service life of the battery in the electronic device. Therefore, the charging mode combining constant current and constant voltage is usually used to charge the battery in the electronic device.

[0003] However, when a constant current and constant voltage charging method is used, when the power management chip works in a constant current charging mode, since the current is fixed, the input voltage may change due to other factors. For example, if the fixed voltage is exceeded, the power management chip may not be able to work in a constant current charging mode. Utility Model Content

[0004] To solve the above problems, the present application provides a detection circuit and a power management chip. The detection circuit provided by the present application can accurately adjust the input voltage according to the charging mode of the power management chip, so that the detection circuit can remain in a constant current mode, thereby ensuring the charging reliability of the power management chip.

[0005] In the first aspect, the present application provides a detection circuit, including an amplification module, a transconductance amplifier, a first capacitor, a conversion module and a feedback module; the amplification module is used to output an amplified voltage difference signal based on a load current; the transconductance amplifier, the in-phase input terminal is connected to the output terminal of the amplification module, and is used to receive the amplified voltage difference signal, and the inverting input terminal is used to receive a reference voltage, and the transconductance amplifier is used to generate a charging current according to the voltage difference signal and the reference voltage; the first capacitor, the first plate is connected to the output terminal of the transconductance amplifier, and the second plate is grounded, wherein the charging current is used to charge the first capacitor to generate a voltage signal; the conversion module, the first end is connected to the output terminal of the transconductance amplifier and the first plate of the first capacitor, and is used to receive the voltage signal, and the second end is grounded, and the conversion module is used to convert the voltage signal into a current signal; the feedback module, the first end is connected to the third end of the conversion module, and the second end is connected to the voltage conversion circuit, and the feedback module is used to adjust the input voltage of the voltage conversion circuit when the conversion module outputs the current signal.

[0006] Based on the detection circuit provided in the embodiment of the present application, the feedback unit can timely adjust the input voltage of the voltage conversion circuit when the conversion module outputs a current signal, so that the power management chip can operate in a constant current charging mode, that is, the detection circuit can be maintained in a constant current mode, so as to avoid the problem of failing to timely detect whether the charging mode is constant current or constant voltage, and failing to timely adjust the voltage or current, which will also affect the service life of the lithium battery in the electronic device, thereby ensuring the charging reliability of the power management chip.

[0007] In one possible design, the feedback module includes a first current source and a voltage divider unit, one end of the first current source is connected to the third end of the conversion module, the first end of the voltage divider unit is connected to the other end of the first current source and the feedback end of the voltage conversion circuit, the second end of the voltage divider unit is connected to the output end of the voltage conversion circuit, and the third end of the voltage divider unit is connected to the input end of the amplification module.

[0008] In one possible design, the voltage divider unit includes a first resistor and a second resistor; one end of the first resistor is connected to the output end of the voltage conversion circuit, the other end of the first resistor and one end of the second resistor are respectively connected to the other end of the first current source and the feedback end of the voltage conversion circuit, and the other end of the second resistor is connected to the input end of the amplification module.

[0009] In one possible design, the conversion module includes: a first amplifier, a first NMOS tube, and a first current mirror; the first amplifier, the in-phase input terminal is used to access the voltage signal; the first NMOS tube, the gate is connected to the output terminal of the first amplifier, and the source is connected to the inverting input terminal of the first amplifier; the first current mirror, the first terminal is connected to the drain of the first NMOS tube, the second terminal is used to access the power supply voltage, and the third terminal is connected to the first terminal of the feedback module; when the voltage signal is at a high level, the first amplifier outputs a high level, and the first NMOS tube is turned on to generate a current signal; when the voltage signal is at a low level, the first NMOS tube is turned off.

[0010] In a possible design, the conversion module further includes an adjustable resistor, one end of the adjustable resistor is connected to the source of the first NMOS tube and the inverting input terminal of the first amplifier, and the other end is grounded.

[0011] In one possible design, the detection circuit also includes a detection module, an input end of the detection module is connected to the fourth end of the conversion module for accessing the current signal, the detection module is used to output a detection signal according to the current signal, and determine the charging mode of the power management chip according to the detection signal, and the charging mode includes at least a constant voltage charging mode or a constant current charging mode; when the voltage signal is at a high level, the detection signal is at a high level, and the power management chip operates in a constant current charging mode; when the voltage signal is at a low level, the detection signal is at a low level, and the power management chip operates in a constant voltage charging mode.

[0012] In one possible design, the detection module includes: a first PMOS tube, a second NMOS tube, a third NMOS tube, a second current mirror and a third resistor; the first PMOS tube, the gate is connected to the fourth end of the conversion module, and the source is used to access the power supply voltage; the second NMOS tube, the drain is connected to the drain of the first PMOS tube, the gate and the drain are short-circuited, and the source is grounded; the third NMOS tube, the gate is connected to the drain of the second NMOS tube and the fourth end of the conversion module, and the source is grounded; the second current mirror, the first end is connected to the drain of the third NMOS tube, the second end is used to access the power supply voltage, and the third end is used to output current; the third resistor, one end is connected to the third end of the second current mirror, and the other end is grounded.

[0013] In a possible design, the detection module further includes a switch unit, a first end of the switch unit is connected to the fourth end of the conversion module, a second end is connected to the drain of the second NMOS tube, and a controlled end is used to access an enable signal.

[0014] In one possible design, the amplification module includes a second current source, a fourth resistor and a second amplifier; the fourth resistor has one end connected to one end of the second current source; the second amplifier has a non-inverting input end connected to one end of the fourth resistor, an inverting input end connected to the other end of the fourth resistor, and an output end connected to the non-inverting input end of the transconductance amplifier.

[0015] In a second aspect, the present application provides a power management chip, comprising the detection circuit and the voltage conversion circuit described in any optional manner of the first aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 It is a waveform structure schematic diagram of a constant current charging mode in the related art;

[0017] Figure 2 It is a waveform structure schematic diagram of a constant voltage charging mode in the related art;

[0018] Figure 3 It is a waveform structure diagram of a charging mode combining constant current and constant voltage in the related art;

[0019] Figure 4 The circuit structure of the power management chip provided in the embodiment of the present application is shown in FIG. Figure 1 ;

[0020] Figure 5 The circuit structure of the power management chip provided in the embodiment of the present application is shown in FIG. Figure 2 ;

[0021] Figure 6 The circuit structure of the power management chip provided in the embodiment of the present application is shown in FIG. Figure 3 ;

[0022] Figure 7 The circuit structure of the power management chip provided in the embodiment of the present application is shown in FIG. Figure 4 ;

[0023] Figure 8 The circuit structure of the detection circuit provided in the embodiment of the present application is shown in FIG. Figure 1 ;

[0024] Fig. 9 The circuit structure of the detection circuit provided in the embodiment of the present application is shown in FIG. Figure 2 ;

[0025] Fig.10 The circuit structure of the detection circuit provided in the embodiment of the present application is shown in FIG. Figure 3 ;

[0026] Fig.11 The circuit structure of the detection circuit provided in the embodiment of the present application is shown in FIG. Figure 4 ;

[0027] Fig.12 The circuit structure of the detection circuit provided in the embodiment of the present application is shown in FIG. Figure 5 .

[0028] Among them, the reference numerals in the figure are:

[0029] 1. Detection circuit; 11. Amplification module; 12. Conversion module; 121. First current mirror; 122. Third current mirror; 13. Feedback module; 131. Voltage divider unit; 14. Detection module; 141. Second current mirror; 15. Constant voltage module; 151. Third current mirror; 152. Fourth current mirror;

[0030] AMP1, first amplifier; AMP2, second amplifier; AMP3, transconductance amplifier; I FB, voltage difference signal; VREF, reference voltage; VFB, feedback voltage; C1, first capacitor; C2, second capacitor; NM1, first NMOS tube; NM2, second NMOS tube; NM3, third NMOS tube; PM1, first PMOS tube; PM2, second PMOS tube; PM3, third PMOS tube; R0, adjustable resistor; R1, first resistor; R2, second resistor; R3, third resistor; R4, fourth resistor; TGATE, switch unit; EN, enable signal; VDD, power supply voltage; I NV1, first inverter; I NV2, second inverter; I 1, first current source; I 2, second current source; I 3, third current source; VI N, input voltage; VCP1, output node; VCM, reference signal; L, inductor; U, pulse width modulation controller; Q1, upper tube; Q2, lower tube; Q3, switch tube; CMP1, first comparator; CMP2, second comparator. DETAILED DESCRIPTION

[0031] In the following description, specific details such as specific system structures, technologies, etc. are provided for the purpose of illustration rather than limitation, so as to provide a thorough understanding of the embodiments of the present application. However, it should be clear to those skilled in the art that the present application may also be implemented in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, and circuits are omitted to prevent unnecessary details from obstructing the description of the present application.

[0032] With the rapid development of electronic products, various electronic products have gradually become an indispensable part of people's work and life, and people's demand and dependence on them are also increasing. Among them, portable devices such as laptops, tablets, and smart phones have higher requirements on the power and battery life of lithium batteries in electronic devices in order to improve the performance and user experience of such portable devices and other electronic products.

[0033] The capacity of lithium batteries in electronic products is usually measured in work, for example, W = P*t, where W is the capacity of the lithium battery, P is power, and t is time. Specifically, the power formula is P = U*I, where U is voltage and I is current. If you want to increase the charging speed and reduce the charging time while keeping the capacity of the lithium battery unchanged, according to the formulas W = P*t and P = U*I, you need to increase the power accordingly, that is, you need to increase the voltage or current. At present, there are three charging modes for charging lithium batteries in electronic devices: constant current, constant voltage, and a combination of constant current and constant voltage.

[0034] The first is a charging mode that maintains a constant current and increases the voltage, namely, a constant current charging mode.

[0035] In this charging mode, if Figure 1 As shown, the charging current I remains unchanged, and the charging speed is improved by increasing the charging voltage V. However, during constant current charging, a portion of the electrical energy will be lost in the final charging stage, which will reduce the service life of the active substances in the lithium battery, that is, reduce the service life of the lithium battery.

[0036] The second is a charging mode that maintains a constant voltage and increases the current, namely, a constant voltage charging mode.

[0037] In this charging mode, if Figure 2 As shown, the charging voltage V remains unchanged, and the charging speed is increased by adjusting the charging current I. However, in the early stage of charging, if the charging current is too large, it will cause irreversible damage to the active materials in the lithium battery, thereby reducing the service life of the lithium battery.

[0038] The third is a charging mode that combines constant current and constant voltage.

[0039] In this charging mode, if Figure 3 As shown, in the initial stage of charging, the lithium battery is charged in constant current charging mode to avoid damage to the active materials in the lithium battery, and then the charging voltage V is gradually increased, while the voltage at both ends of the lithium battery is monitored to prevent the charging voltage V from being too high and causing damage to the lithium battery. When the lithium battery is charged to 45% of the power, it can be switched to constant voltage charging mode, that is, the charging voltage V remains unchanged and the charging current I is gradually reduced to complete the charging of the lithium battery.

[0040] In this way, both the independent constant current charging mode and the constant voltage charging mode will affect the service life of the lithium battery in the electronic device. Therefore, a charging mode combining constant current and constant voltage is usually used to charge the battery in the electronic device. For example, the power transmission protocol (USB Power Delivery, USB_PD) 3.0 / 3.1, which can adjust the charging voltage in real time, adopts a charging mode combining constant current and constant voltage. At present, it is usually necessary to detect the charging mode in real time to determine the charging mode of the current system, so as to avoid the problem of failing to detect whether the charging mode is constant voltage or constant current in time, and failing to adjust the voltage or current in time, which will also affect the service life of the lithium battery in the electronic device.

[0041] When the related technology adopts a charging method combining constant current and constant voltage, when the power management chip works in the constant current charging mode, since the current is fixed, the input voltage may change due to other factors. For example, exceeding the fixed voltage causes the power management chip to be unable to work in the constant current charging mode. To this end, the embodiment of the present application provides a detection circuit and a power management chip. The detection circuit can accurately adjust the input voltage according to the charging mode of the power management chip, so that the detection circuit can be maintained in the constant current mode, thereby ensuring the charging reliability of the power management chip.

[0042] The detection circuit and power management chip provided in the present application are exemplarily introduced below in conjunction with the accompanying drawings.

[0043] like Figure 4 As shown, the embodiment of the present application provides a detection circuit 1, which is applied to a power management chip. The detection circuit 1 may include an amplification module 11, a transconductance amplifier AMP3, a first capacitor C1 and a conversion module 12. The output end of the amplification module 11 is connected to the in-phase input end (such as Figure 1 As shown in “+”), the inverting input terminal of the transconductance amplifier AMP3 (as Figure 1The reference voltage VREF is connected to the output terminal of the transconductance amplifier AMP3 and the first plate of the first capacitor C1, and the second plate of the first capacitor C1 is grounded. The first end of the conversion module 12 is connected to the output terminal of the transconductance amplifier AMP3 and the first plate of the first capacitor C1, and the second end of the conversion module 12 is grounded. The amplification module 11 is used to output the amplified voltage difference signal I FB based on the load current. The transconductance amplifier AMP3 can generate a charging current according to the voltage difference signal I FB and the reference voltage VREF. Here, it is worth noting that this charging current is a current used to charge the first capacitor C1. When the transconductance amplifier AMP3 outputs a charging current to the first capacitor C1, a voltage signal will be generated accordingly, and the conversion module 12 can convert the voltage signal into a current signal.

[0044] When the power management chip works in the constant current charging mode, since the current is fixed, in order to avoid the input voltage VIN from changing, for example, exceeding the fixed voltage, the power management chip may not be able to work in the constant current charging mode. Figure 4 As shown, the detection circuit 1 is further provided with a feedback module 13, the first end of the feedback module 13 is connected to the third end of the conversion module 12, the second end of the feedback module 13 is connected to the voltage conversion circuit 2, and the feedback module 13 is used to adjust the input voltage of the voltage conversion circuit 2 when the conversion module 12 outputs a current signal. That is, when the conversion module 12 converts the voltage signal into a current signal and outputs it to the feedback module 13, the input voltage VI N of the voltage conversion circuit 2 is adjusted. For example, assuming that the power management chip works in a constant current charging mode, the input voltage VI N is 5V, when the input voltage VI N increases to 6V, it may affect the stability of the power management chip working in the constant current charging mode. At this time, the feedback module 13 can reduce the input voltage VI N of the voltage conversion circuit 2 when the conversion module 12 outputs a current signal, so that the power management chip can be kept in the constant current charging mode to ensure the stability of the power management chip working in the constant current charging mode.

[0045] In this example, when the generated voltage signal is at a high level, it means that the amplifier module 11 outputs a charging current to the first capacitor C1 at this time, and the conversion module 12 generates a corresponding current signal to the feedback module 13 based on the voltage signal. At this time, the power management chip operates in a constant current charging mode. When the generated voltage signal is at a low level, it means that the amplifier module 11 does not output a charging current to the first capacitor C1 at this time, and the conversion module 12 does not output a current signal. At this time, the power management chip operates in a constant voltage charging mode. In this way, by setting the feedback module 13, the voltage of the voltage conversion circuit 2 can be adjusted accordingly according to the charging mode, so as to avoid the problem of failing to detect whether the charging mode is constant current or constant voltage in time, and failing to adjust the voltage or current in time, which will also affect the service life of the lithium battery in the electronic device, thereby ensuring the charging reliability of the power management chip.

[0046] Optionally, the transconductance amplifier AMP3 may be a charge sensitive amplifier (CSA) or other structures, and this application does not make any specific limitation on this.

[0047] In one example, if Figure 5 As shown, the voltage conversion circuit 2 may include a first comparator CMP1, a second comparator CMP2, a pulse width modulation controller U, an upper tube Q1, a lower tube Q2, an inductor L and a second capacitor C2. The non-inverting input terminal of the first comparator CMP1 is connected to the reference voltage VREF, the inverting input terminal of the first comparator CMP1 is connected to the feedback module 13 for connecting to the feedback voltage VFB, the output terminal of the first comparator CMP1 is connected to the non-inverting input terminal of the second comparator CMP2, the output terminal of the second comparator CMP2 is connected to the first terminal of the pulse width modulation controller U, the second terminal of the pulse width modulation controller U is connected to the gate of the upper tube Q1, the third terminal of the pulse width modulation controller U is connected to the gate of the lower tube Q2, the drain of the upper tube Q1 is connected to the input voltage VI N, the source of the upper tube Q1 is connected to the drain of the lower tube Q2 and one end of the inductor L, the other end of the inductor L is connected to the feedback module 13 and the first plate of the second capacitor C2, and the second plate of the second capacitor C2 and the source of the lower tube Q2 are grounded. The voltage conversion circuit 2 may also adopt circuits of other structures, and this application does not make any specific limitation on this.

[0048] Optionally, the pulse width modulation controller U may be a pulse width modulation (PWM) chip, etc., and this application does not impose any specific limitation on this.

[0049] In one example, if Figure 6As shown, the feedback module 13 may include a first current source I1 and a voltage divider unit 131, one end of the first current source I1 is connected to the third end of the conversion module 12, and the first end of the voltage divider unit 131 is connected to the other end of the first current source I1 and the feedback end of the voltage conversion circuit 2 (i.e., Figure 6 The second end of the voltage dividing unit 131 is connected to the output end of the voltage conversion circuit 2 (ie, the inverting input end of the first comparator CMP1 shown in FIG. 1 ). Figure 6 The first current source I1 is connected to the other end of the inductor L shown in the figure), and the third end of the voltage divider unit 131 is connected to the input end of the amplification module 11. In this example, when the first current source I1 receives the current signal from the conversion module 12, the first current source I1 will generate a current I src, and the voltage divider unit 131 will adjust the input voltage VI N of the voltage conversion circuit 2 based on the current I src, so that the power management chip can be maintained in the constant current charging mode, so as to ensure the stability of the power management chip working in the constant current charging mode.

[0050] Optional, such as Figure 6 As shown, the voltage dividing unit 131 may include a first resistor R1 and a second resistor R2 connected in series, one end of the first resistor R1 is connected to the output end of the voltage conversion circuit 2 (ie, Figure 6 The other end of the first resistor R1 and one end of the second resistor R2 are connected to the other end of the first current source I1 and the feedback end of the voltage conversion circuit 2 (ie, Figure 6 The other end of the second resistor R2 is connected to the input end of the amplifying module 11. In this example, the voltage of the connection node between the other end of the first resistor R1 and one end of the second resistor R2 is the feedback voltage VFB, and the current I r1 flowing through the first resistor R1 is as shown in formula (1):

[0051] I r1=(VI N-VFB) / RF (1)

[0052] Wherein, I r1 is the current flowing through the first resistor R1 , VIN is the input voltage, VFB is the reference voltage, and RF is the resistance value of the first resistor R1 .

[0053] The current I r2 flowing through the second resistor R2 is as shown in formula (2):

[0054] I r2=VFB / R2 (2)

[0055] Wherein, I r2 is the current flowing through the second resistor R2 , VFB is the reference voltage, and R2 is the resistance value of the second resistor R2 .

[0056] In this example, I r1-I r2+I src=0, and the above formula (1) and formula (2) are combined to obtain formula (3):

[0057] VI N=VFB+(I r2-I src)*RF (3)

[0058] In summary, when the first current source I1 outputs the transformed current I src, the output voltage V IN will also change accordingly. For example, when the current I src increases, the output voltage V IN will decrease, and when the current I src decreases, the output voltage V IN will increase. In this way, the first resistor R1 and the second resistor R2 will adjust the input voltage V IN of the voltage conversion circuit 2 based on the changed current I src, so that the power management chip can be maintained in the constant current charging mode, so as to ensure the stability of the power management chip working in the constant current charging mode.

[0059] The amplification module 11 is used to output the amplified pressure difference signal, for example, Figure 6 As shown, the amplification module 11 may include a second current source I2, a fourth resistor R4 and a second amplifier AMP2, one end of the fourth resistor R4 is connected to one end of the second current source I2, the other end of the fourth resistor R4 is grounded, the in-phase input end of the second amplifier AMP2 is connected to one end of the fourth resistor R4, the inverting input end of the second amplifier AMP2 is connected to the other end of the fourth resistor R4, and the output end of the second amplifier AMP2 is connected to the in-phase input end of the transconductance amplifier AMP3. In this example, when the power management chip operates in the constant current working mode, there will be a voltage difference on the fourth resistor R4. At this time, the second amplifier AMP2 will detect the current change on the fourth resistor R4, that is, the second amplifier AMP2 will access a voltage difference signal I FB, and amplify the voltage difference signal I FB and output it to the transconductance amplifier AMP3, so that the transconductance amplifier AMP3 can generate a charging current based on the amplified voltage difference signal I FB and the reference voltage VREF. Here, it is worth noting that this charging current is used to charge the first capacitor C1. In this way, the present application can improve the accuracy of the voltage difference signal I FB through the fourth resistor R4 and the second amplifier AMP2 to ensure the reliability of the charging current generated by the transconductance amplifier AMP3.

[0060] In this example, Figure 7As shown, the detection circuit 1 may further include a constant voltage module 15, which includes a third current source I3, a third current mirror 151, a fourth current mirror 152, a third amplifier AMP4 and a switch tube Q3, one end of the third current source I3 is connected to the other end of the first current source I1, the other end of the third current source I3 is connected to the first end of the third current mirror 151, the second end of the third current mirror 151 is connected to the first end of the fourth current mirror 152, the third end of the third current mirror 151 is grounded, the second end of the fourth current mirror 152 is connected to the first end of the switch tube Q3, the controlled end of the switch tube Q3 is connected to the output end of the third amplifier AMP4, the second end of the switch tube Q3 is connected to the first input end of the third amplifier AMP4, and the second input end of the third amplifier AMP4 is connected to the voltage DACCV. In this example, the constant voltage module 15 also affects the input voltage VIN. The third current source I3 generates a current I snk. The current I snk is mirrored by the third current mirror 151 and the fourth current mirror 152 and then output to the switch tube Q3. That is, the current flowing through the switch tube Q3 is the current I snk. At this time, the input voltage VIN is as shown in formula (4):

[0061] VI N=VFB+(I r2+I snk-I src)*RF (4)

[0062] Based on the above formula (1)-formula (4), formula (5) is obtained:

[0063] VI N=VFB*(1+RF / R2)+(I snk-I src)*RF (4)

[0064] In summary, when the first current source I1 outputs the transformed current I src, the current I snk generated on the third current source I 3 will also change accordingly, so that the output voltage V IN will also change accordingly. For example, when the current I snk increases, the output voltage V IN will increase, and when the current I snk decreases, the output voltage V IN will decrease. In this way, the constant voltage module 15 can also adjust the input voltage V IN of the voltage conversion circuit 2 based on the changed current I snk, so that the power management chip can be maintained in the constant voltage charging mode, so as to ensure the stability of the power management chip working in the constant voltage charging mode.

[0065] In this example, the constant voltage module 15 may also be provided with an adjusting resistor (not shown in the figure), one end of the adjusting resistor is connected to the second end of the switch tube Q3 and the first input end of the third amplifier AMP4, and the other end of the adjusting resistor is grounded.

[0066] In one example, if Figure 8As shown, the conversion module 12 may include a first amplifier AMP1, a first N-type metal-oxide-semiconductor transistor (N-Metal l Ox i de Semiconductor Fi eld Effect Trans i stor, NMOS) NM1 and a first current mirror 121, the in-phase input terminal of the first amplifier AMP1 is connected to the output terminal of the transconductance amplifier AMP3 for accessing the voltage signal, the gate of the first NMOS tube NM1 is connected to the output terminal of the first amplifier AMP1, the source of the first NMOS tube NM1 is connected to the inverting input terminal of the first amplifier AMP1, the first end of the first current mirror 121 is connected to the drain of the first NMOS tube NM1, the second end of the first current mirror 121 is used for accessing the power supply voltage VDD, and the third end of the first current mirror 121 is connected to the feedback module 13.

[0067] In this example, when the power management chip is in the constant current charging mode, the front-stage circuit will always have dynamic fluctuations to charge the first capacitor C1, that is, the voltage signal output by the transconductance amplifier AMP3 is high level, and the first amplifier AMP1 outputs a high level. At this time, the first NMOS tube NM1 is turned on to generate a current signal, and the current signal can be output to the feedback module 13 through the first current mirror 121, so that the feedback module 13 can adjust the input voltage VI N accordingly based on the current signal. When the voltage signal is low level, the first NMOS tube NM1 is turned off, and the current signal connected to the detection module 14 is 0. In this way, the first amplifier AMP1 can output a corresponding level signal based on the voltage signal to control the on and off of the first NMOS tube NM1, so that the feedback module 13 can adjust the input voltage VI N accordingly based on the current signal output by the first current mirror 121, so that the power management chip can be kept in the constant voltage charging mode to ensure the stability of the power management chip working in the constant voltage charging mode.

[0068] In this example, Figure 8 As shown, the conversion module 12 may further include an adjustable resistor R0 , one end of which is connected to the source of the first NMOS transistor NM1 and the inverting input end of the first amplifier AMP1 , and the other end of which is grounded.

[0069] Optionally, the first current mirror 121 may include two P-type metal-oxide-semiconductor transistors (PMOS) connected in common source and gate, or may include other devices or circuits, to which the present application makes no specific limitation.

[0070] In order to detect the charging mode of the power management chip, in one example, Fig. 9 As shown, the detection circuit 1 may further include a detection module 14, the input end of the detection module 14 is connected to the fourth end of the conversion module 12, and is used to access the current signal. The detection module 14 may output a detection signal according to the current signal, and determine the charging mode of the power management chip according to the detection signal. At this time, the charging mode refers to the constant voltage charging mode and the constant current charging mode. The detection module 14 may determine whether the power management chip is in the constant voltage charging mode or in the constant current charging mode according to the voltage signal.

[0071] In this example, when the generated voltage signal is at a high level, it means that the amplifier module 11 outputs a charging current to the first capacitor C1 at this time, the conversion module 12 generates a corresponding current signal to the detection module 14 based on the voltage signal, and the detection signal generated by the detection module 14 according to the current signal is a high level. At this time, the power management chip works in a constant current charging mode. When the generated voltage signal is at a low level, it means that the amplifier module 11 does not output a charging current to the first capacitor C1 at this time, the conversion module 12 generates a corresponding current signal to the detection module 14 based on the voltage signal, and the detection signal generated by the detection module 14 according to the current signal is a low level. At this time, the power management chip works in a constant voltage charging mode. In this way, the charging mode of the power management chip can be accurately detected through the amplifier module 11, the conversion module 12 and the detection module 14, so as to ensure the reliability of the use of the power management chip in various modes, and then ensure the charging reliability of the power management chip.

[0072] In one example, if Fig.10 As shown, the detection module 14 may include a first PMOS transistor, a second NMOS transistor NM2, a third NMOS transistor NM3, a second current mirror 141 and a third resistor R3. The gate of the first PMOS transistor PM1 is connected to the fourth end of the conversion module (i.e., Fig. 9 The first end of the second current mirror 141 is connected to the drain of the third NMOS tube NM3, the second end of the second current mirror 141 is connected to the power supply voltage VDD, the source of the first PMOS tube PM1 is used to access the power supply voltage VDD, the drain of the second NMOS tube NM2 is connected to the drain of the first PMOS tube PM1, the gate of the second NMOS tube NM2 is short-circuited with the drain, the source of the second NMOS tube NM2 is grounded, the gate of the third NMOS tube NM3 is connected to the drain of the second NMOS tube NM2 and the third end of the first current mirror 121, and the source of the third NMOS tube NM3 is grounded. The first end of the second current mirror 141 is connected to the drain of the third NMOS tube NM3, the second end of the second current mirror 141 is used to access the power supply voltage VDD, the third end of the second current mirror 141 is used to output current, one end of the third resistor R3 is connected to the third end of the second current mirror 141, and the other end of the third resistor R3 is grounded. Among them, the current output by the second current mirror 141 generates a detection signal through the third resistor R3.

[0073] Here, it can be understood that when the conversion module 12 is provided with a first current mirror 121, and the first current mirror 121 is two PMOS connected in common source and common gate, at this time, Fig.10 As shown, the first PMOS transistor PM1 is connected to the cascode of one of the PMOS transistors to form a new current mirror to mirror the current flowing through the first current mirror 121 to the first PMOS transistor PM1.

[0074] In this example, when the first current mirror 121 outputs a current signal, the first PMOS tube PM1 and the second NMOS tube NM2 are turned on. At this time, the second NMOS tube NM2 will generate a basic bias current. Since the drain of the second NMOS tube NM2 is connected to the gate of the third NMOS tube NM3, the bias current is used to control the conduction of the third NMOS tube NM3. The third NMOS tube NM3 is turned on, and the current output by the second current mirror 141 generates a detection signal through the third resistor R3. At this time, the detection signal is a high level, indicating that the power management chip works in a constant current charging mode. When the first current mirror 121 does not output the current signal, the second NMOS tube NM2 is turned off, the third NMOS tube NM3 is turned off, and the detection signal will be pulled down to the ground through the third resistor R3. At this time, the detection signal is a low level, indicating that the power management chip works in a constant voltage charging mode. In this way, the bias current generated by the second NMOS transistor NM2 can control the on / off of the third NMOS transistor NM3 , and there is no need to add an additional circuit for generating the bias current, so the structure is simple.

[0075] Optionally, the second current mirror 141 may include two PMOSs connected in common source and common gate mode, or may include other devices or circuits, to which the present application makes no specific limitation.

[0076] In order to prevent the detection module 14 from being in the working mode all the time and generating unnecessary energy loss, in one example, Fig.11 As shown, the detection module 14 may further include a switch unit TGATE, a first end of the switch unit TGATE is connected to the fourth end of the conversion module 12 (i.e., the third end of the first current mirror 121), a second end of the switch unit TGATE is connected to the drain of the second NMOS tube NM2, and a controlled end of the switch unit TGATE is used to access the enable signal EN, and the on and off of the detection module 14 can be controlled by controlling the enable signal EN. That is, when the enable signal EN is at a high level, the switch unit TGATE is turned on, and at this time, the detection module 14 works. When the enable signal EN is at a low level, the switch unit TGATE is turned off, and the second NMOS tube NM2 in the detection module 14 is turned off and disconnected, and at this time, the detection module 14 does not work. In this way, the working mode of the detection module 14 can be controlled by the switch unit TGATE to avoid unnecessary energy loss.

[0077] When the second NMOS transistor NM2 is turned off, the third NMOS transistor NM3 is too low. Since the second current mirror 141 is too high at this time, the detection module 14 may have a leakage problem. In an example, Fig.11 As shown, the detection module 14 may further include a first inverter I NV1 and a second PMOS tube PM2, the input end of the first inverter I NV1 is connected to the enable signal EN, the gate of the second PMOS tube PM2 is connected to the output end of the first inverter I NV1, the drain of the second PMOS tube PM2 is connected to the drain of the third NMOS tube NM3, and the source of the second PMOS tube PM2 is connected to the first end of the second current mirror 141. In this example, when the detection module 14 starts to work, when the enable signal EN is at a high level, the second PMOS tube PM2 is turned on, and when the detection module 14 is not working, when the enable signal EN is at a low level, the second PMOS tube PM2 is turned off. In this way, by setting the first inverter I NV1 and the second PMOS tube PM2, it can be avoided that when the second NMOS tube NM2 is turned off, the third NMOS tube NM3 is too low and the second current mirror 141 is too high, which may cause leakage in the detection module 14, thereby ensuring the working stability of the detection module 14 and further ensuring the detection accuracy of the detection module 14.

[0078] In one example, if Fig.12 As shown, the detection module 14 may further include a second inverter I NV2 and a third PMOS tube PM3, the input end of the second inverter I NV2 is connected to the output end of the first inverter I NV1, the gate of the third PMOS tube PM3 is connected to the output end of the second inverter I NV2, the source of the third PMOS tube PM3 is used to access the power supply voltage VDD, and the drain of the third PMOS tube PM3 is connected to the fourth end of the second current mirror 141. When the enable signal EN is at a high level, the third PMOS tube PM3 is turned off; when the enable signal EN is at a low level, the third PMOS tube PM3 is turned on.

[0079] In summary, in the detection circuit 1 provided in the embodiment of the present application, the feedback unit 131 can timely adjust the input voltage VI N of the voltage conversion circuit 2 when the first PMOS tube PM1 outputs a current signal, so that the power management chip can work in the constant current charging mode, that is, the detection circuit 1 can be kept in the constant current mode, so as to avoid the problem that the charging mode is not detected in time, whether it is constant current or constant voltage, and the voltage or current cannot be adjusted in time, which will also affect the service life of the lithium battery in the electronic device, thereby ensuring the charging reliability of the power management chip. Moreover, the charging current charged to the first capacitor C1 can also be detected in real time through the detection module 14, and the charging mode of the power management chip can be known according to the charging current, so as to realize the accurate detection of the charging mode of the power management chip, so as to ensure the reliability of the use of the power management chip in various modes, thereby ensuring the charging reliability of the power management chip.

[0080] The embodiment of the present application also provides a power management chip, including the detection circuit 1 and the voltage conversion circuit 2 described in any of the above optional methods. The power management chip provided in the embodiment of the present application has the detection circuit 1 of the above embodiment, and therefore has all the beneficial effects of the above detection circuit 1. The detection circuit 1 has been described in detail above and will not be repeated here. It is worth noting that the detection circuit 1 can be used in the above power management chip, and can also be used in a protocol chip or other chips that need to detect a constant current charging mode. This application does not make any specific restrictions on this.

[0081] It should be understood that when used in the present specification and the appended claims, the term "comprising" indicates the presence of described features, integers, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or combinations thereof.

[0082] It should also be understood that the term “and / or” used in the specification and appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes these combinations.

[0083] In addition, in the description of the present application specification and the appended claims, the terms "first", "second", "third", etc. are only used to distinguish the descriptions and cannot be understood as indicating or implying relative importance.

[0084] References to "one embodiment" or "some embodiments" etc. described in the specification of this application mean that one or more embodiments of the present application include specific features, structures or characteristics described in conjunction with the embodiment. Therefore, the statements "in one embodiment", "in some embodiments", "in some other embodiments", "in some other embodiments", etc. that appear in different places in this specification do not necessarily refer to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized in other ways. The terms "including", "comprising", "having" and their variations all mean "including but not limited to", unless otherwise specifically emphasized in other ways.

[0085] The embodiments described above are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, a person skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims

1. A detection circuit, applied to a power management chip, characterized in that: The detection circuit comprises: an amplifying module, used for outputting an amplified pressure difference signal based on the load current; A transconductance amplifier, wherein the in-phase input terminal is connected to the output terminal of the amplification module and is used to receive the amplified voltage difference signal, and the inverting input terminal is used to receive the reference voltage. The transconductance amplifier is used to generate a charging current according to the voltage difference signal and the reference voltage; a first capacitor, a first plate connected to the output end of the transconductance amplifier, and a second plate grounded, wherein the charging current is used to charge the first capacitor to generate a voltage signal; a conversion module, a first end of which is connected to the output end of the transconductance amplifier and the first plate of the first capacitor for receiving the voltage signal, and a second end of which is grounded, and the conversion module is used to convert the voltage signal into a current signal; and A feedback module has a first end connected to the third end of the conversion module and a second end connected to the voltage conversion circuit, and the feedback module is used to adjust the input voltage of the voltage conversion circuit when the conversion module outputs the current signal.

2. The detection circuit according to claim 1, characterized in that: The feedback module comprises: a first current source, one end of which is connected to the third end of the conversion module; and A voltage dividing unit has a first end connected to the other end of the first current source and a feedback end of the voltage conversion circuit, a second end connected to the output end of the voltage conversion circuit, and a third end connected to the input end of the amplification module.

3. The detection circuit according to claim 2, characterized in that: The voltage dividing unit includes a first resistor and a second resistor connected in series; One end of the first resistor is connected to the output end of the voltage conversion circuit, the other end of the first resistor and one end of the second resistor are respectively connected to the other end of the first current source and the feedback end of the voltage conversion circuit, and the other end of the second resistor is connected to the input end of the amplification module.

4. The detection circuit according to claim 1, characterized in that: The conversion module comprises: A first amplifier, a non-inverting input terminal for receiving the voltage signal; A first NMOS transistor, a gate connected to the output terminal of the first amplifier, and a source connected to the inverting input terminal of the first amplifier; A first current mirror, a first end of which is connected to the drain of the first NMOS tube, a second end of which is used to access the power supply voltage, and a third end of which is connected to the first end of the feedback module; When the voltage signal is at a high level, the first amplifier outputs a high level, and the first NMOS tube is turned on to generate the current signal; when the voltage signal is at a low level, the first NMOS tube is turned off.

5. The detection circuit according to claim 4, characterized in that: The conversion module also includes: The adjustable resistor has one end connected to the source of the first NMOS tube and the inverting input end of the first amplifier, and the other end grounded.

6. The detection circuit according to any one of claims 1 to 5, characterized in that: The detection circuit also includes: a detection module, the input end of which is connected to the fourth end of the conversion module and is used to access the current signal, the detection module is used to output a detection signal according to the current signal, and determine the charging mode of the power management chip according to the detection signal, wherein the charging mode at least includes a constant voltage charging mode or a constant current charging mode; When the voltage signal is at a high level, the detection signal is at a high level, and the power management chip works in a constant current charging mode; when the voltage signal is at a low level, the detection signal is at a low level, and the power management chip works in a constant voltage charging mode.

7. The detection circuit according to claim 6, characterized in that: The detection module comprises: A first PMOS tube, a gate of which is connected to the fourth terminal of the conversion module, and a source of which is used to access a power supply voltage; A second NMOS tube, a drain connected to the drain of the first PMOS tube, a gate short-circuited with the drain, and a source grounded; A third NMOS tube, a gate of which is connected to the drain of the second NMOS tube and the fourth end of the conversion module, and a source of which is grounded; a second current mirror, wherein a first end is connected to the drain of the third NMOS tube, a second end is used to access the power supply voltage, and a third end is used to output current; and The third resistor has one end connected to the third end of the second current mirror and the other end grounded.

8. The detection circuit according to claim 7, characterized in that: The detection module also includes: A switch unit, wherein a first end is connected to the fourth end of the conversion module, a second end is connected to the drain of the second NMOS tube, and a controlled end is used to access an enable signal.

9. The detection circuit according to claim 1, characterized in that: The amplification module comprises: a second current source; a fourth resistor, one end of which is connected to one end of the second current source; and The second amplifier has a non-inverting input terminal connected to one end of the fourth resistor, an inverting input terminal connected to the other end of the fourth resistor, and an output terminal connected to the non-inverting input terminal of the transconductance amplifier.

10. A power management chip, characterized in that: It comprises the detection circuit and the voltage conversion circuit as described in any one of claims 1 to 9.

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