Biasing circuit and radio frequency power amplifier

Abstract

The utility model discloses a biasing circuit and a radio frequency power amplifier, and belongs to the technical field of high-power lasers. The biasing circuit comprises a programmable digital-to-analog conversion module, an enable signal end of the programmable digital-to-analog conversion module is respectively connected with one end of a filter capacitor C1, one end of a filter capacitor C2 and one end of a voltage stabilizing inductor L1, the other end of the filter capacitor C1 and the other end of the filter capacitor C2 are grounded, and an external enable signal is accessed to the external enable signal through the other end of the voltage stabilizing inductor L1; an external enable signal is input to the programmable digital-to-analog conversion module after being subjected to voltage stabilization and capacitor filtering, the output voltage of the programmable digital-to-analog conversion module can be stabilized, the precision requirement of digital-to-analog conversion is ensured, the required bias voltage is accurately controlled, and the stability and the precision of the bias voltage are further ensured. Meanwhile, when the power amplification chip changes, parameters of the programmable digital-to-analog conversion module can be flexibly adjusted. On the basis, on the premise of ensuring stability and accuracy, the complexity of the biasing circuit is reduced, and the flexibility of the biasing circuit is improved.

Description

Technical Field

[0001] The utility model belongs to the technical field of high-power lasers, and more specifically, relates to a bias circuit and a radio frequency power amplifier. Background Art

[0002] RF power amplifier is an important component of high-power laser, and its core lies in the power amplifier chip. The working state of the power amplifier chip needs to be adjusted by the bias voltage. Without the bias voltage control, the power amplifier chip may enter the saturation or cut-off state, resulting in distortion or loss of the output signal. Under the regulation of the bias voltage, the laser output can be precisely controlled. Therefore, it is of great significance to study a bias circuit for controlling the laser output of high-power lasers.

[0003] Existing bias circuits are often implemented based on digital-to-analog conversion circuits and a large number of discrete components. The entire circuit structure is relatively complex. When the power amplifier chip changes, it may be necessary to replace and adjust the digital-to-analog conversion circuit accordingly, or design a complex automatic calibration circuit to optimize circuit parameters and reduce control errors, which results in low flexibility. Utility Model Content

[0004] In view of the above defects or improvement needs of the prior art, the utility model provides a bias circuit and a radio frequency power amplifier, the purpose of which is to reduce the complexity of the bias circuit and improve the flexibility of the bias circuit while ensuring stability and accuracy.

[0005] In order to achieve the above-mentioned object, in a first aspect, the utility model provides a bias circuit, comprising: a programmable digital-to-analog conversion module, a filter capacitor C1, a filter capacitor C2, a voltage-stabilizing inductor L1, a voltage-dividing resistor R7, a voltage-dividing resistor R8 and a voltage-dividing resistor R9;

[0006] The input signal end of the programmable digital-to-analog conversion module is connected to the digital signal to be converted to digital-to-analog, and the enable signal end is connected to one end of the filter capacitor C1, the filter capacitor C2, and the voltage-stabilizing inductor L1 respectively; the other ends of the filter capacitor C1 and the filter capacitor C2 are grounded; the other end of the voltage-stabilizing inductor L1 is connected to the external enable signal;

[0007] The signal output end of the programmable digital-to-analog conversion module is connected to one end of the voltage-dividing resistor R8, and the other end of the voltage-dividing resistor R8 is respectively connected to one end of the voltage-dividing resistor R7 and the voltage-dividing resistor R9; the other end of the voltage-dividing resistor R7 is grounded; the other end of the voltage-dividing resistor R9 serves as the output end of the bias circuit for outputting the bias voltage.

[0008] Further preferably, the bias circuit further comprises: a switch control circuit for controlling the programmable digital-to-analog conversion module to work or not work; the input end of the switch control circuit is connected to an external control signal, and the output end is connected to one end of the voltage divider resistor R7 connected to the voltage divider resistor R8;

[0009] When the external control signal is at a high level, the programmable digital-to-analog conversion module is in working state;

[0010] When the external control signal is at a low level, the programmable digital-to-analog conversion module is in a stop working state.

[0011] Further preferably, the switch control circuit comprises: a voltage dividing resistor R5, a voltage dividing resistor R6 and a power switch tube;

[0012] One end of the voltage divider resistor R5 is connected to the external control signal, and the other end is grounded through the voltage divider resistor R6;

[0013] The signal input end of the power switch tube is connected to the connection point of the voltage divider resistor R5 and the voltage divider resistor R6, the ground end is grounded, and the output end serves as the output end of the switch control circuit;

[0014] When the external control signal is at a high level, the power switch is turned on and the programmable digital-to-analog conversion module is in working state;

[0015] When the external control signal is at a low level, the power switch tube is turned off and the programmable digital-to-analog conversion module is in a stopped working state.

[0016] Further preferably, the power switch tube is a MOS tube.

[0017] Further preferably, the programmable digital-to-analog conversion module is a programmable multi-channel parallel DAC module.

[0018] Further preferably, the programmable digital-to-analog conversion module is a MCP4726A2T-E / CH chip.

[0019] In a second aspect, the utility model provides a radio frequency power amplifier, comprising: N cascaded amplifier chips and N control circuits connected to the N amplifier chips in a one-to-one correspondence; N≥1;

[0020] The control circuit includes a cascaded bias circuit and a voltage follower circuit;

[0021] Wherein, the bias circuit is the bias circuit provided by the first aspect of the utility model.

[0022] Further preferably, the control circuit further comprises: a voltage divider bias amplifier circuit connected to the output end of the bias circuit.

[0023] Further preferably, the voltage divider bias amplifier circuit comprises: a voltage divider resistor R12 , voltage divider resistor R 13 , voltage divider resistor R 14 , voltage divider resistor R 15 , coupling capacitor C3 and transistor Q2;

[0024] Voltage divider resistor R 12 And the voltage divider resistor R 13 series to form a series branch; coupling capacitor C3 is connected in parallel at both ends of the series branch; one end of the series branch is connected to the voltage divider resistor R 14 One end of the voltage divider resistor R 15 One end is connected to the collector of transistor Q2; the voltage divider resistor R 14 The other end of the resistor R 15 The other end of the voltage divider bias amplifier circuit is used as the output end; the base of transistor Q2 is connected to the voltage divider resistor R 12 With the voltage divider resistor R 13 At the connection point of , the emitter is grounded.

[0025] Further preferably, the voltage follower circuit comprises: an operational amplifier, a capacitor C4, a capacitor C5, a capacitor C6 and a voltage stabilizing inductor L2;

[0026] The positive input terminal of the operational amplifier is connected to the bias voltage output by the bias circuit, and the reverse input terminal is connected to the output terminal of the operational amplifier; the positive pole of the power supply of the operational amplifier is connected to the external enable voltage signal through the voltage stabilizing inductor L2, and the negative pole of the power supply is grounded;

[0027] One end of capacitor C4 is connected to the positive input terminal of the operational amplifier, and the other end is grounded;

[0028] One end of capacitor C5 is connected to the negative input terminal of the operational amplifier, and the other end is grounded;

[0029] One end of capacitor C6 is connected to the output terminal of the operational amplifier, and the other end is grounded;

[0030] The signal output from the output end of the operational amplifier is connected in parallel with the capacitor C6 for filtering and then output to the corresponding amplifier chip.

[0031] In general, the above technical solutions conceived by the present invention can achieve the following beneficial effects:

[0032] 1. The utility model provides a bias circuit, including a programmable digital-to-analog conversion module, wherein the enable signal end of the programmable digital-to-analog conversion module is respectively connected to one end of a filter capacitor C1, a filter capacitor C2, and a voltage-stabilizing inductor L1, and the other ends of the filter capacitor C1 and the filter capacitor C2 are grounded, and the external enable signal is connected to the external enable signal through the other end of the voltage-stabilizing inductor L1; the external enable signal is input to the programmable digital-to-analog conversion module after voltage stabilization and capacitor filtering, and can stabilize the voltage output from the signal output end of the programmable digital-to-analog conversion module, ensure the accuracy requirements of the digital-to-analog conversion, and achieve precise control of the required bias voltage, thereby ensuring the stability and accuracy of the bias voltage output by the bias circuit, and the complexity of the entire circuit is low. At the same time, when the power amplifier chip changes, the parameters of the programmable digital-to-analog conversion module can also be flexibly adjusted, and the circuit parameters can be optimized without designing a complex automatic calibration circuit. Based on this, the utility model can reduce the complexity of the bias circuit and improve the flexibility of the bias circuit under the premise of ensuring stability and accuracy.

[0033] 2. Furthermore, the bias circuit provided by the present invention also includes a switch control circuit, which can conveniently and effectively control the working state of the programmable digital-to-analog conversion module through an external control signal.

[0034] 3. Furthermore, the bias circuit provided by the utility model, the programmable digital-to-analog conversion module is a programmable multi-channel parallel DAC module, which further improves the accuracy of digital-to-analog conversion by performing parallel multi-channel digital-to-analog conversion on the input digital signal, thereby improving the accuracy of the bias voltage.

[0035] 4. The utility model provides a radio frequency power amplifier, which adopts the bias circuit provided by the first aspect of the utility model to provide a bias voltage for the amplifier chip. Under the premise of ensuring stability and accuracy, it can make the amplifier chip work in the linear gain region with lower circuit complexity and higher flexibility.

[0036] At the same time, the utility model adopts a voltage follower circuit, which can improve the gain of driving power and current, and will not enhance or weaken the amplitude of the input signal. In a circuit with a higher input impedance, by adopting a voltage follower circuit, a circuit with a smaller load impedance can generate a larger instantaneous current and a continuous current. The voltage follower circuit can provide a larger current for these circuits without affecting the input circuit.

[0037] 5. Furthermore, the RF power amplifier provided by the present invention further adopts a voltage divider bias amplifier circuit to reduce the unstable voltage of the bias circuit caused by factors such as heating of components, thereby improving the stability of the bias circuit and further improving the stability of the RF power amplifier. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Figure 1 A schematic diagram of a bias circuit provided in an embodiment of the utility model;

[0039] Figure 2 A schematic diagram of the structure of a voltage-dividing bias amplifier circuit provided in an embodiment of the utility model;

[0040] Figure 3 A schematic diagram of the structure of a voltage follower circuit provided by an embodiment of the utility model;

[0041] Figure 4 A schematic structural diagram of a radio frequency power amplifier provided in an embodiment of the utility model. DETAILED DESCRIPTION

[0042] In order to make the purpose, technical solution and advantages of the utility model more clear, the utility model is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the utility model and are not used to limit the utility model. In addition, the technical features involved in each embodiment of the utility model described below can be combined with each other as long as they do not conflict with each other.

[0043] In order to achieve the above object, the utility model provides a bias circuit, including: a programmable digital-to-analog conversion module, a filter capacitor C1, a filter capacitor C2, a voltage-stabilizing inductor L1, a voltage-dividing resistor R7, a voltage-dividing resistor R8 and a voltage-dividing resistor R9;

[0044] The input signal terminal of the programmable digital-to-analog conversion module is connected to the digital signal to be converted into digital-to-analog, the power signal terminal is connected to the external power supply voltage, and the enable signal terminal is respectively connected to one end of the filter capacitor C1, the filter capacitor C2, and the voltage-stabilizing inductor L1; the other ends of the filter capacitor C1 and the filter capacitor C2 are grounded; the other end of the voltage-stabilizing inductor L1 is connected to the external enable signal;

[0045] The signal output end of the programmable digital-to-analog conversion module is connected to one end of the voltage-dividing resistor R8; the other end of the voltage-dividing resistor R8 is respectively connected to one end of the voltage-dividing resistor R7 and the voltage-dividing resistor R9; the other end of the voltage-dividing resistor R7 is grounded; the other end of the voltage-dividing resistor R9 serves as the output end of the bias circuit for outputting the bias voltage.

[0046] It should be noted that the above-mentioned programmable digital-to-analog conversion module can be a MCP4726A2T-E / CH chip, an AD5541A chip, a DAC0800 chip, etc. Preferably, the MCP4726A2T-E / CH chip is used.

[0047] In an optional implementation manner, the bias circuit further includes: a switch control circuit for controlling the programmable digital-to-analog conversion module to work or not work; the input end of the switch control circuit is connected to an external control signal, and the output end is connected to one end of the voltage divider resistor R7 connected to the voltage divider resistor R8;

[0048] When the external control signal is at a high level, the programmable digital-to-analog conversion module is in working state;

[0049] When the external control signal is at a low level, the programmable digital-to-analog conversion module is in a stop working state.

[0050] In an optional implementation, the switch control circuit includes: a voltage dividing resistor R5, a voltage dividing resistor R6 and a power switch tube;

[0051] One end of the voltage divider resistor R5 is connected to the external control signal, and the other end is grounded through the voltage divider resistor R6;

[0052] The signal input end of the power switch tube is connected to the connection point of the voltage divider resistor R5 and the voltage divider resistor R6, the ground end is grounded, and the output end serves as the output end of the switch control circuit;

[0053] When the external control signal is at a high level, the power switch is turned on and the programmable digital-to-analog conversion module is in working state;

[0054] When the external control signal is at a low level, the power switch tube is turned off and the programmable digital-to-analog conversion module is in a stopped working state.

[0055] It should be noted that the switch control circuit used is not limited, and this is just one implementation method.

[0056] In an optional implementation manner, the power switch tube is a MOS tube, preferably an NMOS tube; when the MOS tube is an NMOS tube, the signal input end of the power switch tube is the gate, the ground end is the source, and the output end is the drain.

[0057] In an optional implementation, the programmable digital-to-analog conversion module is a programmable multi-channel parallel DAC module to further improve the accuracy of digital-to-analog conversion, thereby improving the accuracy of the bias voltage.

[0058] In order to further illustrate the bias circuit provided by the utility model, a specific embodiment is described in detail below:

[0059] like Figure 1 The bias circuit provided in this embodiment is shown. The programmable digital-to-analog conversion module in this embodiment is a MCP4726A2T-E / CH chip U1. The MCP4726A2T-E / CH chip is a digital-to-analog conversion chip that has a data storage function and a communication protocol of I 2 CTM It should be noted that other chips with digital-to-analog conversion functions can also replace the MCP4726A2T-E / CH chip, and are not limited to the MCP4726A2T-E / CH chip. Here, only the MCP4726A2T-E / CH chip is taken as an example. The utility model converts the input digital signal into an analog signal by programming the digital-to-analog conversion module to accurately control the required bias voltage, thereby providing a bias voltage with high accuracy and good stability for the amplifier chip.

[0060] The 4th and 5th pins (input signal terminals) of the chip U1 are input with digital signals by the software program of the control chip, and the data required for the chip to work is burned. The 6th pin (power signal terminal) is connected to a 5V voltage to provide a power signal to the chip. The 2nd pin (ground terminal) is grounded. The 1st pin (signal output terminal) is the signal output terminal of the chip. After the output voltage passes through the voltage-dividing resistor R8, a voltage drop is generated by series voltage division, and a bias voltage is output to control the working state of the amplifier chip connected to the bias circuit. After another voltage drop through the voltage-dividing resistor R7, it is grounded. The switch control circuit composed of R5, R6 and the power switch tube Q1 controls the opening and closing of the bias circuit composed of the chip U1. When the power switch tube Q1 is in the on state, the bias circuit is short-circuited, and the bias voltage is no longer provided. When the power switch tube Q1 switch is in the off state, the bias circuit works normally. At this time, the bias circuit provides a bias voltage for the amplifier chip; the power switch tube Q1 in this embodiment is a MOS tube. At the same time, pin 3 (enable signal terminal) inputs an enable signal to the chip. The enable signal is a 5V voltage that is stabilized by the L1 inductor and filtered by the C1 and C2 capacitors and then input into the chip U1 to stabilize the voltage output from the signal output terminal of the chip U1 to ensure the accuracy requirements of the digital-to-analog conversion, thereby ensuring the accuracy of the bias voltage output by the bias circuit.

[0061] In a second aspect, the utility model provides a radio frequency power amplifier, comprising: N cascaded amplifier chips and N control circuits connected to the N amplifier chips in a one-to-one correspondence; N≥1;

[0062] The control circuit includes a cascaded bias circuit and a voltage follower circuit;

[0063] Among them, the bias circuit is the bias circuit provided by the first aspect of the utility model, and by controlling the magnitude of the output bias voltage, the conduction degree and current flow of the corresponding amplifier chip can be controlled, thereby affecting its gain characteristics and making it work stably in the linear gain region. The related technical solution is the same as the bias circuit provided by the first aspect of the utility model, and will not be described here.

[0064] It should be noted that the use of voltage follower circuits can improve the gain of driving power and current without increasing or decreasing the amplitude of the input signal. In circuits with higher input impedance, the use of voltage follower circuits can make circuits with smaller load impedance generate larger instantaneous currents and continuous currents. Voltage followers can provide larger currents for these circuits without affecting the input circuits.

[0065] In an optional implementation, the control circuit further includes: a voltage divider bias amplifier circuit connected to the output end of the bias circuit. The biggest feature of the voltage divider bias amplifier circuit is that it can stabilize the operating point and enable the bias circuit to avoid a series of situations that may cause signal distortion due to external temperature changes.

[0066] In an alternative embodiment, Figure 2 As shown, the voltage divider bias amplifier circuit includes: a voltage divider resistor R 12 , voltage divider resistor R 13 , voltage divider resistor R 14 , voltage divider resistor R 15 , coupling capacitor C3 and transistor Q2;

[0067] Voltage divider resistor R 12 And the voltage divider resistor R 13 series to form a series branch; coupling capacitor C3 is connected in parallel at both ends of the series branch; one end of the series branch is connected to the voltage divider resistor R 14 One end of the voltage divider resistor R 15 One end is connected to the collector of transistor Q2; the voltage divider resistor R 14 The other end of the resistor R 15 The other end of the voltage divider bias amplifier circuit is used as the output end; the base of transistor Q2 is connected to the voltage divider resistor R 12 With the voltage divider resistor R 13 At the connection point of , the emitter is grounded.

[0068] It should be noted that the voltage divider bias amplifier circuit used is not limited, and this is just one implementation method.

[0069] In an alternative embodiment, Figure 3 As shown, the voltage follower circuit includes: an operational amplifier, a capacitor C4, a capacitor C5, a capacitor C6 and a voltage-stabilizing inductor L2;

[0070] The positive input terminal of the operational amplifier is connected to the bias voltage output by the bias circuit, and the reverse input terminal is connected to the output terminal of the operational amplifier; the positive pole of the power supply of the operational amplifier is connected to the external enable voltage signal through the voltage stabilizing inductor L2, and the negative pole of the power supply is grounded;

[0071] One end of capacitor C4 is connected to the positive input terminal of the operational amplifier, and the other end is grounded;

[0072] One end of capacitor C5 is connected to the negative input terminal of the operational amplifier, and the other end is grounded;

[0073] One end of capacitor C6 is connected to the output terminal of the operational amplifier, and the other end is grounded;

[0074] The signal output from the output end of the operational amplifier is connected in parallel with the capacitor C6 for filtering and then output to the corresponding amplifier chip.

[0075] It should be noted that the voltage follower circuit used is not limited, and this is just one implementation method.

[0076] In order to further illustrate the radio frequency power amplifier provided by the utility model, a specific embodiment is described in detail below:

[0077] like Figure 4 The figure shows a radio frequency power amplifier including two-stage amplifier chips. The radio frequency power amplifier further performs signal input matching on the radio frequency signal obtained after the sine wave pulse signal generated by the crystal oscillator is modulated by a PWM pulse signal provided by the PWM signal control module, and the matched signal is input into the first-stage amplifier chip. The bias voltage provided to the amplifier chip by the bias circuit provided by the first aspect of the utility model enables the amplifier chip to operate in the linear gain region. In addition, in order to improve the stability of the bias circuit, a voltage divider bias amplifier circuit is further adopted to reduce the factors of unstable voltage of the bias circuit caused by heating of components and the like.

[0078] The bias voltage generated by the bias circuit is processed by the voltage follower circuit, which improves the current gain and the driving function of the circuit, and can better control the working state of the first-stage amplifier chip. The signal output by the first-stage amplifier chip enters the second-stage amplifier chip for amplification. The working state of this amplification process is consistent with the first-stage amplification and is also controlled by the bias voltage. The signal amplified by the second-stage amplifier chip is further matched for signal output and then output.

[0079] In this embodiment, the Figure 2 The voltage divider bias amplifier circuit shown in FIG. 1 is a coupling capacitor in this embodiment, which has the function of blocking direct current and passing alternating current. 12 , R 13 It plays a role of voltage division. When the external environment changes, it will cause the transistor Q2 to pass through R 15The base current increases, and due to the emitter resistor voltage division, the emitter voltage increases, so the voltage of the programmable digital-to-analog conversion module will decrease, so that the collector current will automatically decrease, thus forming a closed-loop feedback system, the base current will decrease, and thus the stability of the bias circuit is increased.

[0080] In this embodiment, the Figure 3 In this embodiment, an enable signal is input to the voltage follower circuit. The enable signal is a 5V voltage that is stabilized by the L2 inductor and filtered by the C5 capacitor and then input to the operational amplifier U2. The high-frequency noise is then filtered out by the C4 and C6 capacitors, thereby increasing the current output and improving the driving function of the circuit.

[0081] It is easy for those skilled in the art to understand that the above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A bias circuit, characterized in that: include: Programmable digital-to-analog conversion module, filter capacitor C1, filter capacitor C2, voltage stabilizing inductor L1, voltage divider resistor R7, voltage divider resistor R8 and voltage divider resistor R9; The input signal end of the programmable digital-to-analog conversion module is connected to the digital signal to be converted into digital-to-analog, and the enable signal end is respectively connected to one end of the filter capacitor C1, the filter capacitor C2, and the voltage-stabilizing inductor L1; the other ends of the filter capacitor C1 and the filter capacitor C2 are grounded; the other end of the voltage-stabilizing inductor L1 is connected to the external enable signal; The signal output end of the programmable digital-to-analog conversion module is connected to one end of the voltage-dividing resistor R8; the other end of the voltage-dividing resistor R8 is respectively connected to one end of the voltage-dividing resistor R7 and the voltage-dividing resistor R9; the other end of the voltage-dividing resistor R7 is grounded; the other end of the voltage-dividing resistor R9 serves as the output end of the bias circuit, for outputting a bias voltage.

2. The bias circuit according to claim 1, characterized in that: Also includes: Switch control circuit; The input end of the switch control circuit is connected to an external control signal, and the output end is connected to one end of the voltage-dividing resistor R7 that is connected to the voltage-dividing resistor R8.

3. The bias circuit according to claim 2, characterized in that: The switch control circuit includes: a voltage dividing resistor R5, a voltage dividing resistor R6 and a power switch tube; One end of the voltage-dividing resistor R5 is connected to the external control signal, and the other end is grounded through the voltage-dividing resistor R6; The signal input end of the power switch tube is connected to the connection point of the voltage-dividing resistor R5 and the voltage-dividing resistor R6, the ground end is grounded, and the output end serves as the output end of the switch control circuit.

4. The bias circuit according to claim 3, characterized in that: The power switch tube is a MOS tube.

5. The bias circuit according to any one of claims 1 to 4, characterized in that: The programmable digital-to-analog conversion module is a programmable multi-channel parallel DAC module.

6. The bias circuit according to any one of claims 1 to 4, characterized in that: The programmable digital-to-analog conversion module is a MCP4726A2T-E / CH chip.

7. A radio frequency power amplifier, characterized in that: include: N cascaded amplifier chips and N control circuits connected to the N amplifier chips in a one-to-one correspondence; N≥1； The control circuit includes a cascaded bias circuit and a voltage follower circuit; Wherein, the bias circuit is the bias circuit described in any one of claims 1-6.

8. The radio frequency power amplifier according to claim 7, characterized in that: The control circuit further includes: a voltage-dividing bias amplifier circuit connected to the output end of the bias circuit.

9. The radio frequency power amplifier according to claim 8, characterized in that: The voltage-dividing bias amplifier circuit comprises: a voltage-dividing resistor R 12 , voltage divider resistor R 13 , voltage divider resistor R 14 , voltage divider resistor R 15 , coupling capacitor C3 and transistor Q2; The voltage dividing resistor R 12 With the voltage divider resistor R 13 The coupling capacitor C3 is connected in parallel at both ends of the series branch; one end of the series branch is connected to the voltage dividing resistor R 14 One end of the voltage divider resistor R 15 One end is connected to the collector of the transistor Q2; the voltage dividing resistor R 14 The other end of the voltage divider resistor R 15 The other end of the voltage divider bias amplifier circuit is used as the output end of the voltage divider bias amplifier circuit; the base of the transistor Q2 is connected to the voltage divider resistor R 12 With the voltage divider resistor R 13 At the connection point of , the emitter is grounded.

10. The radio frequency power amplifier according to any one of claims 7 to 9, characterized in that: The voltage follower circuit includes: an operational amplifier, a capacitor C4, a capacitor C5, a capacitor C6 and a voltage-stabilizing inductor L2; The positive input terminal of the operational amplifier is connected to the bias voltage output by the bias circuit, and the reverse input terminal is connected to the output terminal of the operational amplifier; the positive electrode of the power supply of the operational amplifier is connected to the external enable voltage signal through the voltage stabilizing inductor L2, and the negative electrode of the power supply is grounded; One end of the capacitor C4 is connected to the positive input terminal of the operational amplifier, and the other end is grounded; One end of the capacitor C5 is connected to the negative input terminal of the operational amplifier, and the other end is grounded; One end of the capacitor C6 is connected to the output end of the operational amplifier, and the other end is grounded; The signal output from the output end of the operational amplifier is connected in parallel with the capacitor C6 for filtering and then output to the corresponding amplifier chip.

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