Triode-based level conversion circuit
By designing a level conversion circuit based on transistors, using the on-off characteristics of the transistor and the filtering effect of the acceleration capacitor, the problem of level mismatch between different working voltage devices is solved, the normal transmission and reception of data signals is realized, the communication rate and sensitivity are improved, and it is suitable for a variety of baud rates.
Patent Information
- Application Number
- CN202421758980.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-24
- Publication Date
- 2025-04-29
- Estimated Expiration
- 2034-07-24
AI Technical Summary
In electronic circuit design, when data interaction between devices with different working voltages, level mismatch may lead to device I/O damage, data signal transmission loss or incompleteness, resulting in communication failure, current backflow, abnormal power consumption, abnormal voltage and other problems.
A transistor-based level conversion circuit is designed to realize level conversion of different voltages through the on-off characteristics of transistors QG1 and QG2, and an RC circuit is formed in combination with acceleration capacitor CG1 and resistor RG1 to optimize circuit performance.
It realizes level matching between different voltage devices, ensures normal transmission and reception of data signals, avoids device damage and data loss, improves communication rate and sensitivity, is suitable for a variety of baud rates, and is low-cost.
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Figure CN222814468U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to a level conversion circuit based on a triode. Background Art
[0002] With the continuous development of electronic circuits, integrated circuit devices have evolved into types with different operating voltages such as 5V, 3.3V or 1.8V. In actual electronic circuit design applications, in order to achieve data interaction between devices with different operating voltages, it is necessary to design a level matching circuit between the data communication interface to ensure the normal transmission and reception of data. Otherwise, when a low-level device directly receives a data signal higher than the device's own operating voltage, it may cause damage to the device I / O and the data signal cannot be transmitted. Similarly, when a high-level device receives a data signal lower than the device's own operating voltage, it will cause the data signal transmission to be lost or incomplete, and normal data interaction cannot be achieved. In order to overcome the deficiencies of the prior art, the utility model provides a level conversion circuit based on a triode.
[0003] In addition, the voltage domain of the module's UART, IO, IIC, SPI and other peripheral interfaces is usually 1.8V, 2.8V, 3V. The voltage domain of the mainstream MCU system is usually 3.3V and 5V. When the module interacts with the MCU system, the mismatch of the voltage levels of both parties may cause communication failure, current backflow, abnormal power consumption, abnormal voltage and other problems. Utility Model Content
[0004] The technical problem to be solved by the utility model is generally to provide a level conversion circuit based on a triode.
[0005] In order to solve the above problems, the technical solution adopted by the utility model is:
[0006] In order to provide a set of level matching circuits, a level conversion circuit based on transistors includes resistors RG1, RG2, RG3, RG4, RG5, RG6; capacitors CG1, CG2, CG3, CG4, CG5, CG6, CG7, CG8, transistors QG1, QG2, and a digital isolation chip UG1;
[0007] Among them, one end of the resistor RG2 is connected to G+3.9V, and the other end is connected to the M_GPRS_TXD signal; one end of the resistor RG1 is connected to G+2.8V, and the other end is connected to the base of the transistor QG1; the capacitor CG1 is connected in parallel to the resistor RG1; the electrode of the transistor QG1 is connected to the resistor RG2, and the emitter of the transistor QG1 is connected to GPRS_TXD;
[0008] One end of the resistor RG3 is connected to G+2.8V, and the other end is connected to the base of the transistor QG2. The capacitor CG2 is connected in parallel to the resistor RG3. The emitter of the resistor RG3 is connected to M_GPRS_RXD. The collector of the transistor QG2 is connected to the resistor RG4. The other end of RG4 is connected to G+2.8V. GPRS_RXD is connected to RG4.
[0009] One end of capacitor CG3 is connected to pin 1 of digital isolation chip UG1, and the other end is connected to GND; one end of resistor RG5 is connected to DVDD, and the other end is connected to pin 3 of digital isolation chip UG1. One end of resistor RG6 is connected to DVDD, and the other end is connected to pin 5 of digital isolation chip UG1;
[0010] One end of capacitor CG6 is connected to pin 3 of digital isolation chip UG1, and the other end is connected to GND; one end of capacitor CG7 is connected to pin 5 of digital isolation chip UG1, and the other end is connected to GND; one end of capacitor CG4 is connected to pin 10 of digital isolation chip UG1, and the other end is connected to GND; one end of capacitor CG5 is connected to pin 8 of digital isolation chip UG1, and the other end is connected to GND; one end of capacitor CG8 is connected to pin 6 of digital isolation chip UG1, and the other end is connected to GND.
[0011] As a further improvement of the above technical solution:
[0012] To optimize the circuit, capacitor CG1 is a speed-up capacitor;
[0013] Capacitor CG1 and resistor RG1 form an RC circuit to achieve filtering.
[0014] GPRS_TXD is the transmitting signal of the chip UG2 of the GPRS module, and M_GPRS_TXD is the receiving signal of the MCU; the power supply of the GPRS module chip UG2 is 2.8V.
[0015] As a chip connecting two different voltage levels, the digital isolation chip UG1 is used to connect the GPRS module chip UG2 that needs 2.8V system power supply and the MCU chip UG3 that works in the 3.9V system. Through the above electrical characteristics, the digital isolation chip UG1 connects the two chips UG2 and UG3 with different working levels to work together.
[0016] When GPRS_TXD is in a state of not sending data, GPRS_TXD is in a high level state, transistor QG1 is in a cut-off state, and M_GPRS_TXD is in a state of being pulled high by resistor RG2.
[0017] When GPRS_TXD is in the data sending state, GPRS_TXD is in a low level state, transistor QG1 is in the on state, M_GPRS_TXD is pulled low, and the MCU chip UG2 receives the signal to complete the data interaction.
[0018] M_GPRS_RXD is the sending signal of MCU, and GPRS_RXD is the receiving signal of GPRS.
[0019] M_GPRS_RXD is in a pulled-down state, and transistor QG2 is in a turned-on state; GPRS_RXD is in a pulled-down state, and the GPRS module is in a signal receiving state.
[0020] The conduction and cutoff of the triode of the utility model realize the level conversion of different voltages. The use of acceleration capacitors provides assistance for high baud rate communication; the utility model uses triodes as core parts, with fast response, simple structure and low cost. The communication rate is fast and can be applied to a variety of baud rates, 300-9600bps; the circuit is simple, the cost is low, the sensitivity is high, and it has strong adaptability and practicality.
[0021] The utility model has the advantages of reasonable design, low cost, convenient use, firmness and durability, safety and reliability, simple operation, time and labor saving, money saving, compact structure and convenient use. BRIEF DESCRIPTION OF THE DRAWINGS
[0022] Figure 1 This is a schematic diagram A of a level conversion circuit of the present utility model.
[0023] Figure 2 This is a schematic diagram B of the level conversion circuit of the present utility model.
[0024] Figure 3 This is a schematic diagram C of the level conversion circuit of the utility model.
[0025] Figure 4 It is a local communication flow chart A of the utility model.
[0026] Figure 5 This is a local communication flow chart B of the utility model.
[0027] Figure 6 It is a schematic diagram of the process of the utility model. DETAILED DESCRIPTION
[0028] like Figure 1-6 , the level conversion circuit based on transistor (attached Figure 1-3 ) includes resistors RG1, RG2, RG3, RG4, RG5, RG6; capacitors CG1, CG2, CG3, CG4, CG5, CG6, CG7, CG8, transistors QG1, QG2, and digital isolation chip UG1.
[0029] One end of resistor RG2 is connected to G+3.9V, and the other end is connected to M_GPRS_TXD signal. One end of resistor RG1 is connected to G+2.8V, and the other end is connected to the base of transistor QG1. Capacitor CG1 is connected in parallel to resistor RG1. The electrode of transistor QG1 is connected to resistor RG2, and the emitter of transistor QG1 is connected to GPRS_TXD. One end of resistor RG3 is connected to G+2.8V, and the other end is connected to the base of transistor QG2. Capacitor CG2 is connected in parallel to resistor RG3, and the emitter of resistor RG3 is connected to M_GPRS_RXD. The collector of transistor QG2 is connected to resistor RG4, and the other end of RG4 is connected to G+2.8V. GPRS_RXD is connected to RG4.
[0030] One end of capacitor CG3 is connected to pin 1 of digital isolation chip UG1, and the other end is connected to GND. One end of resistor RG5 is connected to DVDD, and the other end is connected to pin 3 of digital isolation chip UG1. One end of resistor RG6 is connected to DVDD, and the other end is connected to pin 5 of digital isolation chip UG1. One end of CG6 is connected to pin 3 of digital isolation chip UG1, and the other end is connected to GND. One end of CG7 is connected to pin 5 of digital isolation chip UG1, and the other end is connected to GND. One end of CG4 is connected to pin 10 of digital isolation chip UG1, and the other end is connected to GND. One end of CG5 is connected to pin 8 of digital isolation chip UG1, and the other end is connected to GND. One end of CG8 is connected to pin 6 of digital isolation chip UG1, and the other end is connected to GND.
[0031] GPRS_TXD is the transmission signal of the GPRS module, and M_GPRS_TXD is the receiving signal of the MCU. The power supply of the GPRS module is a 2.8V system. Therefore, when GPRS_TXD sends data, GPRS_TXD is low level, and transistor QG1 is turned on. M_GPRS_TXD is pulled low, and the MCU receives the signal and completes the data exchange. When GPRS_TXD does not send data, GPRS_TXD is high level, and transistor QG1 is turned off. M_GPRS_TXD is pulled up to 3.9V by RG2.
[0032] Capacitor CG1 is an accelerating capacitor. Due to the charge storage effect, capacitor CG1 and RG1 form an RC circuit. The large time constant affects the turn-on and turn-off rates of the transistor (i.e., switching efficiency). M_GPRS_RXD is the sending signal of the MCU, and GPRS_RXD is the receiving signal of GPRS. When M_GPRS_RXD sends data, M_GPRS_RXD is pulled low, and transistor QG2 is turned on. GPRS_RXD is pulled low, and the GPRS module receives the signal. Data interaction is completed.
[0033] The present invention is fully described for a clearer disclosure, and the prior art will not be listed one by one.
[0034] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the utility model, rather than to limit it; although the utility model is described in detail with reference to the above embodiments, ordinary technicians in this field should understand that they can still modify the technical solutions recorded in the above embodiments, or replace some of the technical features therein with equivalents; it is obvious for those skilled in the art to combine multiple technical solutions of the utility model. However, these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the utility model. The technical contents not described in detail in this utility model are all known technologies.
Claims
1. A level conversion circuit based on a triode, characterized in that: Including resistors RG1, RG2, RG3, RG4, RG5, RG6; capacitors CG1, CG2, CG3, CG4, CG5, CG6, CG7, CG8, transistors QG1, QG2, digital isolation chip UG1; Among them, one end of the resistor RG2 is connected to G+3.9V, and the other end is connected to the M_GPRS_TXD signal; one end of the resistor RG1 is connected to G+2.8V, and the other end is connected to the base of the transistor QG1; the capacitor CG1 is connected in parallel to the resistor RG1; the electrode of the transistor QG1 is connected to the resistor RG2, and the emitter of the transistor QG1 is connected to GPRS_TXD; One end of the resistor RG3 is connected to G+2.8V, and the other end is connected to the base of the transistor QG2. The capacitor CG2 is connected in parallel to the resistor RG3. The emitter of the resistor RG3 is connected to M_GPRS_RXD. The collector of the transistor QG2 is connected to the resistor RG4. The other end of RG4 is connected to G+2.8V. GPRS_RXD is connected to RG4. One end of capacitor CG3 is connected to pin 1 of digital isolation chip UG1, and the other end is connected to GND; one end of resistor RG5 is connected to DVDD, and the other end is connected to pin 3 of digital isolation chip UG1. One end of resistor RG6 is connected to DVDD, and the other end is connected to pin 5 of digital isolation chip UG1; One end of capacitor CG6 is connected to pin 3 of digital isolation chip UG1, and the other end is connected to GND; one end of capacitor CG7 is connected to pin 5 of digital isolation chip UG1, and the other end is connected to GND; one end of capacitor CG4 is connected to pin 10 of digital isolation chip UG1, and the other end is connected to GND; one end of capacitor CG5 is connected to pin 8 of digital isolation chip UG1, and the other end is connected to GND; one end of capacitor CG8 is connected to pin 6 of digital isolation chip UG1, and the other end is connected to GND.
2. The level conversion circuit based on a transistor according to claim 1, characterized in that: Capacitor CG1 is the accelerating capacitor; Capacitor CG1 and resistor RG1 form an RC circuit.
3. The level conversion circuit based on a transistor according to claim 1, characterized in that: GPRS_TXD is the transmission signal of chip UG2 in the GPRS module, and M_GPRS_TXD is the receiving signal on the MCU side; the power supply of chip UG2 in the GPRS module is 2.8V.
4. The level conversion circuit based on a transistor according to claim 1, characterized in that: The digital isolation chip UG1 is used to connect the chip UG2 in the GPRS module and the main chip UG3 of the MCU.
5. The level conversion circuit based on a transistor according to claim 1, characterized in that: When GPRS_TXD is in a state of not sending data, GPRS_TXD is in a high level state, transistor QG1 is in a cut-off state, and M_GPRS_TXD is in a state of being pulled high by resistor RG2.
6. The level conversion circuit based on transistor according to claim 1, characterized in that: When GPRS_TXD is in the data sending state, GPRS_TXD is in a low level state, transistor QG1 is in the on state, M_GPRS_TXD is pulled low, and the MCU chip UG2 receives continuous signals to complete the data interaction.
7. The level conversion circuit based on a transistor according to claim 1, characterized in that: M_GPRS_RXD is the sending signal of MCU, and GPRS_RXD is the receiving signal of GPRS; when M_GPRS_RXD is in the data sending state, M_GPRS_RXD is in the pulled-down state, and transistor QG2 is in the on state; GPRS_RXD is in the pulled-down state, and the GPRS module is in the receiving signal state.