Pulse control holding type solid state relay

Abstract

The utility model discloses a pulse control holding type solid state relay, which comprises a pulse control conversion circuit, a holding circuit and an output circuit which are connected, the pulse control conversion circuit comprises a first optocoupler T1 and a second optocoupler T2, the holding circuit comprises a triode, and the output circuit comprises a metal oxide semiconductor field effect transistor (MOSFET). The solid state relay controls the output MOSFET tube through the small pulse signal, and after control connection, even if the pulse signal of the bias input end is withdrawn, the on-off state of the output end can still be ensured until the pulse signal is added to the control input end, and the state of the output end is changed. The system is suitable for timing, energy-saving and signal control occasions of the system.

Description

Technical Field

[0001] The utility model relates to the technical field of solid relays, in particular to a pulse control holding type solid relay. Background Art

[0002] In the field of electromagnetic relays, there is a magnetic latching relay that relies on the internal magnet to maintain the contact state after the relay is switched. Even if the coil is powered off at this moment, it will not affect the contact state until the reset coil is powered on to return to the initial state. Regardless of the isolation method used by traditional solid-state relays, after the input is powered on and the output is connected, the input needs to ensure continuous power supply to keep the output continuously open. Once an accidental power outage occurs, the reliability of the system will be affected; voltage-controlled solid-state relays have higher voltage requirements for the system, and their application is limited in some low-voltage control situations, and they do not have advantages in energy-saving design.

[0003] In order to keep up with the development prospects of the electronics industry and system integration, miniaturization, informatization and energy saving, and at the same time have the advantages of solid-state relays such as high environmental resistance, fast switching speed and excellent radiation resistance, a pulse-controlled holding solid-state relay and its operation method are proposed. Utility Model Content

[0004] The purpose of the utility model is to provide a pulse control holding type solid relay in view of the shortcomings of the prior art. This solid relay controls the output MOSFET tube through a small pulse signal. After the control is turned on, even if the pulse signal at the bias input end is withdrawn, the switch state of the output end can still be guaranteed until the pulse signal is added to the control input end and the output end changes state. It is suitable for system timing, energy saving, and signal control occasions.

[0005] The technical solution to achieve the purpose of this utility model is:

[0006] A pulse control holding type solid state relay comprises a pulse control conversion circuit, a holding circuit and an output circuit connected to each other.

[0007] The pulse control conversion circuit includes a first optical coupler T1, a second optical coupler T2, and a resistor R1 connected to the e-pole of the first optical coupler T1 and the c-pole of the second optical coupler T2, the positive input end of the first optical coupler T1 is connected to the positive end of the control pulse signal, the positive input end of the second optical coupler T2 is connected to the positive end of the bias pulse signal, the control pulse signal and the bias pulse signal share a negative end, the c-pole of the first optical coupler T1 is connected to the positive end of the output power supply through the resistor R7, and the e-pole of the second optical coupler T2 is connected to the negative end of the output power supply.

[0008] The holding circuit includes a transistor, the b-pole of the transistor is connected to the e-pole of the first optical coupler T1, the e-pole of the transistor is connected to the positive end of the output power supply through a resistor R7, and the c-pole of the transistor is connected to the negative end of the output power supply.

[0009] The output circuit includes a MOSFET tube, the output end of the circuit is connected to the gate of the MOSFET tube, the s pole of the MOSFET tube is connected to the positive end of the output power supply, and the d pole of the MOSFET tube is connected to the output positive end.

[0010] The pulse control conversion circuit further includes a voltage regulator tube R16, the c-pole of the first optical coupler T1 is connected to the positive end of the voltage regulator tube R16, and the negative end of the voltage regulator tube R16 is connected to the negative end of the output power supply.

[0011] The holding circuit includes resistors R2-R9, R15, a diode R17, a capacitor C1, and transistors K1, K2, and K3, wherein one end of the resistor R7 is connected to the positive end of the output power supply, and the other end of R7 is connected to the positive end of the voltage regulator tube R16, one end of the resistor R2, one end of the capacitor C1, and one end of the resistor R4. After the resistor R2 and the capacitor C1 are connected in parallel, the other end is connected to the resistors R1, R3, and the b-pole of the transistor K2. The other end of the resistor R3 is connected to the c-pole of the transistor K1, and the e-pole of the transistor K1 is connected to the negative end of the output power supply; the other end of the resistor R4 is connected to the positive end of the diode R17. The negative end of the diode R17 is connected to the e-pole of the transistor K2, the c-pole of the transistor K2 is connected to one end of the resistors R5 and R8, the other end of the resistor R5 is connected to the resistor R6 and to the b-pole of the transistor K1, the other end of the resistor R6 is connected to the negative end of the output power supply, the other end of the resistor R8 is connected to the resistor R9 and to the b-pole of the transistor K3, and the other end of the resistor R9 is connected to the negative end of the output power supply; the c-pole of the transistor K3 is connected to one end of the resistor R15, the e-pole of the transistor K3 is connected to the negative end of the output power supply, and the other end of the resistor R15 serves as the output end of the holding circuit.

[0012] The output circuit also includes a voltage regulator tube R18, a resistor R10 and a resonant resistor. The voltage regulator tube R18 is connected in parallel with the resistor R10. The positive end of the voltage regulator tube R18 and one end of the resistor R10 are connected to the positive end of the output power supply. The negative end of the voltage regulator tube R18 and the other end of the resistor R10 are connected to one end of the resonant resistor. The other end of the resonant resistor is connected to the gate of the MOSFET tube.

[0013] The output ends of the first optical coupler T1 and the second optical coupler T2 are connected in series and serve as the input end of the holding circuit.

[0014] The positive end of the output power supply is used as the positive end of the solid relay contact, and the negative end of the output power supply is used as the negative end of the solid relay contact.

[0015] The operating method for the pulse controlled holding type solid state relay comprises the following steps:

[0016] 1) A bias pulse signal is added to the positive input terminal of the second optocoupler T2, and the ce electrode of the second optocoupler T2 is turned on. After the conduction, the transistor K2 connected to the second optocoupler T2 in the holding circuit is electrically excited and turned on. Then the transistors K1 and K3 of the holding circuit are electrically turned on to form a cyclic opening loop. After the holding circuit is turned on, the holding circuit supplies power to the gate of the MOSFET tube, and the output is turned on. If the control pulse signal is not added to the positive input terminal of the first optocoupler T1, the holding circuit and the output circuit continue to maintain the output on state;

[0017] 2) A control pulse signal is added to the positive input terminal of the first optocoupler T1, and the CE terminal of the second optocoupler T2 is turned on, which lowers the gate voltage of the MOSFET tube in the output circuit and turns off the output.

[0018] Compared with existing solid-state relays, this technical solution has the following advantages or positive effects:

[0019] 1. The two input ends of the pulse control conversion circuit of the present technical solution are driven by small pulse signals respectively, which reduces the input voltage requirement and is suitable for the logic signal control of the single chip microcomputer.

[0020] 2. The holding circuit of the technical solution can continuously provide a driving voltage to the output circuit after the input end of the holding circuit is electrically excited, thereby improving the operation reliability and saving energy. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 It is a block diagram of the working principle of the embodiment;

[0022] Figure 2 Detailed circuit diagram of the embodiment. DETAILED DESCRIPTION

[0023] The present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments, but the present invention is not limited thereto. Example

[0024] Reference Figure 1 , Figure 2 , a pulse control holding type solid state relay, comprising a pulse control conversion circuit, a holding circuit and an output circuit connected,

[0025] The pulse control conversion circuit includes a first optical coupler T1, a second optical coupler T2, a resistor R1 connected to the e-pole of the first optical coupler T1 and the c-pole of the second optical coupler T2, and a voltage regulator R16 connected to the c-pole of the first optical coupler T1. The positive input end of the first optical coupler T1 is connected to the positive end of the control pulse signal, the positive input end of the second optical coupler T2 is connected to the positive end of the bias pulse signal, the control pulse signal and the bias pulse signal share a negative end, the c-pole of the first optical coupler T1 is connected to the positive end of the output power supply through a resistor R7, the e-pole of the second optical coupler T2 is connected to the negative end of the output power supply, the c-pole of the first optical coupler T1 is connected to the positive end of the voltage regulator R16, the negative end of the voltage regulator R16 is connected to the negative end of the output power supply, and the output ends of the first optical coupler T1 and the second optical coupler T2 are connected in series as the input end of the holding circuit.

[0026] The holding circuit includes resistors R2~R9, R15, diode R17, capacitor C1, and transistors K1, K2, and K3, wherein one end of resistor R7 is connected to the positive end of the output power supply, and the other end of R7 is connected to the positive end of the voltage regulator tube R16, one end of resistor R2, one end of capacitor C1, and one end of resistor R4. After resistor R2 and capacitor C1 are connected in parallel, the other end is connected to resistors R1, R3, and the b-pole of transistor K2, the other end of resistor R3 is connected to the c-pole of transistor K1, and the e-pole of transistor K1 is connected to the negative end of the output power supply; the other end of resistor R4 is connected to the positive end of diode R17 , the negative end of the diode R17 is connected to the e-pole of the transistor K2, the c-pole of the transistor K2 is connected to one end of the resistors R5 and R8, the other end of the resistor R5 is connected to the resistor R6 and to the b-pole of the transistor K1, the other end of the resistor R6 is connected to the negative end of the output power supply, the other end of the resistor R8 is connected to the resistor R9 and to the b-pole of the transistor K3, and the other end of the resistor R9 is connected to the negative end of the output power supply; the c-pole of the transistor K3 is connected to one end of the resistor R15, the e-pole of the transistor K3 is connected to the negative end of the output power supply, and the other end of the resistor R15 serves as the output end of the holding circuit,

[0027] The output circuit includes a MOSFET tube, a voltage regulator tube R18, a resistor R10 and resonant resistors R11~R14, wherein the MOSFET tube is composed of field effect tubes Q1~Q4 in parallel, the voltage regulator tube R18 is connected in parallel with the resistor R10, the positive end of the voltage regulator tube R18 and one end of the resistor R10 are connected to the positive end of the output power supply, the negative end of the voltage regulator tube R18, the other end of the resistor R10 and R15 are connected to one end of the resonant resistors R11~R14 as the output end of the holding circuit, the other end of the resonant resistors R11~R14 are respectively connected to the gates of the field effect tubes Q1~Q4, the s pole of the MOSFET tube is connected to the positive end of the output power supply, and the d pole of the MOSFET tube is connected to the output positive end.

[0028] The positive end of the output power supply is used as the positive end of the solid relay contact, and the negative end of the output power supply is used as the negative end of the solid relay contact.

[0029] The operating method for the pulse controlled holding type solid state relay comprises the following steps:

[0030] 1) A bias pulse signal is added to the positive input terminal of the second optocoupler T2, and the ce electrode of the second optocoupler T2 is turned on. After the conduction, the transistor K2 connected to the second optocoupler T2 in the holding circuit is electrically excited and turned on, and then the transistors K1 and K3 of the holding circuit are electrically turned on to form a cyclic opening loop. After the holding circuit is turned on, the holding circuit supplies power to the gate of the MOSFET tube, and the output is turned on. If the control pulse signal is not added to the positive input terminal of the first optocoupler T1, the holding circuit and the output circuit continue to maintain the output on state;

[0031] 2) A control pulse signal is added to the positive input terminal of the first optocoupler T1, and the CE terminal of the second optocoupler T2 is turned on, which lowers the gate voltage of the MOSFET tube in the output circuit and turns off the output.

Claims

1. A pulse controlled holding type solid state relay, characterized in that: Including pulse control conversion circuit, holding circuit and output circuit, The pulse control conversion circuit includes a first optical coupler T1, a second optical coupler T2, and a resistor R1 connected to the e-pole of the first optical coupler T1 and the c-pole of the second optical coupler T2, the positive input end of the first optical coupler T1 is connected to the positive end of the control pulse signal, the positive input end of the second optical coupler T2 is connected to the positive end of the bias pulse signal, the control pulse signal and the bias pulse signal share a negative end, the c-pole of the first optical coupler T1 is connected to the positive end of the output power supply through the resistor R7, and the e-pole of the second optical coupler T2 is connected to the negative end of the output power supply. The holding circuit includes a transistor, the b-pole of the transistor is connected to the e-pole of the first optical coupler T1, the e-pole of the transistor is connected to the positive end of the output power supply through a resistor R7, and the c-pole of the transistor is connected to the negative end of the output power supply. The output circuit includes a MOSFET tube, the output end of the circuit is connected to the gate of the MOSFET tube, the s pole of the MOSFET tube is connected to the positive end of the output power supply, and the d pole of the MOSFET tube is connected to the output positive end.

2. The pulse controlled holding type solid state relay according to claim 1, characterized in that: The pulse control conversion circuit further includes a voltage regulator tube R16, the c-pole of the first optical coupler T1 is connected to the positive end of the voltage regulator tube R16, and the negative end of the voltage regulator tube R16 is connected to the negative end of the output power supply.

3. The pulse controlled holding type solid state relay according to claim 2, characterized in that: The holding circuit includes resistors R2-R9, R15, a diode R17, a capacitor C1, and transistors K1, K2, and K3, wherein one end of the resistor R7 is connected to the positive end of the output power supply, and the other end of R7 is connected to the positive end of the voltage regulator tube R16, one end of the resistor R2, one end of the capacitor C1, and one end of the resistor R4. After the resistor R2 and the capacitor C1 are connected in parallel, the other end is connected to the resistors R1, R3, and the b-pole of the transistor K2. The other end of the resistor R3 is connected to the c-pole of the transistor K1, and the e-pole of the transistor K1 is connected to the negative end of the output power supply; the other end of the resistor R4 is connected to the positive end of the diode R17. The negative end of the diode R17 is connected to the e-pole of the transistor K2, the c-pole of the transistor K2 is connected to one end of the resistors R5 and R8, the other end of the resistor R5 is connected to the resistor R6 and to the b-pole of the transistor K1, the other end of the resistor R6 is connected to the negative end of the output power supply, the other end of the resistor R8 is connected to the resistor R9 and to the b-pole of the transistor K3, and the other end of the resistor R9 is connected to the negative end of the output power supply; the c-pole of the transistor K3 is connected to one end of the resistor R15, the e-pole of the transistor K3 is connected to the negative end of the output power supply, and the other end of the resistor R15 serves as the output end of the holding circuit.

4. The pulse controlled holding type solid state relay according to claim 1, characterized in that: The output circuit also includes a voltage regulator tube R18, a resistor R10 and a resonant resistor. The voltage regulator tube R18 is connected in parallel with the resistor R10. The positive end of the voltage regulator tube R18 and one end of the resistor R10 are connected to the positive end of the output power supply. The negative end of the voltage regulator tube R18 and the other end of the resistor R10 are connected to one end of the resonant resistor. The other end of the resonant resistor is connected to the gate of the MOSFET tube.

5. The pulse controlled holding type solid state relay according to claim 1, characterized in that: The output ends of the first optical coupler T1 and the second optical coupler T2 are connected in series and serve as the input end of the holding circuit.

6. The pulse controlled holding type solid state relay according to claim 1, characterized in that: The positive end of the output power supply is used as the positive end of the solid relay contact, and the negative end of the output power supply is used as the negative end of the solid relay contact.

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