Power semiconductor device
By adopting a gradient doping design and cathode comb strip width of different doping concentrations in power semiconductor devices, the problem of early retriggering caused by the anode current redistribution during the shutdown process is solved, and a higher shutdown capability is achieved.
Patent Information
- Application Number
- CN202520595428.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-01
- Publication Date
- 2025-05-13
- Estimated Expiration
- 2035-04-01
AI Technical Summary
During the shutdown process, the current density of the far gate ring is too high due to the redistribution of the anode current during the shutdown process, resulting in a retrial of the early triggering, reducing the overall shutdown capability of the device.
By adopting a gradient doping design in the anode region of the power semiconductor device, the conductance modulation effect of the far gate ring is reduced, and the cathode comb strip width of different doping concentrations is designed in the cathode ring region, thereby achieving a design that the far gate ring current density is lower than the near gate ring current density, providing greater current margin.
It effectively solves the problem of early retriggering caused by excessive current density of the far gate ring caused by the redistribution of the anode current during the shutdown process, and significantly improves the overall shutdown capability of the device.
Smart Images
Figure CN222869300U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of semiconductors, in particular to a power semiconductor device. Background Art
[0002] IGCT (Integrated Gate Commutated Thyristor) is a new type of semiconductor switching device, which integrates the gate drive circuit and GCT (Gate Commutated Thyristor) into a whole. GCT device is a new type of power semiconductor device based on GTO (gate turn-off thyristor) structure. It not only has the same high blocking capability and low on-state voltage drop as GTO, but also has the same switching performance as IGBT (Insulate-Gate Bipolar Transistor). That is, GCT device is the result of GTO and IGBT complementing each other. It is an ideal megawatt-level, medium and high voltage switching device, which is widely used in voltage source inverters, current source inverters, choppers, static circuit breakers and other topology circuits.
[0003] like Figure 1A As shown, the GCT device adopts a whole wafer structure, which consists of an active area 1, a gate ring 2 (also known as a gate contact ring area) and a terminal area 3. The active area 1 consists of several cathode rings, each of which consists of several concentric cathode combs, which are responsible for the chip current. The gate ring 2 is located between the cathode rings or at the outermost periphery of the cathode rings, responsible for the transmission of the gate signal and the derivation of the gate current when it is turned off. The gate ring 2 and the gate electrode are interconnected in a mesh. When the GCT device is turned off, an electrical signal is applied to the gate ring 2. After receiving the electrical signal, the gate ring 2 quickly conducts to the gate electrode of the active area 1. The cathode ring close to the gate ring 2 (referred to as the near gate ring) receives the shutdown signal first and turns off first; the anode current does not decrease at this time, and the anode current is redistributed by the ring that is not turned off, so that the cathode ring far away from the gate ring 2 (referred to as the far gate ring) is redistributed with a higher current during the shutdown process. When the current density reaches its re-trigger limit, it is easy to cause re-trigger failure.
[0004] Therefore, how to further improve the shutdown capability of power semiconductor devices has become an urgent problem to be solved in the current field of semiconductor technology. Utility Model Content
[0005] The purpose of the utility model is to provide a power semiconductor device, which provides a larger current margin for the far gate ring when shutting down, counteracts premature failure caused by the redistribution of the far gate ring anode current caused by the non-uniformity of shutdown, thereby greatly improving the overall shutdown capability of the device.
[0006] In order to achieve the above-mentioned purpose, the utility model provides a power semiconductor device on the one hand, which includes: an active area, a gate ring and a terminal area, wherein the active area includes: a plurality of cathode ring areas, wherein the cathode ring area includes one cathode ring or a plurality of adjacent cathode rings; and a plurality of anode areas, which correspond one to one with the plurality of cathode ring areas, wherein the doping concentration of the anode area corresponding to the cathode ring area close to the gate ring is greater than the doping concentration of the anode area corresponding to the cathode ring area far from the gate ring.
[0007] Preferably, the doping concentration of the anode region corresponding to the cathode ring region closest to the gate ring is c, and the doping concentration of the anode region corresponding to the cathode ring region farthest from the gate ring is at least 70% of c.
[0008] Preferably, the multiple cathode ring areas include: a first cathode ring area, a second cathode ring area and a third cathode ring area, wherein the first cathode ring area includes the 1st cathode ring to the i-th cathode ring, the second cathode ring area includes the i+1th cathode ring to the m-th cathode ring, the third cathode ring area includes the m+1th cathode ring to the n-th cathode ring, the 1st cathode ring is closest to the gate ring, i>1, m>i+1, n>m+1, wherein the ratio of the peak doping concentrations of the first cathode ring area, the second cathode ring area and the third cathode ring area is 1:0.9:0.8.
[0009] Preferably, the width of the cathode comb bars in the cathode ring region close to the gate ring is greater than the width of the cathode comb bars in the cathode ring region away from the gate ring.
[0010] Preferably, the active area also includes: multiple cathode areas, wherein the cathode area is located below the cathode comb bar in the cathode ring area, and the gap between the boundary of the cathode area in the cathode ring area close to the gate ring and the adjacent gate is larger than the gap between the boundary of the cathode area in the cathode ring area far from the gate ring and the adjacent gate.
[0011] Preferably, the area ratio of the cathode region in the cathode ring region close to the gate ring in the unit cell is greater than the area ratio of the cathode region in the cathode ring region far from the gate ring in the unit cell.
[0012] Preferably, the active region further comprises: a buffer region, a drift region and a base region stacked on the plurality of anode regions.
[0013] Preferably, the doping concentrations of the gate ring and the terminal region are the same as the doping concentration of the anode region corresponding to the cathode ring region farthest from the gate ring.
[0014] Preferably, the power semiconductor device includes: an IGCT device and a GTO device.
[0015] Preferably, the substrate material of the power semiconductor device is silicon or a third-generation semiconductor material.
[0016] Through the above technical scheme, the anode area provided by the utility model adopts gradual doping to reduce the conductivity modulation effect of the far gate ring, and realize the design that the current density of the far gate ring is lower than the current density of the near gate ring. Therefore, sufficient margin is left for the redistribution of anode current during shutdown, which solves the premature re-triggering caused by excessive far gate ring current density caused by anode current redistribution during shutdown, thereby greatly improving the overall shutdown capability of the device.
[0017] Other features and advantages of the present invention will be described in detail in the subsequent specific implementation section. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] The accompanying drawings are used to provide a further understanding of the embodiments of the present utility model and constitute a part of the specification. Together with the following specific implementations, they are used to explain the embodiments of the present utility model, but do not constitute a limitation on the embodiments of the present utility model. In the accompanying drawings:
[0019] Figure 1A is a top view of the GCT device;
[0020] Figure 1B is a cross-sectional view of a GCT device;
[0021] Figure 2 This is an equivalent circuit diagram of the GCT device provided by an embodiment of the present utility model in a quasi-static state;
[0022] Figure 3 It is a schematic diagram of the structure of a power semiconductor device provided by an embodiment of the utility model;
[0023] Figure 4 This is a schematic diagram of the gradient doping concentration distribution of the back P+ region / anode region provided by an embodiment of the utility model;
[0024] Figure 5 It is a schematic diagram of the structure of a power semiconductor device provided by an embodiment of the utility model;
[0025] Figure 6 is a layout diagram of variable comb strips provided in one embodiment of the utility model; and
[0026] Figure 7This is a shutdown equivalent circuit diagram provided by an embodiment of the utility model.
[0027] Description of Reference Numerals
[0028] 1-active region; 2-gate ring; 3-terminal region; 4-buffer region; 5-drift region; 6-base region; 7-anode; 10-cathode comb; 20-cathode region; 30-gate; C1-Cj-cathode ring region; A1-Aj-anode region. DETAILED DESCRIPTION
[0029] The specific implementation of the present invention is described in detail below in conjunction with the accompanying drawings. It should be understood that the specific implementation described here is only used to illustrate and explain the present invention, and is not used to limit the present invention.
[0030] Before introducing the various embodiments of the present invention, the design principle of the present invention is first explained and illustrated.
[0031] The cathode combs in each cathode ring in the active area are connected in parallel, such as Figure 2 As shown, a plurality of the first cathode rings (e.g. s ) cathode combs are connected in parallel, and multiple (e.g. l The cathode combs are also connected in parallel. When the device is quasi-static, the voltage of each cathode ring is equal and is the on-state voltage of the device. Assume that the cathode ring closest to the gate ring is marked as the first cathode ring, and mark each cathode ring one by one in sequence until the cathode ring farthest from the gate ring is marked as the nth cathode ring. According to Ohm's law, we can get:
[0032] ;
[0033] in, is the total current of the first cathode ring, is the total resistance of the first cathode ring, is the total current of the nth cathode ring, is the total resistance of the nth cathode ring.
[0034] Assume that the equivalent resistance of each cathode comb bar in the first cathode ring when it is turned on is , the equivalent resistance of each cathode comb bar in the nth cathode ring when it is turned on is , and then the current ratio of the first cathode ring and the nth cathode ring can be derived, where, and The numbers of slivers of the first cathode ring and the nth cathode ring are:
[0035] .
[0036] For conventional GCT design, each ring of cathode comb has the same structure and the area is set to , the current density ratio of the first cathode ring and the nth cathode ring is as follows:
[0037] ;
[0038] in, J 1 is the current density of the first cathode ring, J n is the current density of the nth cathode ring.
[0039] From the above, it can be seen that the ratio of the current density of each cathode ring is inversely proportional to the equivalent resistance of the cathode comb in the cathode ring. For conventional designs, the cathode size of each ring is the same, the equivalent resistance is the same when turned on, the current density ratio is 1, and the current density of the inner and outer rings is the same; when turned off, the far gate ring bears a larger current density due to current redistribution, and reaches its re-trigger current density limit first, resulting in failure.
[0040] The design concept of the utility model is mainly reflected in: when the device is turned on, the current density of the far gate ring is smaller than the current density of the near gate ring (J1>J2>J3....>J n ), when turned off, the far gate ring has more current margin and can withstand a larger turn-off current. The utility model proposes a design concept that the current density of the far gate ring is lower than the current density of the near gate ring when on, providing a larger current margin for the far gate ring when turned off, and counteracting premature failure caused by the redistribution of the anode current of the far gate ring caused by the non-uniformity of the turn-off when turned off.
[0041] Figure 3 Schematic diagram of the structure of a power semiconductor device provided by an embodiment of the utility model. Figure 3 As shown, the power semiconductor device comprises: an active region 1, a gate ring 2 and a terminal region 3. The active region comprises: a plurality of cathode ring regions (eg, C1, C2, ... Cj) and a plurality of anode regions (eg, A1, A2, ... Aj).
[0042] The cathode ring area includes one cathode ring or a plurality of adjacent cathode rings. For example, the cathode ring area C1 includes one cathode ring; the cathode ring area C2 includes one cathode ring; ... the cathode ring area Cj includes three cathode rings.
[0043] The multiple anode regions (e.g., A1, A2, ... Aj) correspond to the multiple cathode ring regions (e.g., C1, C2, ... Cj) one by one. The doping concentration of the anode region (e.g., A1) corresponding to the cathode ring region (e.g., C1) close to the gate ring is greater than the doping concentration of the anode region (e.g., A2) corresponding to the cathode ring region (e.g., C2) far from the gate ring.
[0044] Specifically, as the distance between the cathode ring region and the gate ring increases, the doping concentration of the anode region corresponding to the cathode ring region decreases successively. That is to say, the anode region adopts a gradient doping method.
[0045] Among them, the anode region is mainly used to provide hole injection. When the power semiconductor device (such as a GCT device) is turned on, the anode region will inject holes into the drift region. The hole injection is used to generate a high-concentration plasma in the drift region for conductivity modulation to reduce the on-resistance. The better the modulation effect, the lower the on-resistance. The conductivity modulation effect of the anode region is positively correlated with its concentration. When the concentration of the anode region corresponding to the gate ring from near to far decreases successively, its conductivity modulation effect gradually becomes worse, and the corresponding equivalent resistance from near to far of the gate ring gradually increases (r1 < r2 <... < rj). In this embodiment, if the cathode ring adopts a conventional comb design, for the conventional comb design, the ratio of the current density on each cathode ring is inversely proportional to the equivalent resistance corresponding to the cathode comb in the cathode ring. Therefore, the current density of the cathode ring region far from the gate ring is less than that of the cathode ring region close to the gate ring (J1 > J2 >... > J j ), providing a larger current margin for the cathode ring region far from the gate ring. In the traditional IGCT structure, the P+ anode region adopts a general injection form, and the doping distribution on the entire back surface of the active region, the terminal region, and the gate ring is the same (as Figure 1B shown). The P+ doping in the terminal region and the gate ring has a very weak effect on the conductivity modulation of the active region, but it will bring an increase in leakage current and an increase in turn-off time. For the mesa terminal structure, the high concentration on the surface during the mesa shaping of the P+ doping in the terminal region is basically removed, and the influence is basically eliminated, but the influence of the gate ring cannot be eliminated.
[0046] In an embodiment, the doping concentration of the anode region corresponding to the cathode ring region closest to the gate ring is c, and the doping concentration of the anode region corresponding to the cathode ring region farthest from the gate ring is at least 70%c.
[0047] The comb layout adopts a conventional layout, that is, the structure of the cathode comb 10 of each cathode ring is the same (as Figure 3 shown). The anode region adopts gradient doping. From the near gate ring to the far gate ring, the doping concentrations of A1 (the closest to the gate ring), A2,... Aj decrease successively (as Figure 3-Figure 4 shown). For example, the doping concentration change range from the near gate ring to the far gate ring decreases from 100% to more than 70%.
[0048] Further, the multiple cathode ring regions include: a first cathode ring region, a second cathode ring region, and a third cathode ring region.
[0049] Specifically, the first cathode ring area includes the 1st cathode ring to the i-th cathode ring, the second cathode ring area includes the i+1th cathode ring to the m-th cathode ring, the third cathode ring area includes the m+1th cathode ring to the n-th cathode ring, the 1st cathode ring is closest to the gate ring, i>1, m>i+1, n>m+1.
[0050] The ratio of the peak doping concentrations of the first cathode ring region, the second cathode ring region and the third cathode ring region is 1:0.9:0.8.
[0051] The specific implementation method is: photolithography injection in batches. The overall gradient doping process is relatively complicated. It is more feasible to divide the back of the cathode ring into zones, for example, into 2-3 zones, and use 2-3 photolithography injections to complete. Taking 16 rings divided into three zones as an example, r1-r10 can be grouped as a group with a normalized peak concentration of 1, r11-r13 as a group with a normalized peak concentration of 0.9, and r14-r16 as a group with a normalized peak concentration of 0.8, as shown in Table 1.
[0052] Table 1 Peak concentrations corresponding to different anode regions
[0053]
[0054] The anode region adopts gradient doping. The cathode ring adopts conventional comb strip design as described above, which can provide a larger current margin for the far gate pole ring, thereby improving the shutdown capability. However, on the basis of gradient doping in the anode region, the comb strip of the cathode ring can also be specially designed to reduce the lateral resistance when the far gate pole ring is turned off, increase the anti-trigger capability from the structure itself, and improve the shutdown current.
[0055] In one embodiment, the width of the cathode comb bars in the cathode ring region close to the gate ring is greater than the width of the cathode comb bars in the cathode ring region away from the gate ring.
[0056] Specifically, the width of the cathode comb strips in the cathode ring area from the near gate ring to the far gate ring gradually narrows (e.g. Figure 5 As shown, the width of the cathode comb strips 10 in C1, C2, ... Cj is narrowed successively), which can reduce the lateral resistance R of the far gate ring when it is turned off. Pk (like Figure 7 As shown), the anti-triggering capability is increased from the structure itself, thereby improving the shutdown current. Figure 6 From the perspective of the top view, it is shown that the width of the cathode comb bars in the cathode ring area from the near gate pole ring to the far gate pole ring gradually narrows, wherein each cathode ring area corresponds to a cathode ring. If each cathode ring area includes multiple cathode rings, the widths of the cathode comb bars of the multiple cathode rings are equal, and the widths of the cathode comb bars of the cathode rings in different cathode ring areas are different.
[0057] In the above variable comb strip design, the distance from the cathode region boundary to the gate electrode can remain unchanged or gradually become narrower.
[0058] In one embodiment, the active region further includes: a plurality of cathode regions 20, wherein the cathode regions 20 are located below the cathode comb bars 10 in the cathode ring region.
[0059] Correspondingly, the gap between the boundary of the cathode region in the cathode ring region close to the gate ring and the adjacent gate is larger than the gap between the boundary of the cathode region in the cathode ring region far from the gate ring and the adjacent gate.
[0060] Specifically, the gap between the boundary of the cathode region 20 and the adjacent gate 30 in the cathode ring region gradually narrows from the near gate ring to the far gate ring (eg Figure 5 As shown, the gap between the cathode region 20 boundary and the adjacent gate 30 in C1, C2, ... Cj becomes narrower in sequence), which can reduce the lateral resistance R of the far gate ring when it is turned off. Pk (like Figure 7 As shown), the anti-triggering capability is increased from the structure itself, thereby improving the shutdown current.
[0061] The shutdown equivalent circuit is as follows Figure 7 As shown in Figure 1, when a power semiconductor device (such as a GCT device) is turned off, a reverse voltage V is applied between the gate and cathode. GKi The J3 junction is reverse biased. During the shutdown process, under the control of the gate drive circuit, the current flowing through the N+ cathode region is completely commutated to the gate through the P base region, and the P base region below the N+ cathode region and the P base region below the gate-cathode region will generate a certain lateral impedance R PK and R PGK When current flows through these two resistors, a certain voltage drop will occur. When the voltage below the center of the cathode exceeds the voltage V applied by the cell gate-cathode GKi , and when the PN junction turn-on voltage is reached, the J3 junction is re-triggered and the device fails to turn off. The device adopts a variable comb strip design. The width of the N+ cathode region becomes narrower in sequence, the path of the current flowing through the P base region below the N+ cathode region is reduced, the distance from the N+ cathode region boundary to the gate electrode is narrowed, and the path of the current flowing through the N+ cathode region boundary to the P base region below the gate electrode is reduced. R PK and R PGK The lateral resistance will decrease accordingly, and a larger current can be tolerated before reaching the re-trigger level.
[0062] In addition to the benefit of a larger turn-off margin brought by the P+ anode area on the back side, this embodiment can reduce the lateral resistance at turn-off by increasing the distance from the gate ring, narrowing the cathode comb width, or narrowing the distance from the N+ cathode area boundary to the gate electrode, thereby increasing the anti-triggering capability from the structure itself and improving the turn-off current.
[0063] In one embodiment, the cathode region in the cathode ring region close to the gate ring accounts for a larger area in the unit cell than the cathode region in the cathode ring region far from the gate ring. The area ratio of the cathode region decreases from the near gate ring to the far gate ring, thereby reducing the current density of the far gate ring during conduction and leaving sufficient margin for anode current redistribution during shutdown.
[0064] Of course, the cathode comb design and the distance design from the N+ cathode region boundary to the gate electrode can be combined according to actual needs to reduce the lateral resistance during shutdown to varying degrees, increase the anti-triggering capability of the structure itself, and improve the shutdown current.
[0065] In one embodiment, the active region 1 further includes: a buffer region 4, a drift region 5 and a base region 6 stacked on the plurality of anode regions (eg, A1, A2, ..., Aj), such as Figure 5 shown.
[0066] like Figure 5 As shown, the active region 1 may further include an anode 7 .
[0067] In one embodiment, the doping concentrations of the gate ring 2 and the terminal region 3 are the same as the doping concentration of the anode region (eg Aj) corresponding to the cathode ring region farthest from the gate ring.
[0068] In this embodiment, in order to increase the turn-off speed and reduce the leakage current, the gate ring and the terminal region also use the same implantation concentration as the far gate ring.
[0069] The cathode in each structural diagram of the utility model is a boss shape, which can also be a planar structure. The gate ring in each structural diagram of the utility model is located outside the active area, which is also applicable to the gate ring in the middle of the active area or multiple gate ring structures.
[0070] In the above embodiments, the GCT device is mainly used as an example for explanation and description, wherein the GCT device includes not only a reverse resistance type IGCT device, but also an asymmetric type IGCT device. Of course, the utility model is not only applicable to GCT devices, but also to GTO (gate turn-off thyristor) and other power devices with radial and annular cathode regions.
[0071] In one embodiment, the substrate material of the power semiconductor device is silicon or a third-generation semiconductor material.
[0072] Specifically, the substrate material of the power device is not limited to silicon, but may also be third-generation semiconductor materials such as silicon carbide or gallium nitride.
[0073] In one embodiment, the power semiconductor device includes: an IGCT device and a GTO device.
[0074] The utility model provides a composite anode region design structure, in which the P+ anode region adopts a gradual doping with the doping concentration decreasing from the near gate ring to the far gate ring, reducing the current density of the far gate ring when turned on, leaving sufficient margin for the anode current redistribution when turned off, and solving the problem of premature re-triggering caused by excessive current density of the far gate ring due to the anode current redistribution during the shutdown process. Further, a wide comb N+ emitter region near the gate ring and a narrow comb N+ emitter region far from the gate ring are adopted to improve the far gate ring's ability to resist re-triggering and improve the overall shutdown capability of the device.
[0075] In summary, the anode region provided by the utility model adopts gradual doping (that is, the doping concentration of the anode region decreases successively from the near gate ring to the far gate ring), reducing the conductivity modulation effect of the far gate ring, and realizing a design in which the current density of the far gate ring is lower than the current density of the near gate ring. As a result, sufficient margin is left for the redistribution of the anode current during shutdown, thereby solving the problem of premature re-triggering caused by excessive current density of the far gate ring caused by the redistribution of the anode current during the shutdown process.
[0076] The preferred embodiments of the present invention are described in detail above in conjunction with the accompanying drawings. However, the present invention is not limited to the specific details in the above embodiments. Within the technical concept of the present invention, the technical solution of the present invention can be subjected to a variety of simple modifications, and these simple modifications all belong to the protection scope of the present invention.
[0077] It should also be noted that the various specific technical features described in the above specific embodiments can be combined in any suitable manner without contradiction. In order to avoid unnecessary repetition, the present utility model will not further describe various possible combinations.
[0078] In addition, various embodiments of the present invention may be arbitrarily combined, and as long as they do not violate the concept of the present invention, they should also be regarded as the contents disclosed by the present invention.
Claims
1. A power semiconductor device, characterized in that: The power semiconductor device comprises: an active region, a gate ring and a terminal region. Wherein, the active area includes: a plurality of cathode ring regions, wherein the cathode ring region comprises one cathode ring or a plurality of adjacent cathode rings; and A plurality of anode regions correspond one-to-one to the plurality of cathode ring regions, wherein the doping concentration of the anode region corresponding to the cathode ring region close to the gate ring is greater than the doping concentration of the anode region corresponding to the cathode ring region far from the gate ring.
2. The power semiconductor device according to claim 1, characterized in that: The doping concentration of the anode region corresponding to the cathode ring region closest to the gate ring is c, and the doping concentration of the anode region corresponding to the cathode ring region farthest from the gate ring is at least 70% of c.
3. The power semiconductor device according to claim 1, characterized in that: The plurality of cathode ring regions include: a first cathode ring region, a second cathode ring region and a third cathode ring region, The first cathode ring area includes the 1st cathode ring to the i-th cathode ring, the second cathode ring area includes the i+1th cathode ring to the m-th cathode ring, the third cathode ring area includes the m+1th cathode ring to the n-th cathode ring, the 1st cathode ring is closest to the gate ring, i>1, m>i+1, n>m+1, The ratio of the peak doping concentrations of the first cathode ring region, the second cathode ring region and the third cathode ring region is 1:0.9:0.
8.
4. The power semiconductor device according to claim 1, characterized in that: The width of the cathode comb bars in the cathode ring region close to the gate ring is greater than the width of the cathode comb bars in the cathode ring region far from the gate ring.
5. The power semiconductor device according to any one of claims 1 to 4, characterized in that: The active region further comprises: A plurality of cathode regions, wherein the cathode regions are located below the cathode comb bars in the cathode ring region, The gap between the boundary of the cathode region in the cathode ring region close to the gate ring and the adjacent gate is larger than the gap between the boundary of the cathode region in the cathode ring region far from the gate ring and the adjacent gate.
6. The power semiconductor device according to claim 5, characterized in that: The area ratio of the cathode region in the cathode ring region close to the gate ring in the unit cell is greater than the area ratio of the cathode region in the cathode ring region far from the gate ring in the unit cell.
7. The power semiconductor device according to claim 1, characterized in that: The active region further includes a buffer region, a drift region and a base region stacked on the plurality of anode regions.
8. The power semiconductor device according to claim 1, characterized in that: The doping concentrations of the gate ring and the terminal region are the same as the doping concentration of the anode region corresponding to the cathode ring region farthest from the gate ring.
9. The power semiconductor device according to claim 1, characterized in that: The power semiconductor devices include: IGCT devices and GTO devices.
10. The power semiconductor device according to claim 9, characterized in that: The substrate material of the power semiconductor device is silicon or a third-generation semiconductor material.