Active back-to-back direct buck type power factor correction (PFC) topological structure

Abstract

The utility model discloses an active back-to-back direct buck type power factor correction (PFC) topological structure, and belongs to the technical field of power electronic conversion. The circuit structure comprises three parallel power supply circuits used for providing stable DC voltage and an active PFC topology circuit connected with the three parallel power supply circuits. The power supply circuit is formed by connecting three power supply units through inductors which are configured in series and is connected with three capacitors which are connected in parallel to form a filtering and transient response optimization part. The active PFC topology circuit comprises three PFC circuit units connected in parallel, each PFC circuit unit is composed of four diodes and at least one metal oxide semiconductor field effect transistor (MOSFET), and the active PFC topology circuit is configured to achieve efficient energy conversion. According to the utility model, through the combined design of the four diodes and the MOSFETs, the power factor can be dynamically adjusted by adjusting the switching frequency and the duty ratio of the MOSFETs under different input voltage and load conditions, thereby achieving the purpose of reducing line loss and electromagnetic interference.

Description

Technical Field

[0001] The utility model belongs to the technical field of power electronic conversion, and specifically relates to an active back-to-back direct buck type power factor correction PFC topology structure, and in particular to a circuit topology structure for improving the power factor in the AC to DC conversion process, reducing energy loss, and optimizing power supply quality. Background Art

[0002] In modern electronic power systems, power factor correction (PFC) technology is an important means to improve energy efficiency and reduce energy consumption. Traditional power supply designs often face problems such as low power factor, high harmonic distortion, and insufficient energy conversion efficiency, which will lead to reduced energy utilization efficiency and may have an adverse impact on the power grid. Power factor is a key indicator for measuring the efficiency of power systems. It is the ratio of actual power to apparent power. Its ideal value should be 1, which means that in the power system, all electrical energy is effectively used and there is no waste of useless work.

[0003] As electronic equipment has higher requirements for power quality, traditional passive PFC technology (such as simple capacitor filtering) can no longer meet increasingly stringent international standards. Therefore, active PFC technology has emerged and developed rapidly. Active PFC uses switching power supply technology to control the shape of the input current so that it is in phase with the input voltage, thereby improving the power factor and reducing the total harmonic distortion (THD) of the input current.

[0004] Currently, there are various active PFC topologies, among which buck PFC is a more common one. It is usually composed of diodes, inductors, capacitors and switching devices (such as MOSFET). In the buck PFC topology, the high-frequency switching action of the switching device can effectively adjust the waveform of the input current to make it nearly synchronized with the input voltage waveform, thereby improving the power factor. However, in traditional buck PFC, when facing high current or high voltage application scenarios, the loss of the device will increase accordingly and the efficiency will be affected.

[0005] The back-to-back direct buck PFC topology is a new type of active PFC structure, which connects the buck converter in series on the input side to achieve more flexible current control, thereby optimizing the energy conversion efficiency. This topology can not only reduce the loss of switching devices in high-voltage applications, but also further reduce the harmonic content of the input current by adjusting the working phase difference of adjacent switching devices. In addition, the back-to-back direct buck PFC topology can achieve better heat dissipation performance and higher system reliability. Although the back-to-back direct buck PFC topology has brought significant improvements to power factor correction, it also faces challenges such as increased control complexity, increased design difficulty, and increased cost. In addition, in order to achieve higher efficiency and better performance, there are strict requirements for the selection of switching devices and the parameter design of inductors and capacitors.

[0006] Therefore, it is urgent to research and develop a back-to-back direct buck PFC topology with simplified structure, convenient control and high cost-effectiveness. Utility Model Content

[0007] The purpose of the utility model is to overcome the problems existing in the prior art and provide a more efficient, stable and environmentally friendly PFC topology structure, which is configured to achieve efficient energy conversion through the combination design of four diodes and MOSFET, and is used in occasions of improving power factor and reducing harmonic distortion, thereby improving cost-effectiveness and stability.

[0008] To achieve the above-mentioned purpose, the utility model adopts the following technical scheme: an active back-to-back direct buck type power factor correction PFC topology structure, including three parallel power supply circuits for providing a stable DC voltage and an active PFC topology circuit connected thereto; the power supply circuit is composed of power supply units e1, e2, and e3 connected through inductors L1, L2, and L3 configured in series, respectively, and connected to three parallel capacitors C1, C2, and C3;

[0009] The active PFC topology circuit includes three parallel PFC circuit units, each of which is composed of four diodes D1, D2, D3, D4 and at least one metal oxide semiconductor field effect transistor MOSFET, and the right end of each power supply circuit is connected to two anti-parallel diodes D1 and D2 in its corresponding PFC circuit unit;

[0010] The anode of the diode D1 is connected to the anode of the diode D3 and the drain of the MOSFET, the cathode of the diode D2 is connected to the cathode of the diode D4 and the source of the MOSFET, the cathode of the diode D3 is connected to the cathode of the diode D5 and the inductor L4, the anode of the diode D4 is connected to the anode of the diode D5 and the inductor L5, the output end of the inductor L4 is connected to the anode of the capacitor C4, the output end of the inductor L5 is connected to the cathode of the capacitor C5, the cathode of the capacitor C4 is connected to the anode of the capacitor C5 and is connected to the ground, and a load N is also connected in parallel to the anode of the capacitor C4 and the cathode of the capacitor C5.

[0011] The right end of each power supply circuit is connected to the cathode of the diode D1 and the anode of the diode D2 in the corresponding PFC circuit unit.

[0012] The positive electrodes of the three parallel capacitors C1, C2, and C3 are connected to the output ends of the inductors L1, L2, and L3 respectively, and the negative electrodes of the three parallel capacitors C1, C2, and C3 are connected together.

[0013] A metal oxide semiconductor field effect transistor MOSFET is provided in each of the three parallel PFC circuit units, including T1, T2 and T3 respectively.

[0014] The metal oxide semiconductor field effect transistor MOSFET has a preset switching frequency of 50 kHz and a duty cycle of 40% during the working cycle of the circuit.

[0015] The beneficial effects of the utility model are:

[0016] 1) A new back-to-back configuration is designed in the topology of the utility model, which contains buck converter units connected in series, which helps to reduce the stress of switching devices and improve the conversion efficiency under high voltage and high current operating conditions.

[0017] 2) The topological structure of the utility model uses an intelligent control strategy, which optimizes the current waveform by accurately controlling the opening and closing time of the switching device, thereby improving the power factor of the input power supply and reducing the total harmonic distortion THD.

[0018] 3) High-efficiency inductors and capacitors (such as Murata CDR series inductors and Samsung CL series capacitors) are selected in the topology of the utility model. These carefully designed passive components can provide better filtering effects while promoting fast transient response and stable operation of the system.

[0019] 4) The topology of the utility model also includes an easy-to-integrate design, so that the PFC circuit can be easily embedded in existing power systems and electronic products without large-scale transformation.

[0020] 5) The utility model topology structure provides a solution that can meet strict power quality standards while providing stable and efficient energy conversion. It is particularly suitable for high-performance power applications that require high power factor and low harmonic distortion, and improves the energy efficiency and power quality of commercial and industrial power systems. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 It is a schematic diagram of the circuit structure of the utility model;

[0022] Figure 2 An equivalent circuit model of the topology is established in Matlab for the utility model;

[0023] Figure 3 This is a circuit simulation result diagram of the utility model. DETAILED DESCRIPTION

[0024] The present invention will be further explained below in conjunction with the accompanying drawings and specific embodiments.

[0025] Example: Figure 1 As shown, the utility model provides an active back-to-back direct buck type power factor correction PFC topology structure, including three parallel power supply circuits for providing a stable DC voltage and an active PFC topology circuit connected thereto.

[0026] Among them, the power supply circuit is composed of power supply units e1, e2, and e3 respectively connected through inductors L1, L2, and L3 configured in series, and connected to three parallel capacitors C1, C2, and C3; the positive electrodes of the three parallel capacitors C1, C2, and C3 are respectively connected to the output ends of the inductors L1, L2, and L3, and the negative electrodes of the three parallel capacitors C1, C2, and C3 are connected together. The parallel capacitor is used to reduce the input ripple voltage and provide a stable DC voltage to the active PFC topology circuit.

[0027] The active PFC topology circuit includes three parallel PFC circuit units, each of which is composed of four diodes D1, D2, D3, and D4 and a metal oxide semiconductor field effect transistor MOSFET, where the four diodes are connected in a specific arrangement to ensure that energy flows correctly and efficiently in both directions between the AC input and the PFC circuit; the right end of each power circuit is connected to two anti-parallel diodes D1 and D2 in its corresponding PFC circuit unit, and the right end of each power circuit is connected to the cathode of diode D1 and the anode of diode D2, respectively.

[0028] The anode of the diode D1 is connected to the anode of the diode D3 and the drain of the MOSFET, the cathode of the diode D2 is connected to the cathode of the diode D4 and the source of the MOSFET, the cathode of the diode D3 is connected to the cathode of the diode D5 and the inductor L4, the anode of the diode D4 is connected to the anode of the diode D5 and the inductor L5, the output end of the inductor L4 is connected to the anode of the capacitor C4, the output end of the inductor L5 is connected to the cathode of the capacitor C5, the cathode of the capacitor C4 is connected to the anode of the capacitor C5 and is connected to the ground, and a load N is also connected in parallel to the anode of the capacitor C4 and the cathode of the capacitor C5.

[0029] The metal oxide semiconductor field effect transistor MOSFET operates at a predetermined switching frequency and duty cycle during the circuit's working cycle to ensure continuous current flow throughout the working cycle and achieve power factor optimization; the active PFC topology circuit includes three parallel PFC circuit units, each of which is composed of four diodes D1, D2, D3, D4 and a metal oxide semiconductor field effect transistor MOSFET.

[0030] like Figure 2 As shown, an equivalent circuit model of the topology is established in Matlab, with an input voltage of 220V / 50Hz and an output voltage of 200V. The switching frequency of the MOSFET is set to 50kHz, and the duty cycle is adjusted from 0.3 to 0.5 to minimize the total harmonic distortion of the input current waveform.

[0031] like Figure 3 As shown in the figure, the simulation results show that when the duty cycle is 0.4, the input current waveform is closest to the standard sine wave, the total harmonic distortion is 3%, the output voltage is stable at 200V, the peak factor reaches 0.96, and the THD is 3.3%. This operating point can ensure that the circuit operates stably under full-range loading. Therefore, the duty cycle of the MOSFET is finally set to 0.4, achieving the best compromise between power factor correction and stability.

[0032] The specific arrangement of the four diodes ensures the correct and efficient bidirectional flow of energy between the AC input and the PFC circuit; for example, during the positive half-cycle of the input voltage, the current flows into the PFC circuit through D1 and D3; and during the negative half-cycle; the current returns from the PFC circuit to the AC source through D2 and D4, achieving bidirectional power flow. The combination of the four diodes and the MOSFET is used to dynamically maintain the sinusoidal nature of the input current waveform by adjusting the switching frequency (50kHz-100kHz) and duty cycle (30%-50%) of the MOSFET under different input voltage (90V-265V) and load (25%-100%) conditions, thereby controlling the power factor above 0.98, reducing line losses and electromagnetic interference, and improving the overall efficiency (92%+) and stability of the power system.

[0033] The values ​​of the inductor and capacitor are selected based on the required power factor correction performance and the specific requirements of the target application to achieve the best filtering effect and transient response. For applications with a target total harmonic distortion of less than 5%, the input filter inductor value is selected to be 300μH to 500μH and the output filter capacitor value is 220μF to 330μF to achieve stable PFC conversion and fast load tracking.

[0034] The utility model adopts a combination design of four diodes and MOSFET, so that under different input voltage and load conditions, by adjusting the switching frequency and duty cycle of MOSFET, the power factor can be dynamically adjusted, thereby achieving the purpose of reducing line loss and electromagnetic interference, and providing a more efficient, stable and environmentally friendly power supply solution for various electronic devices.

[0035] The above description is only used to illustrate the technical solution of the utility model rather than to limit it. Other modifications or equivalent substitutions made to the technical solution of the utility model by ordinary technicians in this field should be included in the scope of the claims of the utility model as long as they do not depart from the spirit and scope of the technical solution of the utility model.

Claims

1. An active back-to-back direct buck type power factor correction PFC topology, characterized by: It includes three parallel power supply circuits for providing a stable DC voltage and an active PFC topology circuit connected thereto; the power supply circuit is composed of power supply units e1, e2, e3 connected through inductors L1, L2, L3 configured in series, and connected to three parallel capacitors C1, C2, C3; The active PFC topology circuit includes three parallel PFC circuit units, each of which is composed of four diodes D1, D2, D3, D4 and at least one metal oxide semiconductor field effect transistor MOSFET, and the right end of each power supply circuit is connected to two anti-parallel diodes D1 and D2 in its corresponding PFC circuit unit; The anode of the diode D1 is connected to the anode of the diode D3 and the drain of the MOSFET, the cathode of the diode D2 is connected to the cathode of the diode D4 and the source of the MOSFET, the cathode of the diode D3 is connected to the cathode of the diode D5 and the inductor L4, the anode of the diode D4 is connected to the anode of the diode D5 and the inductor L5, the output end of the inductor L4 is connected to the anode of the capacitor C4, the output end of the inductor L5 is connected to the cathode of the capacitor C5, the cathode of the capacitor C4 is connected to the anode of the capacitor C5 and is connected to the ground, and a load N is also connected in parallel to the anode of the capacitor C4 and the cathode of the capacitor C5.

2. The active back-to-back direct buck type power factor correction PFC topology structure according to claim 1, characterized in that: The right end of each power supply circuit is connected to the cathode of the diode D1 and the anode of the diode D2 in the corresponding PFC circuit unit.

3. The active back-to-back direct buck type power factor correction PFC topology structure according to claim 1, characterized in that: The positive electrodes of the three parallel capacitors C1, C2, and C3 are connected to the output ends of the inductors L1, L2, and L3 respectively, and the negative electrodes of the three parallel capacitors C1, C2, and C3 are connected together.

4. The active back-to-back direct buck type power factor correction PFC topology structure according to claim 1, characterized in that: A metal oxide semiconductor field effect transistor MOSFET is provided in each of the three parallel PFC circuit units, including T1, T2 and T3 respectively.

5. An active back-to-back direct buck type power factor correction PFC topology structure according to claim 1 or 4, characterized in that: The metal oxide semiconductor field effect transistor MOSFET has a preset switching frequency of 50 kHz and a duty cycle of 40% during the working cycle of the circuit.

Images