Drive control circuit, hybrid switching device, and vehicle

Abstract

The utility model relates to the technical field of control circuits, and discloses a drive control circuit, a hybrid switching device and a vehicle, the drive control circuit comprises a first time sequence control circuit, a second time sequence control circuit, a current comparison circuit and a switching circuit; the first time sequence control circuit is used for outputting an IGBT driving signal; the second time sequence control circuit is used for outputting a SiC driving signal; the current comparison circuit is used for outputting a first signal under the condition that the current current signal does not exceed the current signal range, and outputting a second signal under the condition that the current current signal exceeds the current signal range; and the switching circuit is used for cutting off the IGBT driving signal when the current comparison circuit outputs the first signal, and outputting the IGBT driving signal when the current comparison circuit outputs the second signal. According to the utility model, when the current is smaller than the current limit value which can be borne by the SiC MOSFET device, only the SiC MOSFET device is started, so that the control logic can be simplified.

Description

Technical Field

[0001] The utility model relates to the technical field of control circuits, in particular to a drive control circuit, a hybrid switch device and a vehicle. Background Technique

[0002] Due to its small on-resistance and low switching loss, SiC MOSFET (Silicon Carbide - Metal Oxide Semiconductor Field Effect Transistor) has become increasingly common in the design of power electronic converters. By using SiC MOSFET as a switching device, the switching loss of devices such as inverters is greatly reduced, and the system efficiency is improved. However, the high cost and low current-carrying capacity of SiC devices are still the main problems restricting their large-scale application. And Si IGBT (Silicon - Insulated Gate Bipolar Transistor) has a low cost and a strong current-carrying capacity. In order to reduce the application cost of switching devices under high current requirements, the Si IGBT / SiC MOSFET hybrid switch device (HybirdSwitch, HyS) has begun to come into view.

[0003] Different from the driving of pure SiC or pure IGBT, the driving of the hybrid switch device requires different voltage levels to drive SiC / IGBT respectively. At the same time, since the turn-on and turn-off speeds of SiC are faster than those of IGBT, in order to prevent the SiC device from being damaged due to SiC turning on faster than IGBT under high current conditions, delay control needs to be added, which also makes the entire control logic more complex and occupies more controller resources. Content of the Utility Model

[0004] In view of this, the utility model provides a drive control circuit, a hybrid switch device and a vehicle to solve the problem of complex control of the hybrid switch device.

[0005] In a first aspect, the utility model provides a drive control circuit, including: a first timing control circuit, a second timing control circuit, a current comparison circuit and a switch circuit;

[0006] The first timing control circuit is configured to convert the input PWM signal into an IGBT drive signal; the second timing control circuit is configured to convert the input PWM signal into a SiC drive signal;

[0007] The current comparison circuit is configured to compare the current current signal with the current signal range, and output a first signal when the current current signal does not exceed the current signal range, and output a second signal when the current current signal exceeds the current signal range;

[0008] The switch circuit is connected to the first timing control circuit and the current comparison circuit; the switch circuit is configured to cut off the IGBT drive signal when the current comparison circuit outputs the first signal, and output the IGBT drive signal when the current comparison circuit outputs the second signal.

[0009] In some alternative embodiments, the current comparison circuit includes a logic circuit and a plurality of current comparison modules;

[0010] The current comparison module is configured to compare a current signal and a current signal range, and output different signals according to the magnitude relationship between the current signal and the current signal range;

[0011] The input end of the logic circuit is connected to the output ends of the plurality of current comparison modules; the logic circuit is configured to output a second signal when the signal output by at least one of the current comparison modules indicates that the current signal exceeds the current signal range.

[0012] In some alternative embodiments, at least some of the current comparison modules include: a first comparator and a second comparator;

[0013] The non-inverting input end of the first comparator is used to access the maximum current signal of the current signal range, and the inverting input end of the first comparator is used to access the current signal;

[0014] The non-inverting input end of the second comparator is used to access the current signal, and the inverting input end of the second comparator is used to access the minimum current signal of the current signal range;

[0015] The output end of the first comparator and the output end of the second comparator are connected and used as the output end of the current comparison module.

[0016] In some alternative embodiments, the logic circuit is a NAND gate circuit, and the switch circuit is an AND gate circuit.

[0017] In some alternative embodiments, the drive control circuit further includes: a current detection circuit;

[0018] The current detection circuit is connected to the current comparison circuit, and is configured to collect the current signal and send the current signal to the current comparison circuit.

[0019] In some alternative embodiments, the first timing control circuit includes: a first resistor, a first capacitor and a first diode; the second timing control circuit includes: a second resistor, a second capacitor and a second diode;

[0020] The first end of the first resistor is used to connect to the PWM signal, and the second end of the first resistor is grounded through the first capacitor; the positive electrode of the first diode is connected to the first end of the first resistor, and the negative electrode of the first diode is connected to the second end of the first resistor; the second end of the first resistor is used to output the IGBT drive signal;

[0021] The second end of the second resistor is used to connect to the PWM signal, and the second end of the second resistor is grounded through the second capacitor; the negative electrode of the second diode is connected to the second end of the second resistor, and the positive electrode of the second diode is connected to the second end of the second resistor; the second end of the second resistor is used to output the SiC drive signal.

[0022] In some alternative embodiments, the first timing control circuit further includes: a first drive circuit; the second timing control circuit further includes: a second drive circuit;

[0023] The second end of the first resistor outputs the IGBT drive signal through the first drive circuit;

[0024] The second end of the second resistor outputs the SiC drive signal through the second drive circuit.

[0025] In some alternative embodiments, the first drive circuit includes a first AND gate circuit, and the second drive circuit includes a second AND gate circuit;

[0026] The first input terminal of the first AND gate circuit is connected to the second end of the first resistor, and the first input terminal of the second AND gate circuit is connected to the second end of the second resistor; the second input terminals of the first AND gate circuit and the second AND gate circuit are both used to connect to a high level;

[0027] The output terminal of the first AND gate circuit is used to output the IGBT drive signal, and the output terminal of the second AND gate circuit is used to output the SiC drive signal.

[0028] In some alternative embodiments, the drive control circuit further includes: an IGBT drive chip and a SiC drive chip;

[0029] The input terminal of the IGBT drive chip is connected to the output terminal of the switch circuit;

[0030] The input terminal of the SiC drive chip is connected to the output terminal of the second timing control circuit.

[0031] In a second aspect, the present invention provides a hybrid switching device, including: a drive control circuit as described in the first aspect above or any corresponding embodiment thereof.

[0032] In a third aspect, the present utility model provides a vehicle, comprising: a hybrid switch device as described in the second aspect above or any corresponding embodiment thereof.

[0033] In this embodiment, the drive control circuit divides a path of PWM signal sent by the PWM controller into two paths through a hardware circuit, namely an IGBT drive signal and a SiC drive signal respectively. By comparing the current signal, the switch circuit can control whether to output the IGBT drive signal. Thus, when the current is less than the current limit value that the SiC MOSFET device can withstand, only the SiC MOSFET device is enabled. When the current is greater than the current limit value that the SiC MOSFET device can withstand, both the Si IGBT device and the SiC MOSFET device are turned on, and the two jointly bear the large current. While realizing the control of the hybrid switch device, the control logic can be simplified, and damage to the SiC MOSFET device caused by excessive current can be avoided. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to more clearly illustrate the specific embodiments of the present utility model or the technical solutions in the related art, the following will briefly introduce the drawings required for use in the description of the specific embodiments or the related art. Obviously, the drawings in the following description are some embodiments of the present utility model. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0035] Figure 1 is a schematic structural diagram of a hybrid switch device according to an embodiment of the present utility model;

[0036] Figure 2 is a schematic structural diagram of a drive control circuit according to an embodiment of the present utility model;

[0037] Figure 3 is another schematic structural diagram of a drive control circuit according to an embodiment of the present utility model;

[0038] Figure 4 is still another schematic structural diagram of a drive control circuit according to an embodiment of the present utility model;

[0039] Figure 5 is a schematic structural diagram of a current comparison module according to an embodiment of the present utility model;

[0040] Figure 6 is a schematic structural diagram of a timing control circuit according to an embodiment of the present utility model;

[0041] Figure 7 is a schematic waveform diagram of a drive signal according to an embodiment of the present utility model.

[0042] Description of reference numerals:

[0043] 10. First timing control circuit; 20. Second timing control circuit; 30. Current comparison circuit; 40. Switching circuit; 50. Current detection circuit; 60. IGBT driver chip; 70. SiC driver chip; 100. PWM controller; 301. Current comparison module; 302. Logic circuit; A1. First comparator; A2. Second comparator; R1. First resistor; C1. First capacitor; D1. First diode; R2. Second resistor; C2. Second capacitor; D2. Second diode; 101. First drive circuit; 201. Second drive circuit. DETAILED DESCRIPTION

[0044] In order to make the purpose, technical solution and advantages of the embodiment of the utility model clearer, the technical solution in the embodiment of the utility model will be clearly and completely described below in conjunction with the drawings in the embodiment of the utility model. Obviously, the described embodiment is a part of the embodiment of the utility model, not all the embodiments. Based on the embodiment of the utility model, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the utility model.

[0045] In the description of the present invention, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0046] In the present invention, unless otherwise clearly specified and limited, the terms "install", "connect", "connect", "fix" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be an indirect connection through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0047] In addition, in order to better illustrate the utility model, numerous specific details are given in the specific embodiments below. It should be understood by those skilled in the art that the utility model can also be implemented without certain specific details. In some examples, methods, means, and elements well known to those skilled in the art are not described in detail in order to highlight the main purpose of the utility model.

[0048] In addition, the technical features involved in different embodiments of the present utility model described below can be combined with each other as long as they do not conflict with each other.

[0049] Under appropriate application strategies, the Si IGBT / SiC MOSFET hybrid switch device can effectively combine the advantages of low loss of SiC MOSFET and large current-carrying capacity of Si IGBT. At the same time, compared with pure SiC MOSFET devices, its cost can also be greatly reduced. Therefore, in application fields such as motor controllers and wireless charging, hybrid switch devices have become a hot research direction and will also lead the development for a long time in the future.

[0050] The Si IGBT / SiC MOSFET hybrid switch device is a device that satisfies high-current applications by paralleling and packaging multiple SiC MOSFET and Si IGBT chips into a module, and its structure is as Figure 1 shown. In order to prevent damage to the SiC MOSFET device caused by the SiC MOSFET turning on faster than the Si IGBT under high-current conditions, it is generally necessary to use a chip to achieve delay control, that is, after the Si IGBT turns on, the SiC MOSFET turns on, and before the Si IGBT turns off, the SiC MOSFET needs to be turned off first.

[0051] In this embodiment, a drive control circuit is provided. When the current in the circuit is large, the Si IGBT and SiC MOSFET in the hybrid switch device are simultaneously driven to work, and when the current in the circuit is small, only the SiC MOSFET is driven, thereby simplifying the drive control of the hybrid switch device.

[0052] Figure 2 is a schematic structural diagram of a drive control circuit according to an embodiment of the present utility model, as Figure 2 shown. The drive control circuit includes: a first timing control circuit 10, a second timing control circuit 20, a current comparison circuit 30, and a switch circuit 40.

[0053] Among them, the first timing control circuit 10 is configured to convert the input PWM signal into an IGBT drive signal; the second timing control circuit 20 is configured to convert the input PWM signal into a SiC drive signal.

[0054] The current comparison circuit 30 is configured to compare the current current signal with the current signal range, and output a first signal when the current current signal does not exceed the current signal range, and output a second signal when the current current signal exceeds the current signal range.

[0055] The switching circuit 40 is connected to the first timing control circuit 10 and the current comparison circuit 30; the switching circuit 40 is configured to cut off the IGBT driving signal when the current comparison circuit 30 outputs a first signal, and output the IGBT driving signal when the current comparison circuit 30 outputs a second signal.

[0056] In this embodiment, the first timing control circuit 10 and the second timing control circuit 20 input the same PWM (Pulse-width modulation) signal, and the PWM signal can be specifically provided by the PWM controller 100. Among them, the first timing control circuit 10 converts the input PWM signal into an IGBT driving signal, and the IGBT driving signal is used to drive the Si IGBT device in the hybrid switching device. The second timing control circuit 20 converts the input PWM signal into a SiC driving signal, and the SiC driving signal is used to drive the SiC MOSFET device in the hybrid switching device.

[0057] Moreover, the duty cycle of the IGBT driving signal is greater than that of the SiC driving signal, and when the SiC driving signal is at a high level, the IGBT driving signal is also at a high level, so as to ensure that when the SiC MOSFET device is turned on, the Si IGBT device should be in the on state.

[0058] The current in the circuit can be collected to obtain the current signal. Among them, the current signal is the current in the circuit structure applying the hybrid switching device, such as the current in an inverter, etc. Optionally, referring to Figure 3 As shown, the drive control circuit further includes: a current detection circuit 50; the current detection circuit 50 is connected to the current comparison circuit 30 and is configured to collect the current signal and send the current signal to the current comparison circuit 30. By using the current detection circuit 50, the collection of the current can be simply and conveniently realized.

[0059] Among them, for the convenience of comparison, the current signal is a signal in the form of voltage, that is, the current value is represented by voltage; for example, the current detection circuit 50 includes a Hall sensor, and based on the Hall sensor, a voltage signal representing the current value can be collected, and this voltage signal can be used as the current signal.

[0060] Moreover, a current signal range is preset, and comparison and judgment are made based on this current signal range. Specifically, the current signal range can be set based on the current limit value that the SiC MOSFET device in the hybrid switching device can withstand, and this current signal range cannot exceed the current limit value that the SiC MOSFET device can withstand.

[0061] The current comparison circuit 30 can compare the currently acquired current signal with the current signal range to determine whether the current signal exceeds the current signal range. If the current signal exceeds the current signal range, a first signal is output; if not, a second signal is output. For example, the current comparison circuit 30 can be implemented based on a comparator, and in different cases, signals with different levels are output to represent different situations. For example, the first signal is a high level and the second signal is a low level, or the first signal is a low level and the second signal is a high level, which can be specifically determined based on the structure of the current comparison circuit 30.

[0062] The switch circuit 40 can control whether to output the IGBT drive signal based on the signal output by the current comparison circuit 30. Specifically, if the current comparison circuit 30 outputs a first signal, that is, the current signal is small, at this time, only the SiC MOSFET device can be driven, that is, the Si IGBT device does not need to be driven at this time, so the switch circuit 40 can cut off the IGBT drive signal, that is, does not output the IGBT drive signal. On the contrary, if the current comparison circuit 30 outputs a second signal, that is, the current signal is large, at this time, in addition to driving the SiC MOSFET device, the Si IGBT device also needs to be driven, so the switch circuit 40 can be turned on to output the IGBT drive signal generated by the first timing control circuit 10.

[0063] Optionally, as Figure 3 shown, the drive control circuit further includes: an IGBT drive chip 60 and a SiC drive chip 70. The input end of the IGBT drive chip 60 is connected to the output end of the switch circuit 40; the input end of the SiC drive chip 70 is connected to the output end of the second timing control circuit 20.

[0064] Among them, the IGBT drive chip 60 is used to drive the Si IGBT device in the hybrid switch device, and the SiC drive chip 70 is used to drive the SiC MOSFET device in the hybrid switch device. When the switch circuit 40 outputs the IGBT drive signal, the IGBT drive chip 60 can drive the Si IGBT device to work based on the IGBT drive signal; similarly, the SiC drive chip 70 can drive the SiC MOSFET device to work based on the SiC drive signal output by the second timing control circuit 20. In this embodiment, by using the IGBT drive chip 60 and the SiC drive chip 70, the driving ability of the Si IGBT device and the SiC MOSFET device can be improved, ensuring that the hybrid switch device can work normally.

[0065] It can be understood that when the current signal does not exceed the current signal range, since the switch circuit 40 does not output a signal, the IGBT drive chip 60 does not work at this time.

[0066] The drive control circuit of the hybrid switch device provided in this embodiment divides a path of PWM signal sent by a PWM controller into two paths through a hardware circuit, namely an IGBT drive signal and a SiC drive signal. By comparing the current current signal, the switching circuit can control whether to output the IGBT drive signal, so that when the current is less than the current limit that the SiC MOSFET device can withstand, only the SiC MOSFET device is enabled, and when the current is greater than the current limit that the SiC MOSFET device can withstand, both the Si IGBT device and the SiC MOSFET device are turned on, and the two share the large current together. While realizing the control of the hybrid switch device, the control logic can be simplified, and the damage of the SiC MOSFET device caused by excessive current can be avoided.

[0067] In some alternative embodiments, as Figure 4 shown, the current comparison circuit 30 includes a logic circuit 302 and a plurality of current comparison modules 301. Among them, the current comparison module 301 is configured to compare the current current signal with the current signal range and output different signals according to the magnitude relationship between the current current signal and the current signal range. The input end of the logic circuit 302 is connected to the output ends of the plurality of current comparison modules 301; the logic circuit 302 is configured to output a second signal when the signals output by at least one current comparison module 301 indicate that the current current signal exceeds the current signal range.

[0068] In this embodiment, to improve the reliability of the current comparison circuit 30, a plurality of current comparison modules 301 are provided for the current comparison circuit 30, so that when some of the current comparison modules 301 fail, the current comparison circuit 30 can still normally output the corresponding first signal or second signal, ensuring that the switching circuit 40 can respond normally and avoiding the inability to drive the Si IGBT device to conduct when the current is large.

[0069] Among them, each current comparison module 301 is used to separately compare the current current signal with the current signal range. Specifically, when the current current signal does not exceed the current signal range, the current comparison module 301 outputs a first sub-signal indicating that the current is small; when the current current signal exceeds the current signal range, the current comparison module 301 outputs a second sub-signal indicating that the current is large.

[0070] Moreover, the current comparison circuit 30 is further provided with a logic circuit 302. Based on the signals output by each current comparison module 301, the logic circuit 302 can determine whether to output the first signal or the second signal. Specifically, if the signals output by at least one current comparison module 301 indicate that the current signal exceeds the current signal range, that is, if at least one current comparison module 301 outputs a second sub-signal indicating that the current is too large, the logic circuit 302 outputs the second signal, so that the switching circuit can control the output of the IGBT drive signal. Conversely, if all current comparison modules 301 output first sub-signals indicating that the current is too small, the logic circuit 302 outputs the first signal.

[0071] Optionally, when the current signal does not exceed the current signal range, the current comparison module 301 outputs a high level, and when the current signal exceeds the current signal range, the current comparison module 301 outputs a low level. And, as Figure 4 shown, the logic circuit 302 can be a NAND gate circuit, and the switching circuit 40 is an AND gate circuit.

[0072] Specifically, when any current comparison module 301 determines that the current is large, it outputs a low level, and the NAND gate circuit outputs a high level, so that the output of the NAND gate circuit does not affect the output of the subsequent AND gate circuit (i.e., the switching circuit 40), that is, the output signal of the switching circuit 40 is consistent with the IGBT drive signal input to its input terminal. When all current comparison modules 301 determine that the current is small, that is, they all output high levels, at this time the NAND gate circuit outputs a low level signal. Therefore, no matter what signal is input to the other input terminal of the subsequent AND gate circuit (i.e., the switching circuit 40), the switching circuit 40 outputs a low level, thereby realizing the shielding of the IGBT drive signal. The logic circuit 302 uses a NAND gate circuit, and the switching circuit 40 uses an AND gate circuit, with simple logic, easy to implement, and low cost.

[0073] In this embodiment, the output signal of the current comparison module 301 can be defaulted to a low level, and when the current signal exceeds the current signal range, the current comparison module 301 outputs a low level. Combining with the subsequent NAND gate circuit and AND gate circuit, the on-off control of the IGBT drive signal is realized. Moreover, when the current comparison module 301 fails, it generally outputs a low level, causing the NAND gate circuit to input a low level and the switching circuit 40 to output a high-level second signal. At this time, the IGBT drive signal can be output, thus avoiding the problem that the SiC MOSFET device is damaged because the Si IGBT device is not driven when the current comparison module 301 fails.

[0074] Optionally, different current comparison modules 301 may adopt different structures. For example, some current comparison modules 301 may implement current signal comparison based on a control chip or the like, or some current comparison modules 301 may perform current signal comparison based on a comparator or the like. In this embodiment, at least some current comparison modules 301 may be implemented based on a comparator. Figure 5 shows a schematic structural diagram of the current comparison module 301. As Figure 5 shown, the current comparison module 301 includes: a first comparator A1 and a second comparator A2.

[0075] Among them, the non-inverting input terminal of the first comparator A1 is used to access the maximum current signal Max in the current signal range, and the inverting input terminal of the first comparator A1 is used to access the current current signal; the non-inverting input terminal of the second comparator A2 is used to access the current current signal, and the inverting input terminal of the second comparator A2 is used to access the minimum current signal Min in the current signal range; the output terminals of the first comparator A1 and the second comparator A2 are connected and used as the output terminal of the current comparison module 301.

[0076] In this embodiment, the upper and lower limit values of the current signal range are used as the maximum current signal Max and the minimum current signal Min respectively. In the inverter scenario, the maximum current signal Max is the positive current limit that the SiC MOSFET device can withstand, and the minimum current signal Min is the negative current limit that the SiC MOSFET device can withstand.

[0077] The non-inverting input terminal and the inverting input terminal of the first comparator A1 are respectively connected to the maximum current signal Max and the current current signal (the inverting input terminal can be connected to the output terminal of the current detection circuit 50), so that when the current current signal is less than the maximum current signal Max, the first comparator A1 outputs a high level.

[0078] Similarly, the non-inverting input terminal and the inverting input terminal of the second comparator A2 are respectively connected to the current current signal (the non-inverting input terminal can be connected to the output terminal of the current detection circuit 50) and the minimum current signal Min, so that when the current current signal is greater than the minimum current signal Min, the first comparator A1 also outputs a high level.

[0079] Since the output terminals of the first comparator A1 and the second comparator A2 are connected, when the currently detected current current signal is between the minimum current signal Min and the maximum current signal Max, that is, within the current signal range, the output terminal of the current comparison module 301 outputs a high-level signal. On the contrary, if the current current signal exceeds this current signal range, it will cause one of the first comparator A1 and the second comparator A2 to output a low level, and further cause the output terminal of the current comparison module 301 to output a low-level signal.

[0080] In this embodiment, a redundant design of the current comparison circuit 30 is implemented based on multiple current comparison modules 301, so as to improve the reliability of the current comparison circuit 30 and ensure that the IGBT drive signal can be normally output when the current is large. Using the first comparator A1 and the second comparator A2 can simply determine whether the current signal exceeds the current signal range, and the structure is simple.

[0081] In some alternative embodiments, refer to Figure 6 As shown, the first timing control circuit 10 includes: a first resistor R1, a first capacitor C1, and a first diode D1; the second timing control circuit 20 includes: a second resistor R2, a second capacitor C2, and a second diode D2.

[0082] As Figure 6 shown, the first end of the first resistor R1 is used to access the PWM signal, and the second end of the first resistor R1 is grounded through the first capacitor C1; the positive electrode of the first diode D1 is connected to the first end of the first resistor R1, and the negative electrode of the first diode D1 is connected to the second end of the first resistor R1; the second end of the first resistor R1 is used to output the IGBT drive signal.

[0083] The second end of the second resistor R2 is used to access the PWM signal, and the second end of the second resistor R2 is grounded through the second capacitor C2; the negative electrode of the second diode D2 is connected to the second end of the second resistor R2, and the positive electrode of the second diode D2 is connected to the second end of the second resistor R2; the second end of the second resistor R2 is used to output the SiC drive signal.

[0084] In this embodiment, both the first timing control circuit 10 and the second timing control circuit 20 are connected to the PWM signal issued by the PWM controller 100. At the rising edge and falling edge of the PWM signal, the first timing control circuit 10 and the second timing control circuit 20 can implement different charge and discharge circuits to achieve the required delay control.

[0085] Specifically, at the rising edge of the PWM signal, the PWM signal changes from low to high. At this time, the first diode D1 conducts, directly charging the first capacitor C1. The RC circuit composed of the first resistor R1 and the first capacitor C1 does not play a delaying role. Therefore, the first timing control circuit 10 directly outputs a high level, that is, the IGBT drive signal output by the first timing control circuit 10 has no delay relative to the original PWM signal.

[0086] Moreover, at the rising edge of the PWM signal, the second diode D2 is turned off. Therefore, the PWM signal needs to be delayed by the RC circuit composed of the second resistor R2 and the second capacitor C2 and charge the second capacitor C2. Thus, the voltage at the second terminal of the second resistor R2 gradually increases, causing a delay of the RC circuit in the SiC driving signal output by the second timing control circuit 20 relative to the original PWM signal. The specific delay time can be changed by adjusting the values of the second resistor R2 and the second capacitor C2. Among them, since the addition of RC will make the rising edge flatter, which is not conducive to driving. Therefore, in this embodiment, the second timing control circuit 20 further includes: a second driving circuit 201. The second terminal of the second resistor R2 outputs the SiC driving signal through the second driving circuit 201, so that the rising speed of the signal output by the second timing control circuit 20 becomes faster and a driving signal in the form of a square wave can be output.

[0087] Conversely, at the falling edge of the PWM signal, the PWM signal changes from high to low. At this time, the second diode D2 is turned on, and the second capacitor C2 can directly discharge through the turned-on second diode D2 without delay. Therefore, the second timing control circuit 20 directly outputs a high level, that is, the SiC driving signal output by the second timing control circuit 20 has no delay relative to the original PWM signal.

[0088] Moreover, at the rising edge of the PWM signal, the first diode D1 is turned off. Therefore, the first capacitor C1 needs to be discharged through the RC circuit composed of the first resistor R1 and the first capacitor C1 (specifically, it can be discharged through the PWM controller 100, and the structure of the PWM controller 100 is not described in detail here). Thus, the voltage at the second terminal of the first resistor R1 gradually decreases, causing a delay of the RC circuit in the IGBT driving signal output by the first timing control circuit 10 relative to the original PWM signal. The specific delay time can be changed by adjusting the values of the first resistor R1 and the first capacitor C1. In addition, since the addition of RC will make the falling edge of the output signal flatter, which is not conducive to driving. Therefore, in this embodiment, the first timing control circuit 10 further includes: a first driving circuit 101. The second terminal of the first resistor R1 outputs the IGBT driving signal through the first driving circuit 101, so that the falling speed of the signal output by the first timing control circuit 10 becomes faster and a driving signal in the form of a square wave can be output.

[0089] Among them, a schematic diagram of the IGBT driving signal output by the first timing control circuit 10 and the SiC driving signal output by the second timing control circuit 20 can be seen Figure 7 as shown. As Figure 7 shown, the duty cycle of the IGBT driving signal is greater than that of the SiC driving signal, and when the SiC driving signal is at a high level, the IGBT driving signal is also at a high level.

[0090] In this embodiment, the delayed turn-on of the SiC MOSFET device and the delayed turn-off of the Si IGBT device can be achieved through a simple hardware circuit, ensuring that the conduction waveform of the SiC MOSFET device is completely enclosed in the conduction waveform of the Si IGBT device.

[0091] Optionally, as Figure 6 shown, the first drive circuit 101 includes a first AND gate circuit, and the second drive circuit 201 includes a second AND gate circuit.

[0092] The first input terminal of the first AND gate circuit is connected to the second terminal of the first resistor R1, and the first input terminal of the second AND gate circuit is connected to the second terminal of the second resistor R2; the second input terminals of both the first AND gate circuit and the second AND gate circuit are used to receive a high level; the output terminal of the first AND gate circuit is used to output an IGBT drive signal, and the output terminal of the second AND gate circuit is used to output a SiC drive signal.

[0093] In this embodiment, AND gate circuits are used to implement each drive circuit. Specifically, at the falling edge of the PWM signal, the voltage at the second terminal of the first resistor R1 gradually decreases. When it is lower than the low-level threshold corresponding to the first AND gate circuit, the output terminal of the first AND gate circuit changes from high level to low level, enabling the falling edge of the output IGBT drive signal to drop rapidly.

[0094] Similarly, at the rising edge of the PWM signal, the voltage at the second terminal of the second resistor R2 gradually increases. When it is higher than the high-level threshold corresponding to the second AND gate circuit, the output terminal of the second AND gate circuit changes from low level to high level, enabling the rising edge of the output SiC drive signal to rise rapidly.

[0095] The drive control circuit provided in this embodiment can output only the SiC drive signal when the current is small, thus eliminating the need to pay attention to timing control; when the current is large, it outputs the IGBT drive signal and the SiC drive signal to ensure that the current-carrying capacity of the hybrid switch device meets the requirements. Moreover, the drive signals output by the first timing control circuit 10 and the second timing control circuit 20 can make the Si IGBT device turn on first and the SiC MOSFET device turn on later, and the SiC MOSFET device turn off first and the Si IGBT device turn off later, which can effectively protect the SiC MOSFET device and avoid overcurrent. The first timing control circuit 10 and the second timing control circuit 20 can be implemented based on resistors, capacitors, diodes, etc. The circuit structure is simple and the cost is low; the use of the first drive circuit 101 and the second drive circuit 201 can increase the rising rate or falling rate of the drive signal, enabling the output drive signal to meet the input requirements of the backend drive chip. The AND gate circuit can easily increase the change rate of the drive signal and can output a drive signal in the form of a square wave.

[0096] This embodiment also provides a hybrid switch device, which includes the drive control circuit provided in any of the above embodiments. Among them, the IGBT drive signal output by the drive control circuit is used to drive the Si IGBT device in the hybrid switch device, and the SiC drive signal output by it is used to drive the SiC MOSFET device in the hybrid switch device. The hybrid switch device also has the beneficial effects of the above drive control circuit, which will not be elaborated here.

[0097] This embodiment also provides a vehicle, which includes the hybrid switch device provided in the above embodiment, and realizes the drive of the Si IGBT device and the SiC MOSFET device in the vehicle based on this hybrid switch device. For example, this hybrid switch device can be applied to the inverter of the vehicle to realize the control of DC to AC conversion. Among them, the vehicle also has the beneficial effects of the above drive control circuit, which will not be elaborated here.

[0098] Although the embodiments of the present invention have been described in conjunction with the accompanying drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of the present invention, and such modifications and variations all fall within the scope defined by the appended claims.

Claims

1. A drive control circuit, characterized in that: include: A first timing control circuit (10), a second timing control circuit (20), a current comparison circuit (30) and a switch circuit (40); The first timing control circuit (10) is configured to convert an input PWM signal into an IGBT drive signal; the second timing control circuit (20) is configured to convert the input PWM signal into a SiC drive signal; The current comparison circuit (30) is configured to compare a current current signal with a current signal range, and output a first signal when the current current signal does not exceed the current signal range, and output a second signal when the current current signal exceeds the current signal range; The switch circuit (40) is connected to the first timing control circuit (10) and the current comparison circuit (30); the switch circuit (40) is configured to cut off the IGBT drive signal when the current comparison circuit (30) outputs the first signal, and to output the IGBT drive signal when the current comparison circuit (30) outputs the second signal.

2. The drive control circuit according to claim 1, characterized in that: The current comparison circuit (30) comprises a logic circuit (302) and a plurality of current comparison modules (301); The current comparison module (301) is configured to compare the current current signal and the current signal range, and output different signals according to the magnitude relationship between the current current signal and the current signal range; The input end of the logic circuit (302) is connected to the output ends of the multiple current comparison modules (301); the logic circuit (302) is configured to output a second signal when a signal output by at least one of the current comparison modules (301) indicates that the current current signal exceeds the current signal range.

3. The drive control circuit according to claim 2, characterized in that: At least part of the current comparison module (301) comprises: a first comparator (A1) and a second comparator (A2); The non-inverting input terminal of the first comparator (A1) is used to access the maximum current signal in the current signal range, and the inverting input terminal of the first comparator (A1) is used to access the current current signal; The non-inverting input terminal of the second comparator (A2) is used to access the current current signal, and the inverting input terminal of the second comparator (A2) is used to access the minimum current signal in the current signal range; The output end of the first comparator (A1) and the output end of the second comparator (A2) are connected and serve as the output end of the current comparison module (301).

4. The drive control circuit according to claim 2, characterized in that: The logic circuit (302) is a NAND gate circuit, and the switch circuit (40) is an AND gate circuit.

5. The drive control circuit according to claim 1, characterized in that: Also includes: A current detection circuit (50); The current detection circuit (50) is connected to the current comparison circuit (30), and is configured to collect the current current signal and send the current current signal to the current comparison circuit (30).

6. The drive control circuit according to claim 1, characterized in that: The first timing control circuit (10) comprises: a first resistor (R1), a first capacitor (C1) and a first diode (D1); the second timing control circuit (20) comprises: a second resistor (R2), a second capacitor (C2) and a second diode (D2); The first end of the first resistor (R1) is used to receive the PWM signal, and the second end of the first resistor (R1) is grounded through the first capacitor (C1); the anode of the first diode (D1) is connected to the first end of the first resistor (R1), and the cathode of the first diode (D1) is connected to the second end of the first resistor (R1); the second end of the first resistor (R1) is used to output the IGBT drive signal; The second end of the second resistor (R2) is used to access the PWM signal, and the second end of the second resistor (R2) is grounded through the second capacitor (C2); the cathode of the second diode (D2) is connected to the second end of the second resistor (R2), and the anode of the second diode (D2) is connected to the second end of the second resistor (R2); the second end of the second resistor (R2) is used to output the SiC drive signal.

7. The drive control circuit according to claim 6, characterized in that: The first timing control circuit (10) further comprises: a first drive circuit (101); the second timing control circuit (20) further comprises: a second drive circuit (201); The second end of the first resistor (R1) outputs the IGBT driving signal through the first driving circuit (101); The second end of the second resistor (R2) outputs the SiC driving signal through the second driving circuit (201).

8. The drive control circuit according to claim 7, characterized in that: The first driving circuit (101) includes a first AND gate circuit, and the second driving circuit (201) includes a second AND gate circuit; The first input end of the first AND gate circuit is connected to the second end of the first resistor (R1), and the first input end of the second AND gate circuit is connected to the second end of the second resistor (R2); the second input end of the first AND gate circuit and the second input end of the second AND gate circuit are both used to access a high level; The output end of the first AND gate circuit is used to output the IGBT driving signal, and the output end of the second AND gate circuit is used to output the SiC driving signal.

9. The drive control circuit according to claim 1, characterized in that: Also includes: IGBT driver chip (60) and SiC driver chip (70); The input end of the IGBT driving chip (60) is connected to the output end of the switch circuit (40); The input end of the SiC driving chip (70) is connected to the output end of the second timing control circuit (20).

10. A hybrid switch device, characterized in that: include: A drive control circuit as claimed in any one of claims 1 to 9.

11. A vehicle, characterized in that: include: The hybrid switching device as claimed in claim 10.

Images