Chip testing device

Abstract

The utility model discloses a chip testing device. The chip testing device comprises a base, a turntable, a first heating piece and a plurality of testing mechanisms, the rotating disc and the testing mechanism are both installed on the base. The rotating disc is provided with a conveying surface used for conveying chips, the first heating piece is arranged on the rotating disc, and the first heating piece is used for heating the chips on the conveying surface. The testing ends of the testing mechanisms are located above the conveying surface in the height direction of the rotating disc, the testing mechanisms are arranged at intervals in the rotating direction of the rotating disc, and the testing mechanisms are used for conducting electrical testing on the chips. According to the chip testing device disclosed by the invention, the chip on the transportation surface is heated through the first heating piece, so that the chip is in a stable high-temperature environment, the heat preservation effect is good, and the relatively accurate electrical performance of the chip in the high-temperature environment can be conveniently tested by the testing mechanism.

Description

Technical Field

[0001] The present application relates to the field of semiconductor manufacturing, and particularly to a chip testing device. Background Art

[0002] In the related art, electrical tests need to be performed on chips during the production process. When performing electrical tests on chips, the tests need to be carried out in a high-temperature environment. However, the existing chip testing devices have poor heating and heat preservation effects on chips during the testing process, which affects the electrical test effects of chips in a high-temperature environment. Summary of the Utility Model

[0003] An embodiment of the present application discloses a chip testing device for performing electrical tests on chips in a high-temperature environment.

[0004] To achieve the above object, the present application discloses a chip testing device, including:

[0005] A base;

[0006] A turntable, which is rotatably installed on the base. The turntable has a transport surface for transporting the chips;

[0007] A first heating element, which is provided on the turntable and is configured to heat the chips on the transport surface; and

[0008] A plurality of testing mechanisms, which are arranged on the base, and the testing ends of each testing mechanism are located above the transport surface along the height direction of the turntable. The plurality of testing mechanisms are arranged at intervals along the rotation direction of the turntable, and each testing mechanism is used to perform electrical tests on the chips.

[0009] As an optional implementation manner, there are a plurality of the first heating elements, which are arranged at intervals along the rotation direction of the turntable, and along the rotation direction of the turntable, each first heating element is respectively located upstream of each testing mechanism.

[0010] As an optional implementation manner, the first heating element is arranged above the transport surface along the height direction of the turntable, and the first heating element is spaced apart from the transport surface.

[0011] As an optional implementation manner, the turntable includes a turntable main body and a housing. The turntable main body is arranged inside the housing, and the first heating element is installed on the housing so that the first heating element is arranged above the turntable main body along the height direction of the turntable; and

[0012] The turntable further comprises a heat preservation cover, which is mounted on the housing and arranged above the first heating element along the height direction of the turntable so that the heat preservation cover covers the first heating element and the turntable body.

[0013] As an optional embodiment, the chip testing device further includes a second heating element, which is disposed on the turntable and located on a side of the turntable away from the transport surface, and the second heating element is configured to heat the chip located on the transport surface.

[0014] As an optional implementation, there are multiple second heating elements, and the second heating elements are arranged at intervals along the rotation direction of the turntable.

[0015] As an optional embodiment, a baffle and a sensor are provided on the transport surface, a feed port is opened on the baffle, the feed port is used to feed the chip, the sensor is set corresponding to the feed port, and the sensor is used to sense the posture of the chip placed in the feed port.

[0016] As an optional implementation, the baffle is provided with an avoidance portion on a side close to the feed port, and the avoidance portion is used to avoid a clamping device for transporting the chip.

[0017] As an optional embodiment, a plurality of grooves are provided on the transport surface, each of the grooves is used to place the chip, adsorption holes are provided in the grooves, and the adsorption holes are configured to be connected to an air supply device to adsorb the chip placed in the grooves.

[0018] As an optional implementation, the transport surface is further provided with a plurality of positioning holes, each of which is located at the outer periphery of the corresponding groove;

[0019] The testing mechanism includes a bracket and a testing end, wherein the bracket is mounted on the base and is located at the periphery of the turntable, and the testing end is mounted on the bracket in a liftable manner and is located above the transport surface, and the testing end includes a testing portion and a positioning portion, wherein the testing portion is used for electrical testing of the chip, and the positioning portion is disposed at the periphery of the testing portion, and the positioning portion is configured to cooperate and connect with the positioning hole when the testing portion abuts against the chip to perform an electrical test on the chip.

[0020] Compared with the prior art, the beneficial effects of this application are:

[0021] The present application discloses a chip testing device, which includes a base, a turntable, a first heating element, and a plurality of testing mechanisms. The turntable and the testing mechanisms are both installed on the base. The turntable has a transportation surface for transporting chips, and the first heating element is disposed on the turntable. The first heating element is used to heat the chips on the transportation surface. By heating the chips on the transportation surface through the first heating element in the present application, the chips can be in a relatively stable high-temperature environment with good heat preservation effect, which is beneficial for the testing mechanism to measure the more accurate electrical properties of the chips in the high-temperature environment. Moreover, the chip testing device provided by the present application has a plurality of testing mechanisms, which can simultaneously perform electrical tests on multiple chips, facilitating the improvement of testing efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings required for use in the embodiments. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0023] Figure 1 The first structural schematic diagram of the chip testing device disclosed in the embodiment of the present application;

[0024] Figure 2 The second structural schematic diagram of the chip testing device disclosed in the embodiment of the present application;

[0025] Figure 3 is Figure 2 The sectional view taken along line B-B in;

[0026] Figure 4 is Figure 1 The enlarged view at position A in;

[0027] Figure 5 The structural schematic diagram of the testing mechanism disclosed in the embodiment of the present application;

[0028] Figure 6 is Figure 2 The enlarged view at position C in;

[0029] Figure 7 The structural schematic diagram of the turntable disclosed in the embodiment of the present application.

[0030] Description of the reference numerals:

[0031] 100. Chip testing device; 1. Base; 2. Turntable; 2a. Transport surface; 21a. Groove; 21b. Suction hole; 21c. Positioning hole; 21. Turntable body; 22. Outer shell; 23. Heat preservation cover; 3. First heating element; 4. Testing mechanism; 41. Testing end; 42. Bracket; 41a. Testing part; 41b. Positioning part; 5. Baffle; 51. Feeding port; 5a. Avoidance part; 6. Sensor; 7. Second heating element. Detailed implementation manners

[0032] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present application.

[0033] In the present application, the orientation or positional relationship indicated by terms such as "upper", "lower", "inner", "outer", etc. is based on the orientation or positional relationship shown in the accompanying drawings. These terms are mainly used to better describe the present application and its embodiments, and are not used to limit that the indicated device, element or component must have a specific orientation, or be constructed and operated in a specific orientation.

[0034] Moreover, in addition to being able to represent the orientation or positional relationship, some of the above terms may also be used to represent other meanings. For example, the term "upper" may also be used to represent a certain attachment relationship or connection relationship in some cases. For those of ordinary skill in the art, the specific meanings of these terms in the present application can be understood according to the specific situation.

[0035] In addition, the terms "installation", "setting", "provided with", "connection" should be understood in a broad sense. For example, it may be a fixed connection, a detachable connection, or an integral structure; it may be a mechanical connection or an electrical connection; it may be directly connected, or indirectly connected through an intermediate medium, or there may be internal communication between two devices, elements or components. For those of ordinary skill in the art, the specific meanings of the above terms in the present application can be understood according to the specific situation.

[0036] In addition, the terms "first", "second", etc. are mainly used to distinguish different devices, elements or components (the specific types and structures may be the same or different), and are not used to indicate or imply the relative importance and quantity of the indicated devices, elements or components. Unless otherwise specified, the meaning of "a plurality" is two or more.

[0037] Next, the technical solutions of the present application will be further described in conjunction with the embodiments and the accompanying drawings.

[0038] Please refer toFigure 1 , this application discloses a chip testing device 100, which includes a base 1, a turntable 2, a first heating element 3, and multiple testing mechanisms 4. The turntable 2 and each testing mechanism 4 are both installed on the base 1, and the first heating element 3 is arranged in the turntable 2. The turntable 2 has a transport surface 2a, on which chips can be placed and transported, and the first heating element 3 can heat the chips placed on the transport surface 2a, so that the chips are in a high-temperature environment (for example, the chips can be heated to 100°C - 150°C). Each testing mechanism 4 has a testing end 41, and the testing end 41 is located above the transport surface 2a along the height direction of the turntable 2, and each testing mechanism 4 is arranged at intervals along the rotation direction of the turntable 2. Each testing mechanism 4 is used to perform electrical tests on the chips.

[0039] In this application, the turntable 2 transports the chips to the lower part of each testing mechanism 4 during rotation, so that electrical tests can be performed on multiple chips simultaneously. During transportation, the first heating element 3 can heat the chips transported on the transport surface 2a and keep the chips in a relatively high-temperature environment. When the chips are transported by the turntable 2 to the lower part of the testing end 41 of the testing mechanism 4, the chips can be kept in a relatively high-temperature environment, so that the chips can perform electrical tests in a stable high-temperature environment. In this way, the heat preservation effect of the chips in a stable high-temperature environment is better, the electrical properties of the chips tested in a stable high-temperature environment are more stable, the data obtained from the tests are more accurate, which is beneficial to controlling the product yield during production. Moreover, setting multiple testing mechanisms 4 can perform electrical tests on multiple chips in a high-temperature environment simultaneously, which is beneficial to improving production efficiency.

[0040] It can be understood that the above-mentioned electrical tests include but are not limited to current tests, voltage tests, and resistance tests, etc. Therefore, each of the testing mechanisms 4 can test various electrical properties of the chips respectively. Of course, a single testing mechanism 4 can also be used to test various electrical properties of the chips. This application does not make specific limitations here.

[0041] Optionally, the first heating element 3 can be a heating plate, a heating wire or other heating elements.

[0042] For the convenience of description and understanding, the following takes the first heating element 3 as a heating plate as an example for illustration. For example, in the above embodiment, when the heating plate is installed on the turntable 2, the heating plate can be arranged on the transport surface 2a of the turntable 2 to heat the chips on the transport surface 2a.

[0043] In some embodiments, there are multiple first heating elements 3, and the multiple first heating elements 3 are arranged at intervals along the rotation direction of the turntable 2. And along the rotation direction of the turntable 2, each first heating element 3 corresponds to the upstream of each test mechanism 4 respectively. Specifically, during the transportation of the chip, before the chip is transported to the first test mechanism 4, a first heating element 3 first heats the chip, and then the chip is subjected to electrical testing at the first test mechanism 4. Then, when it is transported to before the second test mechanism 4, the first heating element 3 before the second test mechanism 4 reheats the chip. After the reheating is completed, the electrical testing of the chip continues, and so on, thereby completing the electrical testing of the chip.

[0044] It can be understood that, as can be seen from the foregoing, the multiple test mechanisms 4 can be arranged at intervals in sequence along the rotation direction of the turntable 2. For example, as Figure 1 shown, Figure 1 in the direction indicated by X is the rotation direction of the turntable 2, and the direction indicated by Y is the thickness direction of the turntable 2. Then it can be known that along the X direction, the chip will be transported to before each corresponding test mechanism 4 in sequence. And since there are also multiple first heating elements 3, each heating element is arranged upstream of each corresponding test mechanism 4 along the X direction. In this way, before the chip is transported to each corresponding test mechanism 4, it will first be heated by the first heating element 3, so that the temperature of the chip can rise, which is convenient for performing electrical performance testing on the chip in a thermal environment. At the same time, due to this corresponding heating of the chip by the first heating element 3, the temperature of the chip can be maintained before electrical testing, which is further conducive to improving the accuracy of the electrical performance testing of the chip in a thermal environment.

[0045] Please refer to again Figure 1 , exemplarily, each heating plate is correspondingly arranged before each test mechanism 4, and the heating plate heats the chip about to be transported to the test mechanism 4. And the heating plate has a certain extension length along the rotation direction of the turntable 2, and can fully heat the chip before it is transported to the test mechanism 4, so that the chip can reach the high-temperature environment required for electrical testing.

[0046] In this application, each first heating element 3 heats and reheats the chip before it is transported to the test mechanism 4, improving the heat preservation effect of the chip in a thermal environment, so that the chip can be effectively maintained in a relatively stable high-temperature environment when it is transported to the test mechanism 4, which is conducive to improving the accuracy of the electrical testing of the chip in a high-temperature environment.

[0047] In an optional implementation manner, as Figure 1 shown, the first heating element 3 can be directly arranged on the transportation surface 2a of the turntable 2. In this way, when the chip is transported, the first heating element 3 can be in direct contact with the chip, thereby directly heating the chip.

[0048] In another alternative implementation, as Figure 2 , Figure 3 shown, considering the protection of the chip during heating and the uniformity of heating, the first heating element 3 may not be directly disposed on the transport surface of the turntable. That is, the first heating element 3 is disposed above the transport surface 2a in the height direction of the turntable 2, and the first heating element 3 is spaced apart from the transport surface 2a. In other words, the first heating element 3 is not actually directly disposed on the transport surface 2a, so that direct contact between the first heating element and the chip can be avoided. Specifically, the first heating element 3 is disposed above the transport surface 2a, so that the first heating element 3 uses the thermal radiation generated during its own heating to heat the chip at intervals. In this way, on the one hand, the first heating element 3 can heat the chip without directly contacting the chip, avoiding direct damage to the chip caused by the excessive temperature when the first heating element 3 directly contacts the chip. On the other hand, this interval type of non-contact heating method has a more uniform heating effect on the chip, which is beneficial to maintaining the turntable 2 in a relatively stable high-temperature environment.

[0049] In some embodiments, the turntable 2 includes a turntable main body 21 and a housing 22. The housing 22 is disposed on the outer periphery of the turntable main body 21, and the first heating element 3 is disposed above the turntable main body 21 in the height direction of the turntable 2. That is to say, when the housing 22 and the turntable main body 21 are connected, the first heating element 3 and the housing 22 can generally cover the turntable main body 21. In this way, a relatively closed space can be formed between the housing 22 and the turntable main body 21, so as to prevent a large amount of heat of the first heating element 3 from being dissipated to the outside of the turntable main body 21. That is, the turntable 2 is always in a relatively closed environment when transporting the chip, so that it can have a good heat preservation effect.

[0050] Furthermore, the turntable 2 further includes a heat preservation cover 23. The heat preservation cover 23 can be connected to the housing 22, and the heat preservation cover 23 is disposed above the first heating element 3 in the height direction of the turntable 2, so that the heat preservation cover 23 covers the first heating element 3 and the turntable main body 21. It can be understood that along the height direction of the turntable 2, from top to bottom are the turntable main body 21, the first heating element 3, and the heat preservation cover 23.

[0051] By connecting the heat preservation cover 23 to the housing 22, the first heating element 3 and the turntable main body 21 can be covered inside the housing 22. When the first heating element 3 is heating, the heat preservation cover 23 can retain the thermal radiation emitted by the first heating element 3 on the transport surface 2a of the turntable main body 21 as much as possible, so that the chip can be heated well, thereby reducing heat energy loss, and achieving energy saving during production while achieving a good heat preservation effect.

[0052] In addition, considering that the test environment of the chip needs to be maintained in a relatively clean environment, the connection between the heat preservation cover 23 and the outer shell 22 can be relatively tight, leaving only the area for placing or taking out the chip and the area where the test end 41 of the test mechanism 4 can extend. Thus, the heat preservation cover 23 also plays a role in sealing and dust-proofing the turntable main body 21 and the chip located on the transportation surface 2a of the turntable main body 21, avoiding contaminating the chip during the test process, preventing the influence on the test result, and being beneficial to improving the accuracy during chip testing.

[0053] Please refer to Figure 4 and Figure 5 As can be seen from the foregoing, the chip is placed on the transportation surface of the turntable. In order to achieve the positioning of the chip on the transportation surface, a plurality of grooves 21a are provided on the transportation surface 2a, and each groove 21a is used for placing the chip. An adsorption hole 21b is provided in the groove 21a, and the adsorption hole 21b is configured to be connected to a gas supply device (not shown) to adsorb the chip placed in the groove 21a. It can be understood that the groove 21a is set to match the size of the chip, so that the clamping device can accurately place the chip on the transportation surface 2a.

[0054] Considering that the chip may move during transportation, making it difficult to accurately align with the test end 41 when the chip is transported below the test mechanism 4. Based on this, in this application, an adsorption hole 21b is provided in the groove 21a, and the adsorption hole 21b is connected to the gas supply device. The chip is adsorbed in the groove 21a through the gas supply device, so as to avoid the movement of the chip during transportation and be beneficial to the alignment of the test end 41 of the test mechanism 4 with the chip during testing.

[0055] In some embodiments, a plurality of positioning holes 21c are further provided on the transportation surface 2a, and each positioning hole 21c is located on the outer periphery of the corresponding groove 21a. The test mechanism 4 includes a bracket 42 and a test end 41. The bracket 42 is installed on the base 1 and located on the outer periphery of the turntable 2. The test end 41 is installed on the bracket 42 and located above the transportation surface 2a. The test end 41 includes a test portion 41a and a positioning portion 41b. The test portion 41a is used for the electrical test of the chip. The positioning portion 41b is provided on the outer periphery of the test portion 41a. The test mechanism 4 has a test state. In the test state, the test portion 41a abuts against the chip located in the groove 21a, and the positioning portion 41b is correspondingly arranged in the positioning hole 21c. It can be understood that when no test is carried out, in order to facilitate the transportation of the chip, the test portion 41a of the test end 41 does not contact the chip on the transportation surface 2a. Usually, the test end 41 is erected above the transportation surface 2a through the bracket 42. When in the test state, the test portion 41a can contact the chip on the transportation surface 2a through the movement of the bracket 42.

[0056] To enable the test unit 41a to make good contact with the chip, exemplarily, in the test state, the bracket 42 extends the test end 41 towards the transport surface 2a. When the test unit 41a on the test end 41 contacts the chip, the positioning hole 21c can receive the insertion. At this time, the test unit 41a makes good contact with the chip. It can be understood that if the positioning part 41b cannot be inserted into the positioning hole 21c, the positioning part 41b will abut against the transport surface 2a, and the test unit 41a cannot contact the chip. Then the bracket 42 needs to retract the test end 41, then readjust the position through the turntable 2, and then perform the test step. It can be seen that through the cooperation of the positioning part 41b and the positioning hole 21c, the test unit 41a of the test mechanism 4 can make good contact with the chip in the test state, avoiding the deviation of the test unit 41a from the chip resulting in inaccurate test positions and improving the accuracy of chip testing.

[0057] Optionally, the bracket 42 is a movable bracket 42, which can specifically be a hydraulic-driven lifting bracket 42, a robotic arm driven by a motor, etc. The present application does not make specific limitations here.

[0058] Please refer to Figure 6 , in some embodiments, a baffle 5 and a sensor 6 are further provided on the transport surface 2a. The baffle 5 is provided with a feed port 51 for placing the chip on the transport surface 2a, and the sensor 6 is correspondingly arranged for the feed port 51. The sensor 6 is used to sense the posture of the chip placed in the feed port 51.

[0059] In the first example, the baffle 5 is installed on the outer shell 22 so that it is disposed above the transport surface 2a, and a placement space for placing the chip is formed between the baffle 5 and the transport surface 2a.

[0060] In the second example, the baffle 5 is integrally installed with the first heating element 3 so that it is disposed above the transport surface 2a, and a placement space for placing the chip is formed between the baffle 5 and the transport surface 2a.

[0061] In the third example, the baffle 5 is integrally installed with the heat preservation cover 23 so that it is disposed above the transport surface 2a, and a placement space for placing the chip is formed between the baffle 5 and the transport surface 2a.

[0062] By detecting the placement posture of the chip placed in the feed port 51 through the sensor 6, if the placement posture is not conducive to the testing of the test mechanism 4, the sensor 6 can send a control signal to the clamping device (not shown), and use the clamping device to readjust the placement posture of the chip, thereby improving the automation and intelligence of production. In addition, the baffle 5 can form a dust-proof structure for the turntable 2 together with the heat preservation cover 23 to prevent dust from contaminating the chip.

[0063] Optionally, the sensor may be, but not limited to, an infrared sensor, an ultrasonic sensor, etc., which is not specifically limited in the present application. Also, the above-mentioned clamping device may include, but is not limited to, for example, a manipulator.

[0064] In other embodiments, the size of the feed port 51 of the baffle 5 matches the size of the chip. Specifically, when the chip is placed from the feed port 51 by the clamping device, if the placement posture of the chip does not match the feed port 51, the chip cannot be directly placed on the transport surface 2a, but is stuck in the feed port 51. In this way, the chip will not be immediately transported by the turntable 2, but will give the clamping device enough time to adjust the chip posture, so that the clamping device can readjust the chip posture.

[0065] Taking into account that the clamping device is convenient for transporting the chip to the feed port 51, in some embodiments, the baffle 5 is provided with an avoidance portion 5a on the side close to the feed port 51, and the avoidance portion 5a is used to avoid the clamping device for transporting the chip. In the specific setting, the surface of the turntable 2 is covered with an insulation cover 23 and a baffle 5 to achieve heat preservation and dust prevention when transporting the chip. It is understandable that since the baffle 5 and the insulation cover 23 have a certain thickness, if the feed port 51 is directly provided on the baffle 5, the feed port 51 has a certain height from the transport surface 2a. In this way, if the clamping device directly puts down the chip, it may cause the chip to fall on the transport surface 2a, which may cause damage to the chip. Therefore, by providing the avoidance portion 5a on the baffle 5 or the insulation cover 23, the clamping device can be close to the transport surface 2a when placing the chip, which facilitates the placement of the chip and avoids chip damage. For example, in Figure 6 As shown, the avoidance portion 5a can be an arc-shaped slot, and the feed port 51 is arranged in the slot. When the clamping device is located at the avoidance portion 5a, the arc-shaped side wall of the slot can provide a certain guiding effect for the movement of the clamping device.

[0066] See also Figure 7 In some embodiments, the chip testing device 100 further includes a second heating element 7, which is disposed on the turntable 2 and on the side of the turntable 2 away from the transport surface 2a. The second heating element 7 is also used to heat the chip located on the transport surface 2a. Specifically, the second heating element 7 can be attached to the back side of the turntable 2, and can transfer heat to the transport surface 2a through the turntable 2 to heat the chip located on the transport surface 2a. In other words, the turntable 2 is provided with heating elements on both the side close to the transport surface 2a and the side away from the transport surface 2a, and the chip is evenly heated from both sides, so that the chip can reach the temperature required for the test more quickly on the transport surface 2a, and the heating is better.

[0067] Optionally, the second heating element 7 may be a heating plate, a heating wire or other heating element, which is not specifically limited in the present application.

[0068] In order to improve the heat preservation effect of the chip testing device 100, in some embodiments, there are multiple second heating elements 7, and the second heating elements 7 are arranged at intervals along the rotation direction of the turntable 2. Exemplarily, when the chip is transported along the rotation direction of the turntable 2, each second heating element 7 can continuously heat the chip, and the chip can be in a certain high-temperature environment regardless of the position it is transported to. For example, when the chip is transported under the test end 41 of the testing mechanism 4, since the first heating element 3 is not provided under the test end 41 of the testing mechanism 4 in order to avoid the testing mechanism 4, the chip cannot be maintained in a stable high-temperature environment during the testing process. Therefore, the second heating element 7 provided on the back side of the turntable 2 can heat the chip located under the test end 41, so that the chip can also be in a stable high-temperature environment during the electrical testing.

[0069] The chip testing device disclosed in the embodiments of the present application has been introduced in detail above. Specific examples are used in this article to elaborate on the principle and implementation manner of the present application. The description of the above embodiments is only used to help understand the chip testing device of the present application and its core idea; at the same time, for those of ordinary skill in the art, according to the idea of the present application, there will be changes in the specific implementation manner and application scope. In summary, the content of this specification should not be construed as a limitation to the present application.

Claims

1. A chip testing device, characterized in that: include: Pedestal; A turntable, the turntable is rotatably mounted on the base, the turntable has a transport surface, and the transport surface is used to transport the chip; a first heating element, the first heating element being disposed on the turntable, the first heating element being configured to heat the chip on the transport surface; as well as A plurality of testing mechanisms are provided on the base, and a testing end of each of the testing mechanisms is located above the transport surface along the height direction of the turntable. The plurality of testing mechanisms are arranged at intervals along the rotation direction of the turntable, and each of the testing mechanisms is used to perform electrical testing on the chip.

2. The chip testing device according to claim 1, characterized in that: There are a plurality of the first heating elements, which are arranged at intervals along the rotation direction of the turntable, and along the rotation direction of the turntable, each of the first heating elements is correspondingly located upstream of each of the testing mechanisms.

3. The chip testing device according to claim 1, characterized in that: The first heating element is disposed above the transport surface along the height direction of the turntable, and the first heating element is spaced apart from the transport surface.

4. The chip testing device according to claim 3, characterized in that: The turntable includes a turntable body and a shell, the turntable body is arranged in the shell, and the first heating element is installed on the shell so that the first heating element is arranged above the turntable body along the height direction of the turntable; and The turntable further comprises a heat preservation cover, which is mounted on the housing and arranged above the first heating element along the height direction of the turntable so that the heat preservation cover covers the first heating element and the turntable body.

5. The chip testing device according to claim 1, characterized in that: The chip testing device further includes a second heating element, which is disposed on the turntable and located at a side of the turntable away from the transport surface, and is configured to heat the chip located on the transport surface.

6. The chip testing device according to claim 5, characterized in that: There are a plurality of second heating elements, and the second heating elements are arranged at intervals along the rotation direction of the turntable.

7. The chip testing device according to any one of claims 1 to 6, characterized in that: The transport surface is provided with a baffle and a sensor. The baffle is provided with a feed port for feeding the chips. The sensor is arranged corresponding to the feed port and is used for sensing the posture of the chip being placed in the feed port.

8. The chip testing device according to claim 7, characterized in that: The baffle is provided with an avoidance portion at one side close to the feed port, and the avoidance portion is used to avoid a clamping device for transporting the chip.

9. The chip testing device according to any one of claims 1 to 6, characterized in that: A plurality of grooves are arranged on the transport surface, each of which is used to place the chip, and adsorption holes are arranged in the grooves, and the adsorption holes are configured to be connected to the air supply device to adsorb the chip placed in the grooves.

10. The chip testing device according to claim 9, characterized in that: The transport surface is also provided with a plurality of positioning holes, each of which is located at the outer periphery of the corresponding groove; The testing mechanism includes a bracket and a testing end, wherein the bracket is mounted on the base and is located at the periphery of the turntable, and the testing end is mounted on the bracket in a liftable manner and is located above the transport surface, and the testing end includes a testing portion and a positioning portion, wherein the testing portion is used for electrical testing of the chip, and the positioning portion is disposed at the periphery of the testing portion, and the positioning portion is configured to cooperate and connect with the positioning hole when the testing portion abuts against the chip to perform an electrical test on the chip.

Images