Test adapter plate and chip test device

Abstract

The utility model discloses a test adapter plate and a chip test device. The test adapter plate comprises a control module, a gating module and a plurality of interfaces, the control module comprises a gating signal output end; the gating signal output end is electrically connected with the control end of the gating module; the plurality of interfaces comprise a plurality of first interfaces and a plurality of second interfaces; the first interface and the second interface are electrically connected through the gating module; the control module is used for providing a gating signal for the gating module; the gating module is used for switching a connection path between the first interface and the second interface according to the gating signal. According to the technical scheme of the utility model, automatic switching of connection paths between the test platform and a plurality of test instruments can be realized, so that the electrical test efficiency of the chip is improved.

Description

Technical Field

[0001] This utility model relates to the field of chip testing technology, and in particular to a test adapter board and a chip testing device. Background Technology

[0002] Electrical testing of chips can evaluate electrical parameters such as current, voltage, and power consumption, as well as performance indicators such as response time and stability. This is crucial for chip design optimization, quality control, and troubleshooting. For highly integrated and complex chips, electrical testing requires testing multiple electrical characteristics at various temperatures.

[0003] However, existing testing equipment can only test one electrical characteristic of a chip. After the test of that electrical characteristic is completed, the testing equipment needs to be manually replaced to test other electrical characteristics of the chip, resulting in low efficiency of electrical testing of the chip. Utility Model Content

[0004] This invention provides a test adapter board and a chip testing device to overcome the deficiencies in the prior art, realize the automatic switching of the connection path between the test platform and multiple test instruments, thereby improving the efficiency of electrical testing of chips.

[0005] According to one aspect of the present invention, a test adapter board is provided, comprising: a control module, a gating module, and multiple interfaces;

[0006] The control module includes a gating signal output terminal; the gating signal output terminal is electrically connected to the control terminal of the gating module.

[0007] The plurality of interfaces include a plurality of first interfaces and a plurality of second interfaces; the first interfaces and the second interfaces are electrically connected through the gating module;

[0008] The control module is used to provide a gating signal to the gating module; the gating module is used to switch the connection path between the first interface and the second interface according to the gating signal.

[0009] Optionally, the gating module includes multiple switches;

[0010] The gating signal output terminal is electrically connected to the control terminal of each of the switches;

[0011] At least one of the switches is provided in the connection path between the first interface and the second interface.

[0012] Optionally, the multiple switches constitute multiple switch groups; each switch group includes at least one of the switches;

[0013] The first end of each switch is electrically connected to the corresponding first interface, and the second end of each switch in the same switch group is electrically connected to the same second interface.

[0014] Optionally, the plurality of switches may include a plurality of first switches and a plurality of second switches;

[0015] The first terminal of the first switch is electrically connected to one of the first interfaces; the second terminal of the first switch is electrically connected to the first terminal of at least one second switch; and the second terminal of the second switch is electrically connected to at least one second interface.

[0016] Optionally, the first end of each of the first switches is electrically connected to each of the first interfaces in a one-to-one correspondence; the second end of each of the first switches is electrically connected to the first node; the first end of each of the second switches is electrically connected to the first node; and the second end of each of the second switches is electrically connected to each of the second interfaces in a one-to-one correspondence.

[0017] Optionally, multiple first switches constitute M first switch groups, and multiple second switches constitute M second switch groups; the first terminal of each first switch is electrically connected to each first interface in a one-to-one correspondence; the second terminal of each first switch in the i-th first switch group is electrically connected to the first terminal of each second switch in the j-th second switch group; the second terminal of each second switch is electrically connected to each second interface in a one-to-one correspondence; wherein, M is an integer greater than or equal to 2, and i and j are integers from 1 to M.

[0018] Optionally, the test adapter board further includes: a circuit board;

[0019] The control module, the gating module, and each of the interfaces are respectively mounted on the circuit board and electrically connected to it.

[0020] Optionally, the circuit board includes a first surface and a second surface disposed opposite to each other; the control module, the gating module, and each of the interfaces are distributed on the first surface and the second surface.

[0021] Optionally, the circuit board includes a working area; the working area includes at least a first edge and a second edge disposed opposite to each other; the plurality of interfaces at least constitute a first interface group and a second interface group;

[0022] The first interface group is located on the side closer to the first edge, and the second interface group is located on the side closer to the second edge; the switch is located in the working area between the first interface group and the second interface group.

[0023] Optionally, the working area further includes a third edge connecting the first edge and the second edge; the plurality of interfaces also constitute a third interface group;

[0024] The third interface group is located on one side near the third edge.

[0025] Optionally, the control module includes a control interface and at least one microcontroller; the control interface is electrically connected to the microcontroller.

[0026] The work area also includes a fourth edge connecting the first edge and the second edge;

[0027] The control interface is located on the side of the microcontroller near the fourth edge;

[0028] At least a portion of the switch portions are arranged around the control module.

[0029] Optionally, the test adapter board may also include a power interface and a power control conversion module;

[0030] The control module also includes a power input terminal;

[0031] The power interface is electrically connected to the power input terminal through the power control conversion module.

[0032] Optionally, at least a portion of the switch portion is arranged around the power interface and the power control conversion module.

[0033] Optionally, the power control conversion module includes a power switch, an indicator light, a voltage converter, and a voltage regulator;

[0034] The power interface is electrically connected to the power input terminal in sequence through the power switch, the voltage converter, and the voltage regulator; the indicator light is electrically connected between the power switch and the voltage converter.

[0035] Optionally, a portion of the power switch, the indicator light, the voltage converter, and the voltage regulator may be disposed on the first surface, and another portion may be disposed on the second surface.

[0036] Optionally, the test adapter plate further includes multiple first support columns and multiple second support columns;

[0037] The circuit board also includes a peripheral area surrounding the working area;

[0038] Each of the first support columns is distributed in the peripheral area of ​​the first surface; each of the second support columns is distributed in the peripheral area of ​​the second surface.

[0039] Optionally, the length of each of the first support columns is a first length, and the length of each of the second support columns is a second length;

[0040] The maximum height of each component disposed on the first surface from the first surface is a first height; the maximum height of each component disposed on the second surface from the second surface is a second height.

[0041] The first length is greater than or equal to the first height, and the second length is greater than or equal to the second height.

[0042] Secondly, this utility model also provides a chip testing device, including a testing platform and a testing adapter board as described in any of the above claims, wherein the testing platform is electrically connected to a portion of the interface of the testing adapter board.

[0043] The technical solution of this utility model provides a gating signal to the gating module by electrically connecting the gating signal output terminal of the control module to the control terminal of the gating module. Simultaneously, each first interface and each second interface are electrically connected through the gating module, enabling the gating module to switch the connection path between the first and second interfaces according to the gating signal. Thus, when one of the first and second interfaces of the test adapter board is electrically connected to the test platform and the other to the test instrument, the test adapter board can automatically switch the connection path between the test platform and the test instrument, thereby improving the efficiency of electrical testing of the chip.

[0044] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of this utility model, nor is it intended to limit the scope of this utility model. Other features of this utility model will become readily apparent from the following description. Attached Figure Description

[0045] To more clearly illustrate the technical solutions in the embodiments of this utility model, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0046] Figure 1 A schematic diagram of the structure of a test adapter plate provided in an embodiment of this utility model;

[0047] Figure 2 A schematic diagram of another test adapter plate provided in this embodiment of the present utility model;

[0048] Figure 3 A schematic diagram of the structure of another test adapter plate provided in this embodiment of the utility model;

[0049] Figure 4 A schematic diagram of the structure of another test adapter plate provided in this embodiment of the utility model;

[0050] Figure 5 A schematic diagram of the structure of another test adapter plate provided in this embodiment of the utility model;

[0051] Figure 6 A schematic diagram of the structure of another test adapter plate provided in this embodiment of the utility model;

[0052] Figure 7 An assembly schematic diagram of the first surface of a test adapter plate provided for an embodiment of this utility model;

[0053] Figure 8 An assembly diagram of the second surface of a test adapter plate provided for an embodiment of this utility model;

[0054] Figure 9 A schematic diagram of the structure of another test adapter plate provided in this embodiment of the utility model;

[0055] Figure 10 This is a schematic diagram of the chip testing device provided in an embodiment of the present invention. Detailed Implementation

[0056] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the protection scope of the present invention.

[0057] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this utility model are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the utility model described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0058] As described in the background section, existing testing equipment can only test one electrical characteristic of a chip. When a chip needs to be tested for multiple electrical characteristics at different temperatures, there are two possible solutions:

[0059] 1) Only one electrical characteristic is tested at each test temperature point. For a specific electrical characteristic, the corresponding test equipment is powered on, and the temperature of the chamber housing the test platform is adjusted to traverse multiple test temperatures. Simultaneously, the test is applied at each test temperature point to obtain the electrical characteristic of the chip at different test temperatures. When other electrical characteristics of the chip need to be tested, the corresponding test equipment is replaced, and the above test is repeated. Since temperature adjustment of the chamber takes a considerable amount of time, the temperature of the chamber needs to be switched repeatedly when testing multiple electrical characteristics of the chip, resulting in low efficiency in testing the chip's electrical characteristics.

[0060] 2) Test multiple electrical characteristics sequentially at the same temperature point. In this method, the temperature of the test chamber only needs to be adjusted once, eliminating the need for repeated switching and saving time spent adjusting the temperature. However, at the same temperature point, multiple test devices need to be replaced and loaded to test multiple electrical characteristics of the chip. The processes of replacing, connecting, powering on, and loading the test devices also take a considerable amount of time, resulting in low efficiency in testing the chip's electrical characteristics.

[0061] To address the aforementioned technical problems, this embodiment of the invention includes a test adapter board comprising a control module, a gating module, and multiple interfaces. The gating signal output terminal of the control module is electrically connected to the control terminal of the gating module to provide a gating signal to the gating module. Simultaneously, each first interface and each second interface are electrically connected through the gating module, enabling the gating module to switch the connection path between the first and second interfaces based on the gating signal. Thus, when one of the first and second interfaces of the test adapter board is electrically connected to the test platform and the other to the test instrument, the test adapter board can automatically switch the connection path between the test platform and the test instrument, thereby improving the efficiency of electrical testing of the chip.

[0062] The above is the core idea of ​​this utility model. Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of this utility model. The technical solutions in the embodiments of this utility model will be clearly and completely described below with reference to the accompanying drawings.

[0063] Figure 1 This is a schematic diagram of a test adapter plate provided in an embodiment of the present invention. (Reference) Figure 1As shown, the test adapter board 100 provided in this embodiment includes: a control module 1, a gating module 2, and multiple interfaces 3. The control module 1 includes a gating signal output terminal 101, which is electrically connected to the control terminal of the gating module 2. The multiple interfaces 3 include multiple first interfaces 31 and multiple second interfaces 32; the first interfaces 31 and the second interfaces 32 are electrically connected through the gating module 2. The control module 1 is used to provide gating signals to the gating module 2; the gating module 2 is used to switch the connection path between the first interfaces 31 and the second interfaces 32 according to the gating signals.

[0064] The control module 1 may include, but is not limited to, a microcontroller; for example, the control module 1 may be an STM32 series microcontroller.

[0065] Interface 3 may include, but is not limited to, a coaxial RF connector; for example, interface 3 may be an MMCX interface. One of the first interface 31 and the second interface 32 is used for electrical connection with the chip test platform, and the other is used for electrical connection with the test equipment. By switching the connection path between the first interface 31 and the second interface 32, the chip test platform can automatically connect to each test equipment, thereby eliminating the need for manual replacement of test equipment and improving the efficiency of electrical testing of the chip.

[0066] It should be noted that, Figure 1 This example only illustrates a test adapter board 100 with eight interfaces, including four first interfaces and four second interfaces, and does not limit the number of first interfaces 31 and second interfaces 32 in the test adapter board 100. In this embodiment, the number of first interfaces 31 and second interfaces 32 may be the same or different, depending on actual needs.

[0067] The gating signal output terminal 101 of the control module 1 is electrically connected to the control terminal of the gating module 2. The first interface 31 and the second interface 32 are electrically connected through the gating module 2, so that the gating module 2 can receive the gating signal provided by the control module 1 and switch the connection path between the first interface 31 and the second interface 32 according to the gating signal.

[0068] In one exemplary embodiment, with Figure 1For example, multiple first interfaces 31 include a first first interface 311, a second first interface 312, a third first interface 313, and a fourth first interface 314; multiple second interfaces 32 include a first second interface 321, a second second interface 322, a third second interface 323, and a fourth second interface 324. When a test device electrically connected to the first first interface 311 needs to provide a signal to a test platform electrically connected to the first second interface 321 and the second second interface 322, the gating module 2 can control the formation of a conductive path between the first first interface 311 and the first second interface 321, and control the formation of a conductive path between the first first interface 311 and the second second interface 322, and disconnect the connection paths between other first interfaces 31 and second interfaces 32. Similarly, the gating module 2 can control the opening or closing of the connection paths between different first interfaces 31 and second interfaces 32.

[0069] In this embodiment, the test adapter board includes a control module, a gating module, and multiple interfaces. The gating signal output terminal of the control module is electrically connected to the control terminal of the gating module to provide a gating signal to the gating module. Simultaneously, each first interface and each second interface are electrically connected through the gating module, enabling the gating module to switch the connection path between the first and second interfaces according to the gating signal. Thus, when one of the first and second interfaces of the test adapter board is electrically connected to the test platform and the other is electrically connected to the test instrument, the test adapter board can automatically switch the connection path between the test platform and the test instrument, thereby improving the efficiency of electrical testing of the chip.

[0070] Optional, Figure 2 A schematic diagram of another test adapter board provided in an embodiment of this utility model is shown below. Figure 2 As shown, the gating module 2 includes multiple switches 21, and the gating signal output terminal 101 is electrically connected to the control terminal of each switch 21; a switch 21 is provided in the connection path between a first interface 31 and a second interface 32.

[0071] The multiple switches 21 may include, but are not limited to, relay switches or semiconductor switches. The strobe signal output terminal 101 is electrically connected to the control terminal of each switch 21, so that the strobe signal output by the control module 1 can control the state of each switch 21, wherein the state of the switch 21 includes an on state and an off state.

[0072] It is understood that at least one switch 21 is provided in the connection path between a first interface 31 and a second interface 32. There may be one switch 21 in the connection path between a first interface 31 and a second interface 32, or multiple switches 21 may be provided in the connection path between a first interface 31 and a second interface 32. By controlling the state of each switch 21 in the connection path between each first interface 31 and each second interface 32, multiple connection methods between each first interface 31 and each second interface 32 can be realized.

[0073] Specifically, the gating signal output terminal 101 of the control module 1 is electrically connected to the control terminal of each switch 21, so that the gating signal provided by the control module 1 can control the state of each switch 21. For example, it can control some switches 21 to be on and control other switches 21 to be off, so that when all switches 21 in the connection path between the first interface 31 and the second interface 32 are on, a conductive path can be formed between the first interface 31 and the second interface 32. When there is a switch 21 in the connection path between the first interface 31 and the second interface 32 that is off, a conductive path cannot be formed between the first interface 31 and the second interface 32. In this way, by changing the on or off state of each switch 21, the connection path between each first interface 31 and each second interface 32 can be switched.

[0074] In one exemplary embodiment, with Figure 2 For example, a switch 21 is provided in the connection path between a first interface 31 and a second interface 32. When the switch 21 is turned on, a conductive path can be formed between the first interface 31 and the second interface 32. Conversely, when the switch 21 is turned off, a conductive path cannot be formed between the first interface 31 and the second interface 32. Thus, by changing the on or off state of the switch 21 connected between the first interface 31 and the second interface 32, the connection path between the corresponding first interface 31 and the second interface 32 can be switched. For example, when the switch 21 connected to the first first interface 311 and the first second interface 321 is in the on state, the connection path between the first first interface 311 and the first second interface 321 is conductive, while the connection paths between other first interfaces 31 and other second interfaces 32 are not conductive.

[0075] It should be noted that, Figure 2Taking the example of a switch 21 being provided in the connection path between a first interface 31 and a second interface 32, this example illustrates how the gating module 2 controls the connection path between the first interface 31 and the second interface 32 to be open or closed. However, in this embodiment, the connection method between each switch 21 and the first interface 31 and the second interface 32 is not limited to this and can be designed according to actual needs.

[0076] Optional, Figure 3 This is a schematic diagram of another test adapter board provided in an embodiment of the present invention, with reference to... Figure 3 As shown, multiple switches 21 constitute multiple switch groups 2101, and each switch group 2101 includes at least one switch 21. The first end of each switch 21 is electrically connected to each corresponding first interface 31. In the same switch group 2101, the second end of each switch 21 is electrically connected to the same second interface 32, so that a switch 21 is connected in series in the connection path between each second interface 32 and the corresponding electrically connected first interface 31. Based on the gating signal output by the control module 1, each second interface 32 can be electrically connected to some of the first interfaces 31, making the connection method between each first interface 31 and each second interface 32 more flexible.

[0077] In one exemplary embodiment, with Figure 3 For example, four switches 21 constitute two switch groups 2101, namely a first switch group 2102 and a second switch group 2103. When the switch 21 in the first switch group 2102 that is electrically connected to the first interface 311 is in the ON state, a conductive path is formed between the first interface 311 and the first interface 321. When the switch 21 in the first switch group 2102 that is electrically connected to the second interface 312 is in the ON state, the connection path between the second interface 312 and the first interface 321 is disconnected. Thus, by controlling the ON and OFF states of each switch 21 in the first switch group 2102, the connection paths between the first interface 311 and the first interface 321, as well as between the second interface 312 and the first interface 321, can be switched.

[0078] It should be noted that, Figure 3 This example only illustrates the case where four switches 21 constitute two switch groups 2101, and each switch group 2101 includes two switches 21; it is not intended to be a limitation. In this embodiment, the number of switch groups 2101 composed of multiple switches 21 and the number of switches 21 included in each switch group 2101 can be limited according to actual needs.

[0079] Optional, Figure 4 This is a schematic diagram of another test adapter board provided in an embodiment of the present invention, with reference to... Figure 4 As shown, the multiple switches 21 include multiple first switches 211 and multiple second switches 212; the first end of the first switch 211 is electrically connected to a first interface 31; the second end of the first switch 211 is electrically connected to the first end of a second switch 212; and the second end of the second switch 212 is electrically connected to a second interface 32.

[0080] It should be noted that, Figure 4 This illustration only shows the case where the first end of the first switch 211 is electrically connected to a first interface 31, the second end of the first switch 211 is electrically connected to the first end of a second switch 212, and the second end of the second switch 212 is electrically connected to a second interface 32. It does not limit the connection methods of each first switch 211 and each second switch 212. In this embodiment, the number of first ends of second switches 212 electrically connected to the second end of the first switch 211 is not limited to this and can be designed according to actual needs.

[0081] Optional, Figure 5 This is a schematic diagram of another test adapter board provided in an embodiment of the present invention, with reference to... Figure 5 As shown, the first end of each first switch 211 is electrically connected to each first interface 31 in a one-to-one correspondence. The second end of each first switch 211 is electrically connected to the first node a. The first end of each second switch 212 is electrically connected to the first node a. The second end of each second switch 212 is electrically connected to each second interface 32 in a one-to-one correspondence. This allows the state of each first switch 211 and each second switch 212 to be controlled by the gating signal output by the control module 1. Each first interface 31 can be electrically connected to any second interface 32 through the first switch 211 and the second switch 212.

[0082] Optional, Figure 6 This is a schematic diagram of another test adapter board provided in an embodiment of the present invention, with reference to... Figure 6 As shown, multiple first switches 211 constitute M first switch groups 2111, and multiple second switches 212 constitute M second switch groups 2121; the first end of each first switch 211 is electrically connected to each first interface 31 in a one-to-one correspondence; the second end of each first switch 211 in the i-th first switch group 2111 is electrically connected to the first end of each second switch 212 in the j-th second switch group 2121; the second end of each second switch 212 is electrically connected to each second interface 32 in a one-to-one correspondence.

[0083] Where M is an integer greater than or equal to 2, and i and j are integers from 1 to M. i and j can be equal or not.

[0084] The first switch group 2111 includes at least one first switch 211, and the second switch group 2121 includes at least one second switch 212. The states of each first switch 211 and second switch 212 are controlled by a gating signal output from the control module 1. A first interface 31 electrically connected to the same first switch group 2111 can be electrically connected to the corresponding plurality of second switches 212 through the first switch group 2111 and the second switch group 2121.

[0085] It should be noted that, Figure 6 This example only illustrates the case where five first switches 211 constitute two first switch groups 2111 and five second switches 212 constitute two second switch groups 2121. It does not limit the number of first switches 211 and second switches 212, or the number of first switch groups 2111 and second switch groups 2121. In this embodiment, the number of first switch groups 2111, the number of second switch groups 2121, the number of first switches 211 in the first switch group 2111, and the number of second switches 212 in the second switch group 2121 are not limited to this and can be designed according to actual needs.

[0086] Optional, Figure 7 This is an assembly diagram of the first surface of a test adapter plate provided in an embodiment of the present invention. Figure 8 This is a schematic diagram illustrating the assembly of the second surface of a test adapter plate according to an embodiment of the present invention. (See reference) Figure 7 and Figure 8 As shown, the test adapter board 100 also includes a circuit board 4; the control module 1, the selection module 2 and each interface 3 are respectively disposed on the circuit board 4 and electrically connected through the circuit board 4, thereby improving the integration of the test adapter board 100 and reducing the size of the test adapter board 100.

[0087] The electrical connection between the control module 1, the gating module 2, and each interface 3 via the circuit board 4 can be understood as the electrical connection between the control module 1, the gating module 2, and each interface 3 via metal traces and metal conductive holes on the circuit board 4.

[0088] It should be noted that when the control module 1, the gating module 2, and each interface 3 are electrically connected via the circuit board 4, their positions on the circuit board 4 can be arranged according to the actual situation. In one exemplary embodiment, if the number of components in the control module 1, the gating module 2, and each interface 3 is large, the components can be distributed on the front and back of the circuit board 4, thereby further improving the integration of the test adapter board 100. In other exemplary embodiments, if the number of components in the control module 1, the gating module 2, and each interface 3 is small, the components can be disposed only on one side of the circuit board 4, thereby reducing the thickness of the test adapter board 100.

[0089] Optional, continue to refer to Figure 7 and Figure 8 As shown, the circuit board 4 includes a first surface S1 and a second surface S2 that are arranged opposite to each other; the control module 1, the selection module 2 and each interface 3 are distributed on the first surface S1 and the second surface S2.

[0090] Wherein, the first surface S1 refers to one of the front and back surfaces of the circuit board 4, and the second surface S2 refers to the other of the front and back surfaces of the circuit board 4. The control module 1, the gating module 2, and each interface 3 include multiple components, which are distributed on the first surface S1 and the second surface S2. This can be understood as a portion of the control module 1, the gating module 2, and each interface 3 being disposed on the first surface S1, and another portion being disposed on the second surface S2; or, at least one of the control module 1, the gating module 2, and each interface 3 having some components disposed on the first surface S1, and another portion of components disposed on the second surface S2.

[0091] In this embodiment, by distributing the control module 1, the gating module 2, and each interface 3 on the first surface S1 and the second surface S2, the integration of the test adapter board 100 can be further improved, which is beneficial to the miniaturization of the test adapter board 100.

[0092] Optional, continue to refer to Figure 7 and Figure 8 As shown, the circuit board 4 includes a working area; the working area includes at least a first edge L1 and a second edge L2 that are disposed opposite to each other; a plurality of interfaces 3 constitute at least a first interface group 301 and a second interface group 302; the first interface group 301 is disposed on the side near the first edge L1, and the second interface group 302 is disposed on the side near the second edge L2; the switch 21 is disposed in the working area between the first interface group 301 and the second interface group 302.

[0093] The circuit board 4 includes a working area and a surrounding area, with the working area used for routing traces and components. Both the first interface group 301 and the second interface group 302 include at least one interface 3. In an exemplary embodiment, the first interface group 301 is located near the first edge L1 and arranged along the first edge L1, while the second interface group 302 is located near the second edge L2 and arranged along the second edge L2, facilitating connection between the test platform or test instrument and each interface 3. A switch 21 is located in the area between the first interface group 301 and the second interface group 302, facilitating electrical connection between the switch 21 and the interface 3.

[0094] Optional, continue to refer to Figure 7 and Figure 8As shown, the working area also includes a third edge L3 connecting the first edge L1 and the second edge L2. Multiple interfaces 3 also constitute a third interface group 303. The third interface group 303 is located on the side close to the third edge L3, so that the edge of the working area of ​​the circuit board 4 can be fully utilized to set the interfaces 3. Under the premise of facilitating the connection between the test platform or test instrument and each interface 3, the integration of the test adapter board 100 can be further improved.

[0095] In an alternative embodiment, continue to refer to Figure 7 and Figure 8 As shown, multiple interfaces 3 also constitute a fourth interface group 304 disposed between the first interface group 301 and the second interface group 302. Some interfaces 3 in the first interface group 301, the third interface group 303 and some interfaces 3 in the fourth interface group 304 form a first U-shaped structure. Another part of the interfaces 3 in the second interface group 302, the third interface group 303 and another part of the interfaces 3 in the fourth interface group 304 form a second U-shaped structure. Thus, more interfaces 3 can be set on the circuit board 4, which is beneficial to further improve the integration of the test adapter board 100.

[0096] It should be noted that this embodiment is not limited to multiple interfaces 3 forming a first U-shaped structure and a second U-shaped structure. For example, multiple interfaces 3 can also form a V-shaped structure, a W-shaped structure, or an arc-shaped structure. Furthermore, this embodiment does not specifically limit the number of U-shaped structures, V-shaped structures, W-shaped structures, or arc-shaped structures formed by the enclosed structures. As long as the core inventive point of this utility model can be achieved under the premise of taking into account factors such as the ease of plugging in, the integration of the test adapter board 100, and the heat dissipation capacity of the circuit board, it is acceptable.

[0097] Optional, Figure 9 This is a schematic diagram of another test adapter board provided in an embodiment of the present invention, in conjunction with reference to the reference. Figures 7-9 As shown, the control module 1 includes a control interface 11 and at least one microcontroller 12; the control interface 11 is electrically connected to the microcontroller 12; the working area includes a fourth edge L4 connecting the first edge L1 and the second edge L2; the control interface 11 is located on the side of the microcontroller 12 near the fourth edge L4, and at least some of the switches 21 are arranged around the control module 1.

[0098] The control interface 11 is used to connect to external control devices, such as a host computer for sending control signals. In an exemplary embodiment, the control interface 11 includes a USB-to-I2C interface, enabling control and debugging of Inter-Integrated Circuit (I2C) devices via a USB interface. The microcontroller 12 may include, but is not limited to, a microcontroller. In an exemplary embodiment, the microcontroller 12 includes an STM32 series microcontroller.

[0099] Since the control interface 11 is located on the side of the microcontroller 12 near the fourth edge L4, the partial arrangement around the control module 1 can be understood as the switch 21 being arranged on the side of the control module 1 near at least one of the first edge L1, the second edge L2, or the third edge L3, while the microcontroller 12 is not equipped with the switch 21 on the side near the fourth edge L4, which facilitates the connection between the microcontroller 12 and the control interface 11.

[0100] The arrangement of at least some switches 21 around the control module 1 can be understood as either some switches 21 surrounding the control module 1 or all switches 21 partially surrounding the control module 1. In an exemplary embodiment, when some interfaces 3 in the first interface group 301, the third interface group 303, and the fourth interface group 304 form a first U-shaped structure, some switches 21 partially surrounding the control module 1 are disposed within the first U-shaped structure, and the control interface 11 is disposed in the opening area of ​​the first U-shaped structure, thereby facilitating the plugging of external control devices and the control interface 11, the electrical connection between the microcontroller 12 and the control terminal of the switch 21, and the electrical connection between each switch 21 and each interface 3.

[0101] Optional, continue to refer to Figures 7 to 9 As shown, the test adapter board 100 also includes a power interface 5 and a power control conversion module 6; the control module 1 also includes a power input terminal 102; the power interface 5 is electrically connected to the power input terminal 102 through the power control conversion module 6.

[0102] The power interface 5 is used to connect to an external power source to power the control module 1; the power control conversion module 6 is used to control and convert the initial power provided by the external power source to obtain a target power source compatible with the control module 1. In an exemplary embodiment, the initial power provided by the external power source is a 12V power source. After voltage conversion by the power control conversion module 6, the target power source with an output voltage of 5V is sent to the power input terminal 102 of the control module 1.

[0103] Optional, continue to refer to Figures 7 to 8 As shown, at least some of the switches 21 are arranged around the power interface 5 and the power control conversion module 6.

[0104] The arrangement of at least some switches 21 around the power interface 5 and the power control conversion module 6 can be understood as either partially or entirely surrounding the power interface 5 and the power control conversion module 6. In an exemplary embodiment, when another portion of interfaces 3 in the second interface group 302, the third interface group 303, and the fourth interface group 304 form a second U-shaped structure, the portion of switches 21 partially surrounding the power interface 5 and the power control conversion module 6 is disposed within the second U-shaped structure, and the power interface is disposed in the opening area of ​​the second U-shaped structure, thereby facilitating the connection of external power supply and power interface 5, and the electrical connection of each switch 21 with each interface 3.

[0105] It should be noted that, Figure 7 and Figure 8 This illustration only demonstrates the arrangement of some switches 21 around the control module 1, and some switches 21 partially around the power interface 5 and the power control conversion module 6, and does not limit the arrangement of the switches 21, the microcontroller 12, and the power control conversion module 6. In an exemplary embodiment, each switch 21 is partially arranged around the control module 1 and the power control conversion module 6.

[0106] Optional, continue to refer to Figures 7 to 9 As shown, the power control conversion module 6 also includes a power switch 61, an indicator light 62, a voltage converter 63, and a voltage regulator 64; the power interface 5 is electrically connected to the power input terminal 102 in sequence through the power switch 61, the voltage converter 63, and the voltage regulator 64; the indicator light 62 is electrically connected between the power switch 61 and the voltage converter 63.

[0107] The power switch 61 controls the power supply status of the initial power supplied by the external power source to the voltage converter 63. The voltage converter 63 converts the initial power supplied by the external power source into a target power source adapted to the control module 1. In an exemplary embodiment, the voltage converter 63 includes a DC-DC converter to perform DC-DC conversion on the initial power supply to obtain the target DC power source. The voltage regulator 64 regulates the voltage of the target power source obtained through the voltage converter 63. In an exemplary embodiment, the voltage regulator 64 includes a low-dropout linear regulator. The indicator light 62 indicates the power supply status of the initial power source. Since the indicator light 62 is electrically connected between the power switch 61 and the voltage converter 63, when the indicator light 62 is lit, it indicates that the power switch 61 is on and the external power supply is normal. When the indicator light 62 is off, it indicates that the power switch 61 is off or the external power supply is abnormal.

[0108] Specifically, when the power switch 61 is in the off state, the initial power cannot be supplied to the voltage converter 63, resulting in the control module 1 not being powered on. The control module 1 cannot output a strobe signal to the strobe module 2, and thus the strobe module 2 cannot switch the connection state between the first interface 31 and the second interface 32. Conversely, when the power switch 61 is in the on state, the initial power is supplied to the voltage converter 63, and after voltage conversion by the voltage converter 63, it is supplied to the power input terminal 102 of the control module 1. The control module 1 is powered on, so the control module 1 can output a strobe signal to the strobe module 2, and thus the strobe module 2 can switch the connection state between the first interface 31 and the second interface 32 according to the strobe signal.

[0109] It should be noted that, since there are a large number of components in the power control conversion module 6, some of the power switch 61, indicator light 62, voltage converter and voltage regulator 64 in the power control conversion module 6 are set on the first surface S1 of the circuit board 4 and the other part is set on the second surface S2 of the circuit board 4. This is beneficial to improve the integration of the power control conversion module 6, and thus to further reduce the size of the test adapter board 100.

[0110] It is understandable that, since the control module 1, the gating module 2, and each interface 3 include multiple components, and these components have a certain volume, when the control module 1, the gating module 2, and each interface 3 are mounted on the circuit board 4, if no protective measures are taken and the test adapter board 100 is placed directly on the table, the components on one side of the circuit board 4 will inevitably be squeezed, thus affecting the performance of the components and the stability of the electrical connection. Therefore, certain protective measures can be taken for the circuit board 4, such as setting up support devices or circuit board brackets, to prevent the components mounted on the circuit board 4 from being squeezed.

[0111] Optional, refer to the reference Figure 6 or Figure 7 As shown, the test adapter board 100 also includes a plurality of first support pillars 7 and a plurality of second support pillars 8. The circuit board 4 also includes a peripheral area surrounding the working area. Each first support pillar 7 is dispersed in the peripheral area of ​​the first surface S1, and each second support pillar 8 is dispersed in the peripheral area of ​​the second surface S2. This allows the first support pillars 7 to support the components disposed on the first surface S1 of the circuit board 4, and the second support pillars 8 to support the components disposed on the second surface S2 of the circuit board 4. This prevents the components disposed on the circuit board 4 from being squeezed and improves the heat dissipation capacity of the circuit board 4, which is beneficial to improving the performance of each component and the stability of the electrical connection.

[0112] It should be noted that when each component is only set on one side surface of the circuit board 4, multiple support pillars can be set only in the peripheral area of ​​the side surface on which the component is set on the circuit board 4, thereby simplifying the preparation process of the test adapter board 100.

[0113] Optionally, the length of each first support column 7 is a first length, and the length of each second support column 8 is a second length; the maximum height of each component on the first surface S1 from the first surface S1 is a first height, and the maximum height of each component on the second surface S2 from the second surface S2 is a second height. The first length is greater than or equal to the first height, and the second length is greater than or equal to the second height, so that the first support columns 7 and the second support columns 8 can provide effective support for each component on the circuit board 4, further preventing the components from being squeezed, and simultaneously improving the heat dissipation capacity of the circuit board 4.

[0114] Based on the same concept, this utility model embodiment also provides a chip testing device. Figure 10 This is a schematic diagram of the chip testing device provided in an embodiment of the present invention, with reference to... Figure 10 As shown, the chip testing device 01 includes a testing platform 200 and a testing adapter board 100 provided in any of the above embodiments, wherein the testing platform and a portion of the interface 3 of the testing adapter board 100 are electrically connected.

[0115] Since the chip testing device provided in this embodiment includes a testing platform and a testing adapter board provided in any of the above embodiments, and the testing platform and the testing adapter board are electrically connected to some interfaces, the chip testing device possesses the technical features of the testing adapter board provided in the embodiments of the present invention, and can achieve the beneficial effects of the testing adapter board provided in the embodiments of the present invention. The similarities can be referred to the above description of the testing adapter board provided in the embodiments of the present invention, and will not be repeated here.

[0116] The specific embodiments described above do not constitute a limitation on the scope of protection of this utility model. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this utility model should be included within the scope of protection of this utility model.

Claims

1. A test adapter board, characterized in that, include: Control module, gating module, multiple interfaces; The control module includes a gating signal output terminal; the gating signal output terminal is electrically connected to the control terminal of the gating module. The plurality of interfaces include a plurality of first interfaces and a plurality of second interfaces; the first interfaces and the second interfaces are electrically connected through the gating module; The control module is used to provide a gating signal to the gating module; The gating module is used to switch the connection path between the first interface and the second interface according to the gating signal.

2. The test adapter board according to claim 1, characterized in that, The gating module includes multiple switches; The gating signal output terminal is electrically connected to the control terminal of each of the switches; At least one of the switches is provided in the connection path between the first interface and the second interface.

3. The test adapter board according to claim 2, characterized in that, The multiple switches constitute multiple switch groups; each switch group includes at least one of the switches; The first terminal of each of the switches is electrically connected to the corresponding first interface; In the same switch group, the second terminal of each switch is electrically connected to the same second interface.

4. The test adapter board according to claim 2, characterized in that, The plurality of switches includes a plurality of first switches and a plurality of second switches; The first terminal of the first switch is electrically connected to one of the first interfaces; the second terminal of the first switch is electrically connected to the first terminal of at least one of the second switches; and the second terminal of the second switch is electrically connected to one of the second interfaces.

5. The test adapter board according to claim 4, characterized in that, The first end of each of the first switches is electrically connected to each of the first interfaces in a one-to-one correspondence; the second end of each of the first switches is electrically connected to the first node; the first end of each of the second switches is electrically connected to the first node; and the second end of each of the second switches is electrically connected to each of the second interfaces in a one-to-one correspondence.

6. The test adapter board according to claim 4, characterized in that, Multiple first switches constitute M first switch groups, and multiple second switches constitute M second switch groups; the first terminal of each first switch is electrically connected to each first interface in a one-to-one correspondence; the second terminal of each first switch in the i-th first switch group is electrically connected to the first terminal of each second switch in the j-th second switch group; the second terminal of each second switch is electrically connected to each second interface in a one-to-one correspondence; wherein, M is an integer greater than or equal to 2, and i and j are integers from 1 to M.

7. The test adapter board according to claim 2, characterized in that, The test adapter board also includes a circuit board; The control module, the gating module, and each of the interfaces are respectively mounted on the circuit board and electrically connected to it.

8. The test adapter board according to claim 7, characterized in that, The circuit board includes a first surface and a second surface that are disposed opposite to each other; the control module, the gating module and each of the interfaces are disposed separately on the first surface and the second surface.

9. The test adapter board according to claim 8, characterized in that, The circuit board includes a working area; the working area includes at least a first edge and a second edge disposed opposite to each other; the plurality of interfaces at least constitute a first interface group and a second interface group; The first interface group is located on the side closer to the first edge, and the second interface group is located on the side closer to the second edge; the switch is located in the working area between the first interface group and the second interface group.

10. The test adapter board according to claim 9, characterized in that, The working area also includes a third edge connecting the first edge and the second edge; the plurality of interfaces also constitute a third interface group; The third interface group is located on one side near the third edge.

11. The test adapter board according to claim 9, characterized in that, The control module includes a control interface and at least one microcontroller; the control interface is electrically connected to the microcontroller. The work area also includes a fourth edge connecting the first edge and the second edge; The control interface is located on the side of the microcontroller near the fourth edge; At least a portion of the switch portions are arranged around the control module.

12. The test adapter board according to claim 9, characterized in that, The test adapter board also includes a power interface and a power control conversion module; The control module also includes a power input terminal; The power interface is electrically connected to the power input terminal through the power control conversion module.

13. The test adapter board according to claim 12, characterized in that, At least a portion of the switch portion is arranged around the power interface and the power control conversion module.

14. The test adapter board according to claim 13, characterized in that, The power control conversion module includes a power switch, indicator lights, a voltage converter, and a voltage regulator; The power interface is electrically connected to the power input terminal in sequence through the power switch, the voltage converter, and the voltage regulator; the indicator light is electrically connected between the power switch and the voltage converter.

15. The test adapter board according to claim 14, characterized in that, A portion of the power switch, the indicator light, the voltage converter, and the voltage regulator are disposed on the first surface, and another portion is disposed on the second surface.

16. The test adapter board according to claim 9, characterized in that, The test adapter plate also includes multiple first support columns and multiple second support columns; The circuit board also includes a peripheral area surrounding the working area; Each of the first support columns is distributed in the peripheral area of ​​the first surface; each of the second support columns is distributed in the peripheral area of ​​the second surface.

17. The test adapter board according to claim 16, characterized in that, The length of each of the first support columns is a first length, and the length of each of the second support columns is a second length; The maximum height of each component disposed on the first surface from the first surface is a first height; the maximum height of each component disposed on the second surface from the second surface is a second height. The first length is greater than or equal to the first height, and the second length is greater than or equal to the second height.

18. A chip testing device, characterized in that, It includes a test platform and a test adapter board as described in any one of claims 1-17, wherein the test platform is electrically connected to a portion of the interface of the test adapter board.

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