Bridgeless PFC cycle-by-cycle protection circuit of OBC

Abstract

The utility model discloses a bridgeless PFC cycle-by-cycle protection circuit of an OBC. The circuit comprises an AC source VIN, an energy storage inductor L1, a high-frequency upper tube PQ1, a high-frequency lower tube PQ2, a power-frequency upper tube PQ3, a power-frequency lower tube PQ4, a current sampling circuit 1, a current sampling circuit 2, a DSP chip U5, driving chips U1, U2, U3 and U4, a filtering energy storage capacitor C1 and a load resistor Rload. By using a simple and efficient circuit structure, cycle-by-cycle current protection of the bridgeless totem pole MOSFET is realized, the protection mechanism can monitor and respond to the current change of the MOSFET in each switching cycle, device damage caused by overlarge current is prevented, the environmental adaptability of an OBC product is remarkably improved, and the service life of the OBC product is prolonged. The PFC circuit can adapt to various complex power grid environments and voltage fluctuations, the stability of the PFC circuit is improved, the possibility of circuit faults is reduced, and then customer complaints and dissatisfaction are reduced.

Description

Technical Field

[0001] The utility model relates to a bridgeless PFC cycle-by-cycle protection circuit of an OBC, in particular to a current cycle-by-cycle protection circuit for MOSFET in a bridgeless totem pole PFC module in an on-vehicle OBC product. Background Art

[0002] In order to reduce the harmonic interference generated by OBC products to the power grid during operation, power factor correction circuits (PFC) are widely used in OBC products. However, traditional active PFC circuits have problems such as large switching losses and low efficiency, which makes it difficult to meet the needs of the development of modern electric vehicles. With the advancement of electric vehicle technology, the power requirements of OBC products are gradually increasing, and they need to have the ability of bidirectional charging and discharging, which makes the application of bridgeless totem pole PFC circuits in OBC products more and more extensive. The bridgeless totem pole PFC circuit has the characteristics of high switching frequency and high current stress, and the fluctuation range of the input AC voltage is large, which makes it easy for MOSFET to have high current during operation. If effective protection is not performed, MOSFET is very easy to be broken down by large current, which will cause the OBC product to fail.

[0003] In view of this, the present utility model is proposed. Utility Model Content

[0004] The technical problem to be solved by the utility model is to overcome the deficiencies of the prior art and provide an OBC bridgeless PFC cycle-by-cycle protection circuit, thereby solving the problems raised in the above-mentioned background technology.

[0005] In order to solve the above technical problems, the basic concept of the technical solution adopted by the utility model is:

[0006] An OBC bridgeless PFC cycle-by-cycle protection circuit includes: an AC source VIN, an energy storage inductor L1, a high-frequency upper tube PQ1, a high-frequency lower tube PQ2, an industrial frequency upper tube PQ3, an industrial frequency lower tube PQ4, a current sampling circuit 1, a current sampling circuit 2, a DSP chip U5, a driving chip U1, U2, U3, U4, a filtering energy storage capacitor C1, and a load resistor R_load;

[0007] The current sampling circuit 1 includes a current transformer CT1, a TVS tube TVS1, diodes D1, D2, and a resistor R1; the current sampling circuit 2 includes a current transformer CT2, a TVS tube TVS2, diodes D3, D4, and the resistor R2;

[0008] The first port of the AC source VIN is connected to the first port of the energy storage inductor L1, and the second port is connected to the S pole of the power frequency upper tube PQ3 and the D pole of the power frequency lower tube PQ4; the second port of the energy storage inductor L1 is connected to the input ports of the current transformer CT1 and the current transformer CT2 respectively;

[0009] The output end of the driver chip U1 is connected to the G pole and S_S pole of the high-frequency upper tube PQ1; the output end of the driver chip U2 is connected to the G pole and S_S pole of the high-frequency lower tube PQ2; the output end of the driver chip U3 is connected to the G pole of the power frequency upper tube PQ3; the output end of the driver chip U4 is connected to the G pole of the power frequency lower tube PQ4;

[0010] The D pole of the high-frequency upper tube PQ1 is connected to the D pole of the power-frequency upper tube PQ3, the positive pole of the filter energy storage capacitor C1 and the first port of its load R_load, and the S pole of the high-frequency upper tube PQ1 is connected to the second input port of the current transformer CT1; the S pole of the high-frequency lower tube PQ2 is connected to the S pole of the power-frequency lower tube PQ4, the negative pole of the filter energy storage capacitor C1 and the second port of its load R_load, and the D pole of the high-frequency lower tube PQ2 is connected to the first input port of the current transformer CT2.

[0011] Optionally, the DSP chip U5 has a CS1 port, a CS2 port, a PWM1 port, a PWM2 port, a PWM3 port, and a PWM4 port. The PWM1 port is connected to the input port of the driver chip U1 for the high-frequency upper tube PQ1, the PWM2 port is connected to the input port of the driver chip U2 for the high-frequency lower tube PQ2, the PWM3 port is connected to the input port of the driver chip U3 for the industrial frequency upper tube PQ3, and the PWM4 port is connected to the first input port of the driver chip U4 for the industrial frequency lower tube PQ4.

[0012] Optionally, the first output port of the current transformer CT1 is connected to the first port of the TVS tube TVS1 and the second port of the diode D2, the second output port of the current transformer CT1 is connected to the second port of the TVS tube TVS1 and the first port of the diode D1, the second port of the diode D1 is connected to the first port of the resistor R1 and its CS2 port, and the first port of the diode D2 is connected to the second port of the resistor R1 and connected to the negative electrode of the energy storage capacitor C1.

[0013] Optionally, the first output port of the current transformer CT2 is connected to the first port of the TVS tube TVS2 and the second port of the diode D4, the second output port of the current transformer CT2 is connected to the second port of the TVS tube TVS2 and the first port of the diode D3, the second port of the diode D3 is connected to the first port of the resistor R2 and the CS1 port, and the first port of the diode D4 is connected to the second port of the resistor R2 and connected to the negative electrode of the energy storage capacitor C1.

[0014] After adopting the above technical solution, the utility model has the following beneficial effects compared with the prior art. Of course, any product implementing the utility model does not necessarily need to achieve all the advantages described below at the same time:

[0015] By using a simple and efficient circuit structure, cycle-by-cycle current protection for the bridgeless totem pole MOSFET is achieved. This protection mechanism can monitor and respond to the current changes of the MOSFET in each switching cycle, prevent device damage caused by excessive current, and significantly improve the environmental adaptability of OBC products, enabling them to adapt to various complex power grid environments and voltage fluctuations, improve the stability of the PFC circuit, and reduce the possibility of circuit failure, thereby reducing customer complaints and dissatisfaction, reducing product failure rate and return rate, extending product life, and reducing the economic losses of enterprises due to product return and replacement. At the same time, it improves product reputation and customer satisfaction, which helps enterprises maintain competitiveness in the market.

[0016] The specific implementation modes of the present utility model are further described in detail below in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The drawings described below are only some embodiments. For those skilled in the art, other drawings can be obtained based on these drawings without creative work. In the drawings:

[0018] Figure 1 The utility model is a schematic diagram of a cycle-by-cycle current protection circuit of a bridgeless totem pole PFC circuit.

[0019] It should be noted that these drawings and textual descriptions are not intended to limit the conceptual scope of the present invention in any way, but rather to illustrate the concept of the present invention for those skilled in the art by referring to specific embodiments. DETAILED DESCRIPTION

[0020] The utility model is now described in further detail with reference to the accompanying drawings.

[0021] See also Figure 1As shown, in this embodiment, a bridgeless PFC cycle-by-cycle protection circuit of OBC is provided, including an AC source VIN, an energy storage inductor L1, a high-frequency upper tube PQ1, a high-frequency lower tube PQ2, an industrial frequency upper tube PQ3, an industrial frequency lower tube PQ4, a current sampling circuit 1, a current sampling circuit 2, a DSP chip U5, a driving chip U1, U2, U3, U4, a filtering energy storage capacitor C1, and a load resistor R_load;

[0022] The current sampling circuit 1 includes a current transformer CT1, a TVS tube TVS1, diodes D1, D2, and a resistor R1; the current sampling circuit 2 includes a current transformer CT2, a TVS tube TVS2, diodes D3, D4, and a resistor R2; the current sampling circuit 1 is used to collect the current of the high-frequency upper tube PQ1, and the current sampling circuit 2 is responsible for collecting the current of the high-frequency lower tube PQ2. The DSP is responsible for converting the sampling values ​​of the current sampling circuit 1 and the current sampling circuit 2 into actual current values; it outputs four PWM drive waveform signals and controls the switching of four MOSFETs through the driver chip.

[0023] The first port of the AC source VIN is connected to the first port of the energy storage inductor L1, and the second port is connected to the S pole of the power frequency upper tube PQ3 and the D pole of the power frequency lower tube PQ4; the second port of the energy storage inductor L1 is respectively connected to the input ports of the current transformer CT1 and the current transformer CT2; the AC source VIN in the utility model serves as the input power supply of the PFC circuit, and the energy storage inductor L1 is responsible for storing energy when the voltage is boosted. The high-frequency upper tube PQ1 and the high-frequency lower tube PQ2 are responsible for chopping, so that the energy storage inductor L1 continuously stores and releases energy. The power frequency upper tube PQ3 and the power frequency lower tube PQ4 are responsible for phase switching, so that the AC power is converted into DC power after output.

[0024] The output end of the driver chip U1 is connected to the G pole and S_S pole of the high-frequency upper tube PQ1; the output end of the driver chip U2 is connected to the G pole and S_S pole of the high-frequency lower tube PQ2; the output end of the driver chip U3 is connected to the G pole of the power frequency upper tube PQ3; the output end of the driver chip U4 is connected to the G pole of the power frequency lower tube PQ4;

[0025] The D pole of the high-frequency upper tube PQ1 is connected to the D pole of the power-frequency upper tube PQ3, the positive pole of the filter energy storage capacitor C1 and the first port of its load R_load, and the S pole of the high-frequency upper tube PQ1 is connected to the second input port of the current transformer CT1; the S pole of the high-frequency lower tube PQ2 is connected to the S pole of the power-frequency lower tube PQ4, the negative pole of the filter energy storage capacitor C1 and the second port of its load R_load, and the D pole of the high-frequency lower tube PQ2 is connected to the first input port of the current transformer CT2.

[0026] In this embodiment, the DSP chip U5 has a CS1 port, a CS2 port, a PWM1 port, a PWM2 port, a PWM3 port, and a PWM4 port. The PWM1 port is connected to the input port of the driver chip U1 for the high-frequency upper tube PQ1, the PWM2 port is connected to the input port of the driver chip U2 for the high-frequency lower tube PQ2, the PWM3 port is connected to the input port of the driver chip U3 for the power frequency upper tube PQ3, and the PWM4 port is connected to the first input port of the driver chip U4 for the power frequency lower tube PQ4. The driver chips U2, U2, U3, and U4 load convert the low-voltage drive signal sent by the DSP into a suitable signal to drive the four MOSFETs to switch.

[0027] In this embodiment, the first output port of the current transformer CT1 is connected to the first port of the TVS tube TVS1 and the second port of the diode D2, the second output port of the current transformer CT1 is connected to the second port of the TVS tube TVS1 and the first port of the diode D1, the second port of the diode D1 is connected to the first port of the resistor R1 and its CS2 port, and the first port of the diode D2 is connected to the second port of the resistor R1 and connected to the negative electrode of the energy storage capacitor C1.

[0028] In this embodiment, the first output port of the current transformer CT2 is connected to the first port of the TVS tube TVS2 and the second port of the diode D4, the second output port of the current transformer CT2 is connected to the second port of the TVS tube TVS2 and the first port of the diode D3, the second port of the diode D3 is connected to the first port of the resistor R2 and the CS1 port, and the first port of the diode D4 is connected to the second port of the resistor R2 and connected to the negative electrode of the energy storage capacitor C1.

[0029] Working principle: In the positive half cycle of the AC source VIN, the high-frequency lower tube PQ2 switches at a high frequency with a switching frequency of 40K-100K, with a duty cycle of 50%. The high-frequency lower tube PQ1, the power frequency upper tube PQ3, and the power frequency lower tube PQ4 are all in the off state. When the high-frequency lower tube PQ2 is turned on, the energy storage inductor L1 stores energy, and the current passes through VIN-->L1--->PQ2-->PQ4-->VIN. At this time, the current transformer CT2 senses the current I2, and the transformer turns ratio is 1:N; then the output current sampled by the transformer is I2 / N. Since it is a forward current, D3 and D4 are in the on state, and the current voltage drop on R2 is: V_R2=(I2 / N)*R2. DSP collects the voltage signal cycle by cycle, and compares it with the protection reference voltage Vref set by the software through the internal comparator module of DSP. If it exceeds the protection reference voltage Vref, the drive signal PWM1 of the current cycle is turned off, and the drive signal PWM1 is turned on again in the next cycle. If the current value sampled in the next cycle continues to be greater than the design threshold, the protection continues; if the current value sampled continues to be less than the design threshold, the circuit works normally.

[0030] When the high-frequency lower tube PQ2 is in the off state, the energy storage inductor L1 releases energy. PQ1 continues current through the body diode. At this time, since all MOSFETs are in the off state, current collection has no effect. At this time, the current passes through VIN-->L1--->PQ1-->C1-->PQ4-->VIN; at this time, the current transformer CT1 senses the current, but since D1 and D2 are in the off state, TVS1 is clamped to prevent the current transformer from saturation. The current cannot produce a voltage drop on R1, and the DSP cannot collect the current signal.

[0031] When the AC source VIN is in the negative half cycle, the high-frequency upper tube PQ1 switches at a high frequency of 40K-100K, with a duty cycle of 50%. The high-frequency lower tube PQ2, the power frequency upper tube PQ3, and the power frequency lower tube PQ4 are all in the off state. When the high-frequency upper tube PQ1 is turned on, the energy storage inductor L1 stores energy, and the current passes through VIN-->PQ3--->PQ1-->L1-->VIN. At this time, the current transformer CT1 senses the current I1, and the transformer turns ratio is 1:N; then the output current is I1 / N. Since it is a forward current, D1 and D2 are in the on state, and the current voltage drop on R1 is: V_R1=(I1 / N)*R1. The DSP collects the voltage signal cycle by cycle, and compares it with the protection reference voltage Vref set by the software through the internal comparator module of the DSP. If it exceeds the protection reference voltage Vref, the drive signal PWM2 of the current cycle is turned off, and the drive signal PWM2 is turned on again in the next cycle. If the current value sampled in the next cycle continues to be greater than the design threshold, the protection continues; if the current value sampled continues to be less than the design threshold, the circuit works normally.

[0032] When the high-frequency upper tube PQ1 is in the off state, the energy storage inductor L1 releases energy. PQ2 continues current through the body diode. At this time, since all MOSFETs are in the off state, current collection has no effect. At this time, the current passes through VIN-->PQ3--->C1-->PQ2-->L1-->VIN; at this time, the current transformer CT21 senses the current, but since D3 and D4 are in the off state, TVS2 is clamped to prevent the current transformer from saturation. The current cannot produce a voltage drop on R2, and the DSP cannot collect the current signal.

[0033] The current protection threshold in this application is generally set to about 1.2 times the maximum peak current of normal operation, and can also be appropriately enlarged or reduced according to the current capability of the selected MOSFET and the heat dissipation capability of the product. If the heat dissipation conditions are good, the number of cycle-by-cycle protections can be set to unlimited times. If the heat dissipation capacity is poor, the product is tested and set to 200-2000 times. If it is greater than this number, the PFC circuit is completely shut down. The sampling response time is preferably controlled within 2us, but it can also be appropriately adjusted according to the heat dissipation conditions and the pulse current resistance and time of the MOSFET.

[0034] The utility model designs a bridgeless PFC cycle-by-cycle protection circuit for OBC, and in particular refers to a bridgeless PFC cycle-by-cycle protection circuit for OBC in OBC products, which is a beneficial improvement made to existing new energy automotive electronic products and has very important practical promotion significance. Due to the access of different devices to the power grid, the input voltage may fluctuate violently at any time, and a large impact current will be generated in the PFC circuit at this time. If no protection is performed at this time, the PFC MOSFET will have a large current breakdown, causing product damage and customer complaints.

[0035] The present invention is not limited to the above-mentioned embodiments. Anyone should be aware that any structural changes made under the inspiration of the present invention, and any technical solutions that are the same or similar to the present invention, fall within the protection scope of the present invention. The technology, shape, and structure that are not described in detail in the present invention are all known technologies.

Claims

1. A bridgeless PFC cycle-by-cycle protection circuit for OBC, suitable for vehicle-mounted OBC products, characterized in that: include: AC source VIN, energy storage inductor L1, high-frequency upper tube PQ1, high-frequency lower tube PQ2, power frequency upper tube PQ3, power frequency lower tube PQ4, current sampling circuit 1, current sampling circuit 2, DSP chip U5, driver chips U1, U2, U3, U4, filter energy storage capacitor C1, load resistor R_load; The current sampling circuit 1 includes a current transformer CT1, a TVS tube TVS1, diodes D1, D2, and a resistor R1; the current sampling circuit 2 includes a current transformer CT2, a TVS tube TVS2, diodes D3, D4, and a resistor R2; The first port of the AC source VIN is connected to the first port of the energy storage inductor L1, and the second port is connected to the S pole of the power frequency upper tube PQ3 and the D pole of the power frequency lower tube PQ4; the second port of the energy storage inductor L1 is connected to the input ports of the current transformer CT1 and the current transformer CT2 respectively; The output end of the driver chip U1 is connected to the G pole and S_S pole of the high-frequency upper tube PQ1; the output end of the driver chip U2 is connected to the G pole and S_S pole of the high-frequency lower tube PQ2; the output end of the driver chip U3 is connected to the G pole of the power frequency upper tube PQ3; the output end of the driver chip U4 is connected to the G pole of the power frequency lower tube PQ4; The D pole of the high-frequency upper tube PQ1 is connected to the D pole of the power frequency upper tube PQ3, the positive pole of the filter energy storage capacitor C1 and the first port of its load R_load, and the S pole of the high-frequency upper tube PQ1 is connected to the second input port of the current transformer CT1; the S pole of the high-frequency lower tube PQ2 is connected to the S pole of the power frequency lower tube PQ4, the negative pole of the filter energy storage capacitor C1 and the second port of its load R_load, and the D pole of the high-frequency lower tube PQ2 is connected to the first input port of the current transformer CT2.

2. The OBC bridgeless PFC cycle-by-cycle protection circuit according to claim 1, characterized in that: The DSP chip U5 has a CS1 port, a CS2 port, a PWM1 port, a PWM2 port, a PWM3 port, and a PWM4 port. The PWM1 port is connected to the input port of the driver chip U1 for the high-frequency upper tube PQ1, the PWM2 port is connected to the input port of the driver chip U2 for the high-frequency lower tube PQ2, the PWM3 port is connected to the input port of the driver chip U3 for the industrial frequency upper tube PQ3, and the PWM4 port is connected to the first input port of the driver chip U4 for the industrial frequency lower tube PQ4.

3. The OBC bridgeless PFC cycle-by-cycle protection circuit according to claim 2, characterized in that: The first output port of the current transformer CT1 is connected to the first port of the TVS tube TVS1 and the second port of the diode D2, the second output port of the current transformer CT1 is connected to the second port of the TVS tube TVS1 and the first port of the diode D1, the second port of the diode D1 is connected to the first port of the resistor R1 and its CS2 port, the first port of the diode D2 is connected to the second port of the resistor R1 and connected to the negative electrode of the energy storage capacitor C1.

4. The OBC bridgeless PFC cycle-by-cycle protection circuit according to claim 2, characterized in that: The first output port of the current transformer CT2 is connected to the first port of the TVS tube TVS2 and the second port of the diode D4, the second output port of the current transformer CT2 is connected to the second port of the TVS tube TVS2 and the first port of the diode D3, the second port of the diode D3 is connected to the first port of the resistor R2 and the CS1 port, the first port of the diode D4 is connected to the second port of the resistor R2 and is connected to the negative electrode of the energy storage capacitor C1.

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