Array substrate based on independent via hole connection and display screen
By dividing the first transparent electrode layer of the liquid crystal display device into independent areas and connecting it through independent vias, the problem of via connection failure in the prior art is solved, the reliability and corrosion resistance of the connection are improved, and the competitiveness of the product is enhanced.
Patent Information
- Application Number
- CN202421943605.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-12
- Publication Date
- 2025-06-17
- Estimated Expiration
- 2034-08-12
AI Technical Summary
The array substrates of the existing liquid crystal display devices are prone to failure problems at the via connections, especially in the case of water vapor intrusion, resulting in abnormal display and reduced display quality.
By dividing the first transparent electrode layer into independent first independent regions and second independent regions, and overlapping with the gate layer through the first and second groups of vias, it is ensured that even if one group of vias fails, the metal layers of the array substrate can still be connected, thereby enhancing corrosion resistance and reliability.
This technical method effectively improves the reliability and corrosion resistance of via connections, reduces the possibility of abnormality, and thus enhances the competitiveness of the product.
Smart Images
Figure CN222994809U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of display screens, and particularly relates to an array substrate and a display screen based on independent via connection. Background Art
[0002] A liquid crystal display screen includes an array substrate, a counter substrate, and a liquid crystal layer located between the two substrates. On the side of the array substrate facing the liquid crystal layer, there are thin film transistors, pixel electrodes, etc. Among them, a thin film transistor generally includes a gate electrode, an active layer, a source electrode, and a drain electrode. It has the characteristics of small volume, low power consumption, no radiation, etc., and occupies a dominant position in the current flat panel display market.
[0003] Its working principle is as follows: The electric field between the counter substrate and the array substrate causes the liquid crystal to rotate. By changing the voltage to adjust the electric field strength, the torsion and angle of the liquid crystal material can be controlled, thereby controlling the light transmittance of this area and finally obtaining the desired image. Among them, the array substrate includes gate lines, data lines, pixel electrodes, and thin film transistors. The counter substrate includes a black matrix, red, green, and blue (RGB) resins, and an indium tin oxide (ITO) layer. The RGB resin is used to achieve color display of the liquid crystal display screen, the ITO layer is used to provide a common electric field for the color film substrate, and the black matrix is used to block irregularly arranged liquid crystal molecules in the pixel edge area and the TFT area.
[0004] However, the array substrate of the existing liquid crystal display device uses ITO for connection. This connection method often has the phenomenon of via connection failure at the via holes. Especially during the reliability experiment, when water vapor invades the ITO area, it may cause the ITO via holes to fail, and the product may also have problems such as abnormal display, thereby reducing the display quality. Summary of the Utility Model
[0005] The metal connection scheme of the array substrate of the existing liquid crystal display device is very likely to have problems with via connection failure.
[0006] In view of the above problems, an array substrate and a display screen based on independent via connection are proposed. By dividing the first transparent electrode layer into independent first and second independent regions and respectively overlapping them with the gate layer through the first group of vias and the second group of vias, even if one group of vias fails, the connection between the metal layers of the array substrate can still be ensured, enhancing the corrosion resistance and reliability of the connection and improving the product competitiveness.
[0007] In a first aspect, an array substrate based on independent via connection includes:
[0008] A touch metal layer;
[0009] A first transparent electrode layer;
[0010] A gate layer;
[0011] The first group of vias;
[0012] The second group of vias;
[0013] The first transparent electrode layer includes separate:
[0014] A first independent region and a second independent region;
[0015] The first independent region is respectively overlapped with the touch metal layer and the gate layer through the first group of vias;
[0016] The second independent region is respectively overlapped with the touch metal layer and the gate layer through the second group of vias.
[0017] In the first possible implementation manner of the array substrate based on independent via connection according to the first aspect of the present invention, the first group of vias includes:
[0018] A first via and a second via;
[0019] The first via overlaps the gate layer and the first independent region of the first transparent electrode layer, and the second via overlaps the first independent region of the first transparent electrode layer and the touch metal layer.
[0020] In the second possible implementation manner in combination with the first possible implementation manner of the first aspect of the present invention, the second group of vias includes:
[0021] A third via and a fourth via;
[0022] The third via overlaps the gate layer and the second independent region of the first transparent electrode layer, and the fourth via overlaps the second independent region of the first transparent electrode layer and the touch metal layer.
[0023] In the third possible implementation manner in combination with the first possible implementation manner of the first aspect of the present invention, the array substrate based on independent via connection further includes:
[0024] An insulating layer;
[0025] A glass substrate;
[0026] The insulating layer is fabricated on the glass substrate;
[0027] The gate layer is fabricated in the insulating layer.
[0028] In the fourth possible implementation manner in combination with the third possible implementation manner of the first aspect of the present invention, the array substrate based on independent via connection further includes:
[0029] Isolation layer;
[0030] The isolation layer is fabricated on the insulating layer;
[0031] The touch metal layer is fabricated on the isolation layer.
[0032] Combined with the fourth possible implementation manner of the first aspect of the present utility model, in the fifth possible implementation manner, the array substrate based on independent vias connection further includes:
[0033] Flat layer;
[0034] The flat layer is fabricated on the isolation layer;
[0035] The touch metal layer is fabricated in the flat layer.
[0036] Combined with the fifth possible implementation manner of the first aspect of the present utility model, in the sixth possible implementation manner, the array substrate based on independent vias connection further includes:
[0037] Passivation layer and second transparent electrode layer;
[0038] The passivation layer is fabricated on the flat layer;
[0039] The first independent region and the second independent region of the first transparent electrode layer are respectively fabricated in the passivation layer;
[0040] The second transparent electrode layer is fabricated on the passivation layer.
[0041] In a second aspect, a display screen includes the array substrate based on independent vias connection described in the first aspect.
[0042] Implementing the array substrate based on independent vias connection and the display screen of the present utility model, by dividing the first transparent electrode layer into independent first independent region and second independent region and respectively overlapping with the gate layer through the first group of vias and the second group of vias, even if one group of vias fails, the connection between the metal layers of the array substrate can still be ensured, enhancing the corrosion resistance and reliability of the connection and improving the product competitiveness. BRIEF DESCRIPTION OF THE DRAWINGS
[0043] In order to more clearly illustrate the technical solutions in the embodiments of the present utility model, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the following drawings are only some embodiments of the present utility model. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.
[0044] Figure 1 It is a schematic diagram of the film layer structure of the array substrate based on independent vias connection in the present utility model;
[0045] Figure 2 It is a schematic diagram of the metal via connection in the array substrate based on independent via connection in the present utility model;
[0046] The names of the parts referred to by the numbers in the drawings are: 10 - glass substrate, 20 - insulating layer, 30 - gate layer, 40 - isolation layer, 50 - planarization layer, 60 - touch metal layer, 61 - first via, 62 - second via, 63 - third via, 64 - fourth via, 71 - first independent region, 72 - second independent region, 80 - passivation layer, 90 - second transparent electrode layer. Detailed implementation manners
[0047] Next, the technical solutions in the present utility model will be clearly and completely described in conjunction with the drawings in the utility model. Obviously, the described embodiments are only a part of the embodiments of the present utility model, rather than all embodiments. Based on the embodiments in the present utility model, other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present utility model.
[0048] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the technical field to which the present utility model belongs. The terms used in the specification of the present utility model herein are only for the purpose of describing specific embodiments, and are not intended to limit the present utility model. The term "and / or" used herein includes any and all combinations of one or more of the related listed items.
[0049] It should be noted that when an element is referred to as "fixed to" or "disposed on" another element, it can be directly on the other element or indirectly on the other element. When an element is referred to as "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element.
[0050] It should be understood that the orientation or positional relationship indicated by the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation to the present application.
[0051] In addition, the terms "first" and "second" are for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of this application, "a plurality of" means two or more unless otherwise specifically defined.
[0052] In the existing metal connection scheme of the array substrate of a liquid crystal display device, the problem of via connection failure easily occurs.
[0053] To address the above problems, an array substrate and a display screen based on independent via connection are proposed.
[0054] In a first aspect, as Figure 2 , Figure 2 is a schematic diagram of metal via connection in the array substrate based on independent via connection in the present utility model; an array substrate based on independent via connection includes a touch metal layer 60, a first transparent electrode layer (VITO), a gate layer 30, a first group of vias, and a second group of vias; the first transparent electrode layer (VITO) includes a separate first independent region 71 and a second independent region 72; the first independent region 71 is overlapped with the gate layer 30 through the first group of vias; the second independent region 72 is overlapped with the gate layer 30 through the second group of vias. By dividing the first transparent electrode layer (VITO) into independent first and second independent regions 71 and 72 and respectively overlapping them with the gate layer 30 through the first and second groups of vias, even if one group of vias fails, the connection between the metal layers of the array substrate can still be ensured, enhancing the corrosion resistance and reliability of the connection and improving the product competitiveness.
[0055] In the prior art, the gate layer 30 is connected to the entire first transparent electrode layer (VITO) through vias, and the first transparent electrode layer (VITO) is then connected to the touch metal layer 60 through vias. If water vapor invades, the first transparent electrode layer (VITO) will be corroded. During this process, since the first transparent electrode layer (VITO) is a one-piece design, the corrosion will continue along the first transparent electrode layer (VITO) to corrode the adjacent vias, and it is very likely that the adjacent vias will also be corroded, finally resulting in via connection failure.
[0056] In this embodiment, the first transparent electrode layer (VITO) is divided into two independent parts. Even if water vapor invades, only one group of vias will fail first, and the other group of vias can still play a connection role. Since the first transparent electrode layer (VITO) is not a one-piece design, the corrosion resistance ability is enhanced, the via connection reliability and the display effect can be improved, thereby improving the product competitiveness.
[0057] As Figure 2 andFigure 1 , the first group of vias includes a first via 61 and a second via 62; the first via 61 connects the gate layer 30 to the first independent region 71 of the first transparent electrode layer (VITO), and the second via 62 connects the first independent region 71 of the first transparent electrode layer (VITO) to the touch metal layer 60.
[0058] Such as Figure 2 and Figure 1 , the second group of vias includes a third via 63 and a fourth via 64; the third via 63 connects the gate layer 30 to the second independent region 72 of the first transparent electrode layer (VITO), and the fourth via 64 connects the second independent region 72 of the first transparent electrode layer (VITO) to the touch metal layer 60.
[0059] Such as Figure 1 , Figure 1 is a schematic diagram of the film layer structure of the array substrate based on independent via connections in the present utility model; from bottom to top are a glass substrate 10, an insulating layer 20, a gate layer 30, an isolation layer 40, a planarization layer 50, a touch metal layer 60, a first via 61, a second via 62, a third via 63, a fourth via 64, a passivation layer 80, a first independent region 71 and a second independent region 72 of the first transparent electrode layer (VITO), and a second transparent electrode layer 90 (PITO).
[0060] Furthermore, the array substrate based on independent via connections further includes an insulating layer 20 and a glass substrate 10; the insulating layer 20 is fabricated on the glass substrate 10; the gate layer 30 is fabricated in the insulating layer 20.
[0061] Furthermore, the array substrate based on independent via connections further includes an isolation layer 40; the isolation layer 40 is fabricated on the insulating layer 20; the touch metal layer 60 is fabricated on the isolation layer 40.
[0062] Furthermore, the array substrate based on independent via connections further includes a planarization layer 50; the planarization layer 50 is fabricated on the isolation layer 40; the touch metal layer 60 is fabricated in the planarization layer 50.
[0063] Furthermore, the array substrate based on independent via connections further includes a passivation layer 80 and a second transparent electrode layer 90 (PITO); the passivation layer 80 is fabricated on the planarization layer 50; the first independent region 71 and the second independent region 72 of the first transparent electrode layer (VITO) are respectively fabricated in the passivation layer 80; the second transparent electrode layer 90 (PITO) is fabricated on the passivation layer 80.
[0064] In a second aspect, a display screen includes the array substrate based on independent via connections of the first aspect.
[0065] An array substrate and a liquid crystal display device implementing the present utility model divide a first transparent electrode layer (VITO) into an independent first independent region 71 and a second independent region 72, and respectively lap with a gate layer 30 through a first group of vias and a second group of vias. Even if one group of vias fails, the connection between metal layers of the array substrate can still be ensured, enhancing the corrosion resistance and reliability of the connection and improving the product competitiveness.
[0066] The above are only the preferred embodiments of the present utility model and are not intended to limit the present utility model. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present utility model shall be included within the protection scope of the present utility model.
Claims
1. An array substrate based on independent via connections, characterized in that: include: Touch metal layer; a first transparent electrode layer; Gate layer; The first set of vias; The second set of vias; The first transparent electrode layer includes separated: A first independent area and a second independent area; The first independent region is respectively overlapped with the touch metal layer and the gate layer through the first group of via holes; The second independent region is respectively overlapped with the touch metal layer and the gate layer through the second group of via holes.
2. The array substrate based on independent via connection according to claim 1, characterized in that: The first set of vias includes: a first via hole and a second via hole; The first via hole overlaps the gate layer and the first independent region of the first transparent electrode layer, and the second via hole overlaps the first independent region of the first transparent electrode layer and the touch metal layer.
3. The array substrate based on independent via connection according to claim 2, characterized in that: The second set of vias includes: a third via hole and a fourth via hole; The third via hole overlaps the gate layer and the second independent region of the first transparent electrode layer, and the fourth via hole overlaps the second independent region of the first transparent electrode layer and the touch metal layer.
4. The array substrate based on independent via connection according to claim 3, characterized in that: The array substrate based on independent via connection also includes: Insulation layer; Glass substrate; The insulating layer is formed on the glass substrate; The gate layer is formed in the insulating layer.
5. The array substrate based on independent via connection according to claim 4, characterized in that: The array substrate based on independent via connection also includes: Isolation layer; The isolation layer is formed on the insulating layer; The touch metal layer is manufactured on the isolation layer.
6. The array substrate based on independent via connection according to claim 5, characterized in that: The array substrate based on independent via connection also includes: Flat layer; The flat layer is formed on the isolation layer; The touch metal layer is manufactured in the flat layer.
7. The array substrate based on independent via connection according to claim 6, characterized in that: The array substrate based on independent via connection also includes: A passivation layer and a second transparent electrode layer; The passivation layer is formed on the planar layer; The first independent region and the second independent region of the first transparent electrode layer are respectively made in the passivation layer; The second transparent electrode layer is formed on the passivation layer.
8. A display screen, characterized in that: An array substrate based on independent via connection as described in any one of claims 1 to 7.